ARM: shmobile: r8a7794 dtsi: Add CPG/MSTP Clock Domain
[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / r8a7794.dtsi
index 43acf185ecc43f40fafbebb3661efec281569391..97c8e9ace5ebee1ee83d1e193eb985ebc7cc6f40 100644 (file)
@@ -57,6 +57,7 @@
                             <0 143 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp1_clks R8A7794_CLK_CMT0>;
                clock-names = "fck";
+               power-domains = <&cpg_clocks>;
 
                renesas,channels-mask = <0x60>;
 
@@ -76,6 +77,7 @@
                             <0 127 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp3_clks R8A7794_CLK_CMT1>;
                clock-names = "fck";
+               power-domains = <&cpg_clocks>;
 
                renesas,channels-mask = <0xff>;
 
                             <0 16 IRQ_TYPE_LEVEL_HIGH>,
                             <0 17 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp4_clks R8A7794_CLK_IRQC>;
+               power-domains = <&cpg_clocks>;
        };
 
        pfc: pin-controller@e6060000 {
                                "ch12", "ch13", "ch14";
                clocks = <&mstp2_clks R8A7794_CLK_SYS_DMAC0>;
                clock-names = "fck";
+               power-domains = <&cpg_clocks>;
                #dma-cells = <1>;
                dma-channels = <15>;
        };
                                "ch12", "ch13", "ch14";
                clocks = <&mstp2_clks R8A7794_CLK_SYS_DMAC1>;
                clock-names = "fck";
+               power-domains = <&cpg_clocks>;
                #dma-cells = <1>;
                dma-channels = <15>;
        };
                clock-names = "sci_ick";
                dmas = <&dmac0 0x21>, <&dmac0 0x22>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clock-names = "sci_ick";
                dmas = <&dmac0 0x25>, <&dmac0 0x26>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clock-names = "sci_ick";
                dmas = <&dmac0 0x27>, <&dmac0 0x28>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clock-names = "sci_ick";
                dmas = <&dmac0 0x1b>, <&dmac0 0x1c>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clock-names = "sci_ick";
                dmas = <&dmac0 0x1f>, <&dmac0 0x20>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clock-names = "sci_ick";
                dmas = <&dmac0 0x23>, <&dmac0 0x24>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clock-names = "sci_ick";
                dmas = <&dmac0 0x3d>, <&dmac0 0x3e>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clock-names = "sci_ick";
                dmas = <&dmac0 0x19>, <&dmac0 0x1a>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clock-names = "sci_ick";
                dmas = <&dmac0 0x1d>, <&dmac0 0x1e>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clock-names = "sci_ick";
                dmas = <&dmac0 0x29>, <&dmac0 0x2a>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clock-names = "sci_ick";
                dmas = <&dmac0 0x2d>, <&dmac0 0x2e>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clock-names = "sci_ick";
                dmas = <&dmac0 0x2b>, <&dmac0 0x2c>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clock-names = "sci_ick";
                dmas = <&dmac0 0x2f>, <&dmac0 0x30>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clock-names = "sci_ick";
                dmas = <&dmac0 0xfb>, <&dmac0 0xfc>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clock-names = "sci_ick";
                dmas = <&dmac0 0xfd>, <&dmac0 0xfe>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clock-names = "sci_ick";
                dmas = <&dmac0 0x39>, <&dmac0 0x3a>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clock-names = "sci_ick";
                dmas = <&dmac0 0x4d>, <&dmac0 0x4e>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                clock-names = "sci_ick";
                dmas = <&dmac0 0x3b>, <&dmac0 0x3c>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                reg = <0 0xee700000 0 0x400>;
                interrupts = <0 162 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp8_clks R8A7794_CLK_ETHER>;
+               power-domains = <&cpg_clocks>;
                phy-mode = "rmii";
                #address-cells = <1>;
                #size-cells = <0>;
                clocks = <&mstp3_clks R8A7794_CLK_MMCIF0>;
                dmas = <&dmac0 0xd1>, <&dmac0 0xd2>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                reg-io-width = <4>;
                status = "disabled";
        };
                reg = <0 0xee100000 0 0x200>;
                interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp3_clks R8A7794_CLK_SDHI0>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                reg = <0 0xee140000 0 0x100>;
                interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp3_clks R8A7794_CLK_SDHI1>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                reg = <0 0xee160000 0 0x100>;
                interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp3_clks R8A7794_CLK_SDHI2>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
                        #clock-cells = <1>;
                        clock-output-names = "main", "pll0", "pll1", "pll3",
                                             "lb", "qspi", "sdh", "sd0", "z";
+                       #power-domain-cells = <0>;
                };
                /* Variable factor clocks */
                sd2_clk: sd2_clk@e6150078 {