Merge branch 'cleanup/blocksize-diet-part2' of git://git.kernel.org/pub/scm/linux...

[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / omap3-n900.dts

diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index bc82a12d4c2c3bb6b294c2c99d4a64d3568537f0..b550c41b46f1ecc83fcc9abf551fbeff4f44e2a0 100644 (file)
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -115,6 +115,12 @@
                eci-switch-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* 182 */
                speaker-amplifier-gpios = <&twl_gpio 7 GPIO_ACTIVE_HIGH>;
        };
+
+       battery: n900-battery {
+               compatible = "nokia,n900-battery";
+               io-channels = <&twl_madc 0>, <&twl_madc 4>, <&twl_madc 12>;
+               io-channel-names = "temp", "bsi", "vbat";
+       };
 };
 
 &omap3_pmx_core {
@@ -142,6 +148,33 @@
                >;
        };
 
+       gpmc_pins: pinmux_gpmc_pins {
+               pinctrl-single,pins = <
+
+                       /* address lines */
+                        OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a1.gpmc_a1 */
+                        OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a2.gpmc_a2 */
+                        OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a3.gpmc_a3 */
+
+                       /* data lines, gpmc_d0..d7 not muxable according to TRM */
+                        OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0)        /* gpmc_d8.gpmc_d8 */
+                        OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0)        /* gpmc_d9.gpmc_d9 */
+                        OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0)        /* gpmc_d10.gpmc_d10 */
+                        OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0)        /* gpmc_d11.gpmc_d11 */
+                        OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0)        /* gpmc_d12.gpmc_d12 */
+                        OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0)        /* gpmc_d13.gpmc_d13 */
+                        OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0)        /* gpmc_d14.gpmc_d14 */
+                        OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0)        /* gpmc_d15.gpmc_d15 */
+
+                       /*
+                        * gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable
+                        * according to TRM. OneNAND seems to require PIN_INPUT on clock.
+                        */
+                        OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0)       /* gpmc_ncs1.gpmc_ncs1 */
+                        OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0)        /* gpmc_clk.gpmc_clk */
+               >;
+       };
+
        i2c1_pins: pinmux_i2c1_pins {
                pinctrl-single,pins = <
                        0x18a (PIN_INPUT | MUX_MODE0)           /* i2c1_scl */
@@ -540,6 +573,16 @@
                power-gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>; /* 98 */
        };
 
+       si4713: si4713@63 {
+               compatible = "silabs,si4713";
+                reg = <0x63>;
+
+                interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */
+                reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */
+                vio-supply = <&vio>;
+                vdd-supply = <&vaux1>;
+       };
+
        bq24150a: bq24150a@6b {
                compatible = "ti,bq24150a";
                reg = <0x6b>;
@@ -585,16 +628,16 @@
 };
 
 &gpmc {
-       ranges = <0 0 0x04000000 0x10000000>; /* 256MB */
        ranges = <0 0 0x01000000 0x01000000>,   /* 16 MB for OneNAND */
                 <1 0 0x02000000 0x01000000>;   /* 16 MB for smc91c96 */
+       pinctrl-names = "default";
+       pinctrl-0 = <&gpmc_pins>;
 
-       /* gpio-irq for dma: 65 */
-
+       /* sys_ndmareq1 could be used by the driver, not as gpio65 though */
        onenand@0,0 {
                #address-cells = <1>;
                #size-cells = <1>;
-               reg = <0 0 0x10000000>;
+               reg = <0 0 0x20000>;    /* CS0, offset 0, IO size 128K */
 
                gpmc,sync-read;
                gpmc,sync-write;
@@ -657,11 +700,9 @@
                };
        };
 
+       /* Ethernet is on some early development boards and qemu */
        ethernet@gpmc {
                compatible = "smsc,lan91c94";
-
-               status = "disabled";
-
                interrupt-parent = <&gpio2>;
                interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;  /* gpio54 */
                reg = <1 0x300 0xf>;            /* 16 byte IO range at offset 0x300 */