ARM: dts: Add GPMC timings for omap zoom serial port
[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / omap-zoom-common.dtsi
index 2889b504792ff3b5139925bf7085422659eb6aed..46ef3e443861982ee840bf1091079ae7bd227ccd 100644 (file)
                interrupts = <6 IRQ_TYPE_EDGE_RISING>;  /* gpio102 */
                clock-frequency = <1843200>;
                current-speed = <115200>;
+               gpmc,mux-add-data = <0>;
+               gpmc,device-width = <1>;
+               gpmc,wait-pin = <1>;
+               gpmc,cycle2cycle-samecsen = <1>;
+               gpmc,cycle2cycle-diffcsen = <1>;
+               gpmc,cs-on-ns = <5>;
+               gpmc,cs-rd-off-ns = <155>;
+               gpmc,cs-wr-off-ns = <155>;
+               gpmc,adv-on-ns = <15>;
+               gpmc,adv-rd-off-ns = <40>;
+               gpmc,adv-wr-off-ns = <40>;
+               gpmc,oe-on-ns = <45>;
+               gpmc,oe-off-ns = <145>;
+               gpmc,we-on-ns = <45>;
+               gpmc,we-off-ns = <145>;
+               gpmc,rd-cycle-ns = <155>;
+               gpmc,wr-cycle-ns = <155>;
+               gpmc,access-ns = <145>;
+               gpmc,page-burst-access-ns = <20>;
+               gpmc,bus-turnaround-ns = <20>;
+               gpmc,cycle2cycle-delay-ns = <20>;
+               gpmc,wait-monitoring-ns = <0>;
+               gpmc,clk-activation-ns = <0>;
+               gpmc,wr-data-mux-bus-ns = <45>;
+               gpmc,wr-access-ns = <145>;
+       };
+       uart@3,1 {
+               compatible = "ns16550a";
+               reg = <3 0x100 8>;      /* CS3, offset 0x100, IO size 8 */
+               bank-width = <2>;
+               reg-shift = <1>;
+               reg-io-width = <1>;
+               interrupt-parent = <&gpio4>;
+               interrupts = <6 IRQ_TYPE_EDGE_RISING>;  /* gpio102 */
+               clock-frequency = <1843200>;
+               current-speed = <115200>;
+       };
+       uart@3,2 {
+               compatible = "ns16550a";
+               reg = <3 0x200 8>;      /* CS3, offset 0x200, IO size 8 */
+               bank-width = <2>;
+               reg-shift = <1>;
+               reg-io-width = <1>;
+               interrupt-parent = <&gpio4>;
+               interrupts = <6 IRQ_TYPE_EDGE_RISING>;  /* gpio102 */
+               clock-frequency = <1843200>;
+               current-speed = <115200>;
+       };
+       uart@3,3 {
+               compatible = "ns16550a";
+               reg = <3 0x300 8>;      /* CS3, offset 0x300, IO size 8 */
+               bank-width = <2>;
+               reg-shift = <1>;
+               reg-io-width = <1>;
+               interrupt-parent = <&gpio4>;
+               interrupts = <6 IRQ_TYPE_EDGE_RISING>;  /* gpio102 */
+               clock-frequency = <1843200>;
+               current-speed = <115200>;
        };
 
        ethernet@gpmc {