MIPI: 3368sdk : screen driver of tv080wum.

[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / imx51.dtsi

diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index 32b85a836fb5cf992130ce5b2f9d506b93d9d1bd..53fdde69bbf4a1254d4119629398a6f4c64ec81b 100644 (file)
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -56,6 +56,24 @@
                };
        };
 
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               cpu@0 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a8";
+                       reg = <0>;
+                       clock-latency = <61036>; /* two CLK32 periods */
+                       clocks = <&clks 24>;
+                       clock-names = "cpu";
+                       operating-points = <
+                               /* kHz  uV (No regulator support) */
+                               160000  0
+                               800000  0
+                       >;
+               };
+       };
+
        soc {
                #address-cells = <1>;
                #size-cells = <1>;
@@ -68,6 +86,9 @@
                        compatible = "fsl,imx51-ipu";
                        reg = <0x40000000 0x20000000>;
                        interrupts = <11 10>;
+                       clocks = <&clks 59>, <&clks 110>, <&clks 61>;
+                       clock-names = "bus", "di0", "di1";
+                       resets = <&src 2>;
                };
 
                aips@70000000 { /* AIPS1 */
@@ -437,6 +458,42 @@
                                        };
                                };
 
+                               pata {
+                                       pinctrl_pata_1: patagrp-1 {
+                                               fsl,pins = <
+                                                       MX51_PAD_NANDF_WE_B__PATA_DIOW          0x2004
+                                                       MX51_PAD_NANDF_RE_B__PATA_DIOR          0x2004
+                                                       MX51_PAD_NANDF_ALE__PATA_BUFFER_EN      0x2004
+                                                       MX51_PAD_NANDF_CLE__PATA_RESET_B        0x2004
+                                                       MX51_PAD_NANDF_WP_B__PATA_DMACK         0x2004
+                                                       MX51_PAD_NANDF_RB0__PATA_DMARQ          0x2004
+                                                       MX51_PAD_NANDF_RB1__PATA_IORDY          0x2004
+                                                       MX51_PAD_GPIO_NAND__PATA_INTRQ          0x2004
+                                                       MX51_PAD_NANDF_CS2__PATA_CS_0           0x2004
+                                                       MX51_PAD_NANDF_CS3__PATA_CS_1           0x2004
+                                                       MX51_PAD_NANDF_CS4__PATA_DA_0           0x2004
+                                                       MX51_PAD_NANDF_CS5__PATA_DA_1           0x2004
+                                                       MX51_PAD_NANDF_CS6__PATA_DA_2           0x2004
+                                                       MX51_PAD_NANDF_D15__PATA_DATA15         0x2004
+                                                       MX51_PAD_NANDF_D14__PATA_DATA14         0x2004
+                                                       MX51_PAD_NANDF_D13__PATA_DATA13         0x2004
+                                                       MX51_PAD_NANDF_D12__PATA_DATA12         0x2004
+                                                       MX51_PAD_NANDF_D11__PATA_DATA11         0x2004
+                                                       MX51_PAD_NANDF_D10__PATA_DATA10         0x2004
+                                                       MX51_PAD_NANDF_D9__PATA_DATA9           0x2004
+                                                       MX51_PAD_NANDF_D8__PATA_DATA8           0x2004
+                                                       MX51_PAD_NANDF_D7__PATA_DATA7           0x2004
+                                                       MX51_PAD_NANDF_D6__PATA_DATA6           0x2004
+                                                       MX51_PAD_NANDF_D5__PATA_DATA5           0x2004
+                                                       MX51_PAD_NANDF_D4__PATA_DATA4           0x2004
+                                                       MX51_PAD_NANDF_D3__PATA_DATA3           0x2004
+                                                       MX51_PAD_NANDF_D2__PATA_DATA2           0x2004
+                                                       MX51_PAD_NANDF_D1__PATA_DATA1           0x2004
+                                                       MX51_PAD_NANDF_D0__PATA_DATA0           0x2004
+                                               >;
+                                       };
+                               };
+
                                uart1 {
                                        pinctrl_uart1_1: uart1grp-1 {
                                                fsl,pins = <
@@ -527,6 +584,12 @@
                                status = "disabled";
                        };
 
+                       src: src@73fd0000 {
+                               compatible = "fsl,imx51-src";
+                               reg = <0x73fd0000 0x4000>;
+                               #reset-cells = <1>;
+                       };
+
                        clks: ccm@73fd4000{
                                compatible = "fsl,imx51-ccm";
                                reg = <0x73fd4000 0x4000>;
@@ -568,7 +631,7 @@
                                compatible = "fsl,imx51-cspi", "fsl,imx35-cspi";
                                reg = <0x83fc0000 0x4000>;
                                interrupts = <38>;
-                               clocks = <&clks 55>, <&clks 0>;
+                               clocks = <&clks 55>, <&clks 55>;
                                clock-names = "ipg", "per";
                                status = "disabled";
                        };
@@ -617,6 +680,14 @@
                                status = "disabled";
                        };
 
+                       pata: pata@83fe0000 {
+                               compatible = "fsl,imx51-pata", "fsl,imx27-pata";
+                               reg = <0x83fe0000 0x4000>;
+                               interrupts = <70>;
+                               clocks = <&clks 161>;
+                               status = "disabled";
+                       };
+
                        ssi3: ssi@83fe8000 {
                                compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
                                reg = <0x83fe8000 0x4000>;