Merge branch 'for-linville' of git://github.com/kvalo/ath

[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / imx51-apf51dev.dts

diff --git a/arch/arm/boot/dts/imx51-apf51dev.dts b/arch/arm/boot/dts/imx51-apf51dev.dts
index d3f98141462cb3eb183185c54b30ac08e9149455..c5a9a24c280a48941bf004ee7370e39ce3c23068 100644 (file)
--- a/arch/arm/boot/dts/imx51-apf51dev.dts
+++ b/arch/arm/boot/dts/imx51-apf51dev.dts
@@ -20,7 +20,7 @@
                compatible = "fsl,imx-parallel-display";
                interface-pix-fmt = "bgr666";
                pinctrl-names = "default";
-               pinctrl-0 = <&pinctrl_ipu_disp1_1>;
+               pinctrl-0 = <&pinctrl_ipu_disp1>;
 
                display-timings {
                        lw700 {
@@ -53,7 +53,7 @@
 
                user-key {
                        label = "user";
-                       gpios = <&gpio1 3 0>;
+                       gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
                        linux,code = <256>; /* BTN_0 */
                };
        };
@@ -63,7 +63,7 @@
 
                user {
                        label = "Heartbeat";
-                       gpios = <&gpio1 2 0>;
+                       gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
                        linux,default-trigger = "heartbeat";
                };
        };
@@ -71,31 +71,33 @@
 
 &ecspi1 {
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_ecspi1_1>;
+       pinctrl-0 = <&pinctrl_ecspi1>;
        fsl,spi-num-chipselects = <2>;
-       cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>;
+       cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>,
+                  <&gpio4 25 GPIO_ACTIVE_HIGH>;
        status = "okay";
 };
 
 &ecspi2 {
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_ecspi2_1>;
+       pinctrl-0 = <&pinctrl_ecspi2>;
        fsl,spi-num-chipselects = <2>;
-       cs-gpios = <&gpio3 28 1>, <&gpio3 27 1>;
+       cs-gpios = <&gpio3 28 GPIO_ACTIVE_LOW>,
+                  <&gpio3 27 GPIO_ACTIVE_LOW>;
        status = "okay";
 };
 
 &esdhc1 {
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_esdhc1_1>;
-       cd-gpios = <&gpio2 29 0>;
+       pinctrl-0 = <&pinctrl_esdhc1>;
+       cd-gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
        bus-width = <4>;
        status = "okay";
 };
 
 &esdhc2 {
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_esdhc2_1>;
+       pinctrl-0 = <&pinctrl_esdhc2>;
        bus-width = <4>;
        non-removable;
        status = "okay";
@@ -103,7 +105,7 @@
 
 &i2c2 {
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_i2c2_2>;
+       pinctrl-0 = <&pinctrl_i2c2>;
        status = "okay";
 };
 
@@ -111,7 +113,7 @@
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_hog>;
 
-       hog {
+       imx51-apf51dev {
                pinctrl_hog: hoggrp {
                        fsl,pins = <
                                MX51_PAD_EIM_EB2__GPIO2_22   0x0C5
@@ -125,6 +127,82 @@
                                MX51_PAD_GPIO1_3__GPIO1_3    0x0C5
                        >;
                };
+
+               pinctrl_ecspi1: ecspi1grp {
+                       fsl,pins = <
+                               MX51_PAD_CSPI1_MISO__ECSPI1_MISO        0x185
+                               MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI        0x185
+                               MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK        0x185
+                       >;
+               };
+
+               pinctrl_ecspi2: ecspi2grp {
+                       fsl,pins = <
+                               MX51_PAD_NANDF_RB3__ECSPI2_MISO         0x185
+                               MX51_PAD_NANDF_D15__ECSPI2_MOSI         0x185
+                               MX51_PAD_NANDF_RB2__ECSPI2_SCLK         0x185
+                       >;
+               };
+
+               pinctrl_esdhc1: esdhc1grp {
+                       fsl,pins = <
+                               MX51_PAD_SD1_CMD__SD1_CMD               0x400020d5
+                               MX51_PAD_SD1_CLK__SD1_CLK               0x20d5
+                               MX51_PAD_SD1_DATA0__SD1_DATA0           0x20d5
+                               MX51_PAD_SD1_DATA1__SD1_DATA1           0x20d5
+                               MX51_PAD_SD1_DATA2__SD1_DATA2           0x20d5
+                               MX51_PAD_SD1_DATA3__SD1_DATA3           0x20d5
+                       >;
+               };
+
+               pinctrl_esdhc2: esdhc2grp {
+                       fsl,pins = <
+                               MX51_PAD_SD2_CMD__SD2_CMD               0x400020d5
+                               MX51_PAD_SD2_CLK__SD2_CLK               0x20d5
+                               MX51_PAD_SD2_DATA0__SD2_DATA0           0x20d5
+                               MX51_PAD_SD2_DATA1__SD2_DATA1           0x20d5
+                               MX51_PAD_SD2_DATA2__SD2_DATA2           0x20d5
+                               MX51_PAD_SD2_DATA3__SD2_DATA3           0x20d5
+                       >;
+               };
+
+               pinctrl_i2c2: i2c2grp {
+                       fsl,pins = <
+                               MX51_PAD_EIM_D27__I2C2_SCL              0x400001ed
+                               MX51_PAD_EIM_D24__I2C2_SDA              0x400001ed
+                       >;
+               };
+
+               pinctrl_ipu_disp1: ipudisp1grp {
+                       fsl,pins = <
+                               MX51_PAD_DISP1_DAT0__DISP1_DAT0         0x5
+                               MX51_PAD_DISP1_DAT1__DISP1_DAT1         0x5
+                               MX51_PAD_DISP1_DAT2__DISP1_DAT2         0x5
+                               MX51_PAD_DISP1_DAT3__DISP1_DAT3         0x5
+                               MX51_PAD_DISP1_DAT4__DISP1_DAT4         0x5
+                               MX51_PAD_DISP1_DAT5__DISP1_DAT5         0x5
+                               MX51_PAD_DISP1_DAT6__DISP1_DAT6         0x5
+                               MX51_PAD_DISP1_DAT7__DISP1_DAT7         0x5
+                               MX51_PAD_DISP1_DAT8__DISP1_DAT8         0x5
+                               MX51_PAD_DISP1_DAT9__DISP1_DAT9         0x5
+                               MX51_PAD_DISP1_DAT10__DISP1_DAT10       0x5
+                               MX51_PAD_DISP1_DAT11__DISP1_DAT11       0x5
+                               MX51_PAD_DISP1_DAT12__DISP1_DAT12       0x5
+                               MX51_PAD_DISP1_DAT13__DISP1_DAT13       0x5
+                               MX51_PAD_DISP1_DAT14__DISP1_DAT14       0x5
+                               MX51_PAD_DISP1_DAT15__DISP1_DAT15       0x5
+                               MX51_PAD_DISP1_DAT16__DISP1_DAT16       0x5
+                               MX51_PAD_DISP1_DAT17__DISP1_DAT17       0x5
+                               MX51_PAD_DISP1_DAT18__DISP1_DAT18       0x5
+                               MX51_PAD_DISP1_DAT19__DISP1_DAT19       0x5
+                               MX51_PAD_DISP1_DAT20__DISP1_DAT20       0x5
+                               MX51_PAD_DISP1_DAT21__DISP1_DAT21       0x5
+                               MX51_PAD_DISP1_DAT22__DISP1_DAT22       0x5
+                               MX51_PAD_DISP1_DAT23__DISP1_DAT23       0x5
+                               MX51_PAD_DI1_PIN2__DI1_PIN2             0x5
+                               MX51_PAD_DI1_PIN3__DI1_PIN3             0x5
+                       >;
+               };
        };
 };