ARM: dts: imx27-phytec-phycore-som: Enable SSI1

[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / imx27-phytec-phycore-som.dtsi

diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi b/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi
index cefaa6994623f2a135aa7c74b65680a8a11b27dd..8e10aeff946e981d864eb2a8ca8952d9d0d3596e 100644 (file)
--- a/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi
+++ b/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi
@@ -251,6 +251,15 @@
                        >;
                };
 
+               pinctrl_ssi1: ssi1grp {
+                       fsl,pins = <
+                               MX27_PAD_SSI1_FS__SSI1_FS 0x0
+                               MX27_PAD_SSI1_RXDAT__SSI1_RXDAT 0x0
+                               MX27_PAD_SSI1_TXDAT__SSI1_TXDAT 0x0
+                               MX27_PAD_SSI1_CLK__SSI1_CLK 0x0
+                       >;
+               };
+
                pinctrl_usbotg: usbotggrp {
                        fsl,pins = <
                                MX27_PAD_USBOTG_CLK__USBOTG_CLK 0x0
@@ -279,6 +288,13 @@
        status = "okay";
 };
 
+&ssi1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_ssi1>;
+       fsl,mode = "i2s-slave";
+       status = "okay";
+};
+
 &usbotg {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_usbotg>;