ARM: dts: Adding CPU cooling binding for Exynos SoCs

[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / exynos5250.dtsi

diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 9bb1b0b738f53d2e544baa582faeec5841b16783..8496d184fca066e25755d9f95c9350ec4fb6fb34 100644 (file)
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -58,11 +58,14 @@
                #address-cells = <1>;
                #size-cells = <0>;
 
-               cpu@0 {
+               cpu0: cpu@0 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a15";
                        reg = <0>;
                        clock-frequency = <1700000000>;
+                       cooling-min-level = <15>;
+                       cooling-max-level = <9>;
+                       #cooling-cells = <2>; /* min followed by max */
                };
                cpu@1 {
                        device_type = "cpu";
@@ -243,6 +246,21 @@
                clock-names = "tmu_apbif";
        };
 
+       thermal-zones {
+               cpu_thermal: cpu-thermal {
+                       cooling-maps {
+                               map0 {
+                                    /* Corresponds to 800MHz at freq_table */
+                                    cooling-device = <&cpu0 9 9>;
+                               };
+                               map1 {
+                                    /* Corresponds to 200MHz at freq_table */
+                                    cooling-device = <&cpu0 15 15>;
+                              };
+                      };
+               };
+       };
+
        serial@12C00000 {
                clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
                clock-names = "uart", "clk_uart_baud0";