Merge remote-tracking branch 'origin/develop-3.0' into develop-3.0-jb

[firefly-linux-kernel-4.4.55.git] / arch / arm / Kconfig

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 38d4c961e5aff8ea510fe9711196cc4552214203..1e56c180cb1535edb4a6137484f4ba261d34c958 100644 (file)
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -29,6 +29,7 @@ config ARM
        select HAVE_GENERIC_HARDIRQS
        select HAVE_SPARSE_IRQ
        select GENERIC_IRQ_SHOW
+       select CPU_PM if (SUSPEND || CPU_IDLE)
        help
          The ARM series is a line of low-power-consumption RISC chip designs
          licensed by ARM Ltd and targeted at embedded applications and
@@ -859,22 +860,29 @@ config ARCH_OMAP
          Support for TI's OMAP platform (OMAP1/2/3/4).
 
 config ARCH_RK29
-       bool "Rockchip Soc Rk29"
+       bool "Rockchip RK29xx"
+       select PLAT_RK
        select CPU_V7
-       select HAVE_CLK
-       select COMMON_CLKDEV
-       select HAVE_SCHED_CLOCK
-       select ARCH_HAS_CPUFREQ
-       select GENERIC_TIME
-       select GENERIC_CLOCKEVENTS
-       select ARCH_REQUIRE_GPIOLIB
        select ARM_GIC
        select PL330
        select HIGHMEM
        select ZONE_DMA
        select ARM_L1_CACHE_SHIFT_6
        help
-         Support for Rockchip RK29 soc.
+         Support for Rockchip's RK29xx SoCs.
+
+config ARCH_RK30
+       bool "Rockchip RK30xx"
+       select PLAT_RK
+       select CPU_V7
+       select ARM_GIC
+       select RK_PL330_DMA
+       select HAVE_SMP
+       select MIGHT_HAVE_CACHE_L2X0
+       select ARM_ERRATA_764369
+       select ARM_ERRATA_754322
+       help
+         Support for Rockchip's RK30xx SoCs.
 
 config PLAT_SPEAR
        bool "ST SPEAr"
@@ -976,7 +984,9 @@ source "arch/arm/mach-mmp/Kconfig"
 
 source "arch/arm/mach-realview/Kconfig"
 
+source "arch/arm/plat-rk/Kconfig"
 source "arch/arm/mach-rk29/Kconfig"
+source "arch/arm/mach-rk30/Kconfig"
 
 source "arch/arm/mach-sa1100/Kconfig"
 
@@ -1044,6 +1054,14 @@ config PLAT_ORION
 config PLAT_PXA
        bool
 
+config PLAT_RK
+       bool
+       select CLKDEV_LOOKUP
+       select HAVE_SCHED_CLOCK
+       select ARCH_HAS_CPUFREQ
+       select GENERIC_CLOCKEVENTS
+       select ARCH_REQUIRE_GPIOLIB
+
 config PLAT_VERSATILE
        bool
 
@@ -1199,7 +1217,7 @@ config ARM_ERRATA_743622
        depends on CPU_V7
        help
          This option enables the workaround for the 743622 Cortex-A9
-         (r2p0..r2p2) erratum. Under very rare conditions, a faulty
+         (r2p*) erratum. Under very rare conditions, a faulty
          optimisation in the Cortex-A9 Store Buffer may lead to data
          corruption. This workaround sets a specific bit in the diagnostic
          register of the Cortex-A9 which disables the Store Buffer
@@ -1318,20 +1336,53 @@ source "drivers/pci/Kconfig"
 
 source "drivers/pcmcia/Kconfig"
 
+config ARM_ERRATA_764369
+       bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
+       depends on CPU_V7 && SMP
+       help
+         This option enables the workaround for erratum 764369
+         affecting Cortex-A9 MPCore with two or more processors (all
+         current revisions). Under certain timing circumstances, a data
+         cache line maintenance operation by MVA targeting an Inner
+         Shareable memory region may fail to proceed up to either the
+         Point of Coherency or to the Point of Unification of the
+         system. This workaround adds a DSB instruction before the
+         relevant cache maintenance functions and sets a specific bit
+         in the diagnostic control register of the SCU.
+
+config PL310_ERRATA_769419
+       bool "PL310 errata: no automatic Store Buffer drain"
+       depends on CACHE_L2X0
+       help
+         On revisions of the PL310 prior to r3p2, the Store Buffer does
+         not automatically drain. This can cause normal, non-cacheable
+         writes to be retained when the memory system is idle, leading
+         to suboptimal I/O performance for drivers using coherent DMA.
+         This option adds a write barrier to the cpu_idle loop so that,
+         on systems with an outer cache, the store buffer is drained
+         explicitly.
+
 endmenu
 
 menu "Kernel Features"
 
 source "kernel/time/Kconfig"
 
+config HAVE_SMP
+       bool
+       help
+         This option should be selected by machines which have an SMP-
+         capable CPU.
+
+         The only effect of this option is to make the SMP-related
+         options available to the user for configuration.
+
 config SMP
        bool "Symmetric Multi-Processing"
        depends on CPU_V6K || CPU_V7
        depends on GENERIC_CLOCKEVENTS
-       depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
-                MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
-                ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
-                ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
+       depends on HAVE_SMP
+       depends on MMU
        select USE_GENERIC_SMP_HELPERS
        select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
        help