drm: bridge: dw-hdmi: set ddc scl clock rate according to dts

[firefly-linux-kernel-4.4.55.git] / arch / arc / Kconfig

diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index 2c2ac3f3ff80370bd6bad9fffc9dfb8c8f6931e8..2d785f5a30418170db9e8f5871334df86f0ccecc 100644 (file)
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -387,7 +387,7 @@ config ARC_HAS_LLSC
 
 config ARC_STAR_9000923308
        bool "Workaround for llock/scond livelock"
-       default y
+       default n
        depends on ISA_ARCV2 && SMP && ARC_HAS_LLSC
 
 config ARC_HAS_SWAPE
@@ -445,6 +445,7 @@ config LINUX_LINK_BASE
          However some customers have peripherals mapped at this addr, so
          Linux needs to be scooted a bit.
          If you don't know what the above means, leave this setting alone.
+         This needs to match memory start address specified in Device Tree
 
 config HIGHMEM
        bool "High Memory Support"