N: Owen Anderson
E: resistor@mac.com
-D: LCSSA pass and related LoopUnswitch work, TargetData refactoring, random improvements
+D: LCSSA pass and related LoopUnswitch work
+D: GVNPRE pass, TargetData refactoring, random improvements
N: Henrik Bach
D: MingW Win32 API portability layer
N: Daniel Berlin
E: dberlin@dberlin.org
D: ET-Forest implementation.
+D: Sparse bitmap
+
+N: Neil Booth
+E: neil@daikokuya.co.uk
+D: APFloat implementation.
N: Misha Brukman
E: brukman+llvm@uiuc.edu
E: evan.cheng@apple.com
D: ARM and X86 backends
D: Instruction scheduler improvements
+D: Register allocator improvements
D: Loop optimizer improvements
D: Target-independent code generator improvements
N: John T. Criswell
E: criswell@uiuc.edu
-D: Autoconf support, QMTest database, documentation improvements
+D: Original Autoconf support, documentation improvements, bug fixes
N: Rafael Avila de Espindola
E: rafael.espindola@gmail.com
E: djg@cray.com
D: Miscellaneous bug fixes
+N: David Greene
+E: greened@obbligato.org
+D: Miscellaneous bug fixes
+D: Register allocation refactoring
+
+N: Gordon Henriksen
+E: gordonhenriksen@mac.com
+D: Pluggable GC support
+D: C interface
+D: Ocaml bindings
+
+N: Raul Fernandes Herbster
+E: raul@dsc.ufcg.edu.br
+D: JIT support for ARM
+
N: Paolo Invernizzi
E: arathorn@fastwebnet.it
D: Visual C++ compatibility fixes
N: Dale Johannesen
E: dalej@apple.com
-D: ARM constant islands improvments
+D: ARM constant islands improvements
+D: Tail merging improvements
+D: Rewrite X87 back end
+D: Use APFloat for floating point constants widely throughout compiler
+D: Implement X87 long double
N: Eric Kidd
W: http://randomhacks.net/
N: Anton Korobeynikov
E: asl@math.spbu.ru
-D: Mingw32 fixes, cross-compiling support, minor changes here and there
+D: Mingw32 fixes, cross-compiling support, stdcall/fastcall calling conv.
+D: x86/linux PIC codegen, aliases, regparm/visibility attributes
+D: Switch lowering refactoring
N: Sumant Kowshik
E: kowshik@uiuc.edu
N: Christopher Lamb
E: christopher.lamb@gmail.com
-D: aligned load/store support
+D: aligned load/store support, parts of noalias and restrict support
+D: vreg subreg infrastructure, X86 codegen improvements based on subregs
+D: address spaces
N: Jim Laskey
E: jlaskey@apple.com
W: http://nondot.org/~sabre/
D: Primary architect of LLVM
-N: Tanya Lattner (formerly Tanya Brethour)
+N: Tanya Lattner (Tanya Brethour)
E: tonic@nondot.org
W: http://nondot.org/~tonic/
D: The initial llvm-ar tool, converted regression testsuite to dejagnu
E: nicholas@mxc.ca
D: PredicateSimplifier pass
+N: Bruno Cardoso Lopes
+E: bruno.cardoso@gmail.com
+W: http://www.brunocardoso.org
+D: The Mips backend
+
N: Duraid Madina
E: duraid@octopus.com.au
W: http://kinoko.c.u-tokyo.ac.jp/~duraid/
-D: IA64 backend
+D: IA64 backend, BigBlock register allocator
N: Michael McCracken
E: michael.mccracken@gmail.com
E: wanderer@rsu.ru
D: Test suite fixes for FreeBSD
+N: Scott Michel
+E: scottm@aero.org
+D: Added STI Cell SPU backend.
+
N: Morten Ofstad
E: morten@hue.no
D: Visual C++ compatibility fixes
E: dpatel@apple.com
D: LTO tool, PassManager rewrite, Loop Pass Manager, Loop Rotate
D: GCC PCH Integration (llvm-gcc), llvm-gcc improvements
-D: Optimizer improvements
+D: Optimizer improvements, Loop Index Split
N: Vladimir Prus
W: http://vladimir_prus.blogspot.com
N: Duncan Sands
E: baldrick@free.fr
-D: Ada front-end
+D: Ada front-end, exception handling improvements
N: Ruchira Sasanka
E: sasanka@uiuc.edu
D: Graph coloring register allocator for the Sparc64 backend
+N: Arnold Schwaighofer
+E: arnold.schwaighofer@gmail.com
+D: Tail call optimization for the x86 backend
+
N: Anand Shukla
E: ashukla@cs.uiuc.edu
D: The `paths' pass
N: Reid Spencer
E: rspencer@reidspencer.com
W: http://reidspencer.com/
-D: Stacker, llvmc, llvm-ld, llvm-ar, llvm2cpp, lib/Archive, lib/Linker,
-D: lib/System, bytecode enhancements, symtab hacking, unoverloading of
-D: intrinsics, makefile and configuration system, documentation, various bug
-D: fixing.
+D: Lots of stuff, see: http://wiki.llvm.org/index.php/User:Reid
N: Adam Treat
E: manyoso@yahoo.com
D: C++ bugs filed, and C++ front-end bug fixes.
+N: Lauro Ramos Venancio
+E: lauro.venancio@indt.org.br
+D: ARM backend improvements
+D: Thread Local Storage implementation
+
N: Bill Wendling
E: isanbard@gmail.com
W: http://web.mac.com/bwendling/
-D: The `Lower Setjmp/Longjmp' pass, improvements to the -lowerswitch pass.
+D: Darwin exception handling
+D: MMX & SSSE3 instructions
+D: SPEC2006 support