(W), PGP key ID and fingerprint (P), description (D), and snail-mail address
(S).
+
N: Vikram Adve
E: vadve@cs.uiuc.edu
W: http://www.cs.uiuc.edu/~vadve/
D: ET-Forest implementation.
D: Sparse bitmap
+N: David Blaikie
+E: dblaikie@gmail.com
+D: General bug fixing/fit & finish, mostly in Clang
+
N: Neil Booth
E: neil@daikokuya.co.uk
D: APFloat implementation.
E: brukman+llvm@uiuc.edu
W: http://misha.brukman.net
D: Portions of X86 and Sparc JIT compilers, PowerPC backend
-D: Incremental bytecode loader
+D: Incremental bitcode loader
N: Cameron Buschardt
E: buschard@uiuc.edu
E: ggreif@gmail.com
D: Improvements for space efficiency
+N: James Grosbach
+E: grosbach@apple.com
+D: SjLj exception handling support
+D: General fixes and improvements for the ARM back-end
+D: MCJIT
+D: ARM integrated assembler and assembly parser
+
N: Lang Hames
E: lhames@gmail.com
D: PBQP-based register allocator
E: kungfoomaster@nondot.org
D: Support for packed types
+N: Rod Kay
+E: rkay@auroraux.org
+D: Author of LLVM Ada bindings
+
N: Eric Kidd
W: http://randomhacks.net/
D: llvm-config script
E: kowshik@uiuc.edu
D: Author of the original C backend
-N: Rod Kay
-E: rkay@auroraux.org
-D: Author of LLVM Ada bindings
+N: Benjamin Kramer
+E: benny.kra@gmail.com
+D: Miscellaneous bug fixes
N: Christopher Lamb
E: christopher.lamb@gmail.com
W: http://kinoko.c.u-tokyo.ac.jp/~duraid/
D: IA64 backend, BigBlock register allocator
+N: John McCall
+E: rjmccall@apple.com
+D: Clang semantic analysis and IR generation
+
N: Michael McCracken
E: michael.mccracken@gmail.com
D: Line number support for llvmgcc
E: scottm@aero.org
D: Added STI Cell SPU backend.
+N: Takumi Nakamura
+E: geek4civic@gmail.com
+E: chapuni@hf.rim.or.jp
+D: Cygwin and MinGW support.
+D: Win32 tweaks.
+S: Yokohama, Japan
+
N: Edward O'Callaghan
E: eocallaghan@auroraux.org
W: http://www.auroraux.org
E: stoklund@2pi.dk
D: Machine code verifier
D: Blackfin backend
+D: Fast register allocator
+D: Greedy register allocator
N: Richard Osborne
E: richard@xmos.com
D: GCC PCH Integration (llvm-gcc), llvm-gcc improvements
D: Optimizer improvements, Loop Index Split
+N: Sandeep Patel
+E: deeppatel1987@gmail.com
+D: ARM calling conventions rewrite, hard float support
+
+N: Wesley Peck
+E: peckw@wesleypeck.com
+W: http://wesleypeck.com/
+D: MicroBlaze backend
+
+N: Francois Pichet
+E: pichet2000@gmail.com
+D: MSVC support
+
N: Vladimir Prus
W: http://vladimir_prus.blogspot.com
E: ghost@cs.msu.su
N: Duncan Sands
E: baldrick@free.fr
-D: Ada front-end, exception handling improvements
+D: Ada support in llvm-gcc
+D: Dragonegg plugin
+D: Exception handling improvements
+D: Type legalizer rewrite
N: Ruchira Sasanka
E: sasanka@uiuc.edu
E: ashukla@cs.uiuc.edu
D: The `paths' pass
+N: Michael J. Spencer
+E: bigcheesegs@gmail.com
+D: Shepherding Windows COFF support into MC.
+D: Lots of Windows stuff.
+
N: Reid Spencer
E: rspencer@reidspencer.com
W: http://reidspencer.com/
E: xerxes@zafena.se
D: Cmake dependency chain and various bug fixes
+N: Nadav Rotem
+E: nadav.rotem@intel.com
+D: Vector code generation improvements.
+
N: Bill Wendling
-E: isanbard@gmail.com
+E: wendling@apple.com
D: Bunches of stuff
N: Bob Wilson