- // Add move instruction(s)
- return RegInfo->storeReg2RegOffset(MBB, I, PhysReg,
- RegInfo->getFramePointer(),
- offset, regClass->getDataSize());
-}
-
-bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
- cleanupAfterFunction();
-
- unsigned virtualReg, physReg;
- DEBUG(std::cerr << "Machine Function " << "\n");
- MF = &Fn;
-
- for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
- MBB != MBBe; ++MBB)
- {
- CurrMBB = &(*MBB);
-
- // Handle PHI instructions specially: add moves to each pred block
- while (MBB->front()->getOpcode() == 0) {
- MachineInstr *MI = MBB->front();
- // get rid of the phi
- MBB->erase(MBB->begin());
-
- // a preliminary pass that will invalidate any registers that
- // are used by the instruction (including implicit uses)
- invalidatePhysRegs(MI);
-
- DEBUG(std::cerr << "num invalid regs: " << RegsUsed.size() << "\n");
-
- DEBUG(std::cerr << "num ops: " << MI->getNumOperands() << "\n");
- MachineOperand &targetReg = MI->getOperand(0);
-
- // If it's a virtual register, allocate a physical one
- // otherwise, just use whatever register is there now
- // note: it MUST be a register -- we're assigning to it
- virtualReg = (unsigned) targetReg.getAllocatedRegNum();
- if (targetReg.isVirtualRegister()) {
- physReg = getFreeReg(virtualReg);
- } else {
- physReg = virtualReg;
- }
-
- // Find the register class of the target register: should be the
- // same as the values we're trying to store there
- const TargetRegisterClass* regClass = PhysRegClasses[physReg];
- assert(regClass && "Target register class not found!");
- unsigned dataSize = regClass->getDataSize();
-
- for (int i = MI->getNumOperands() - 1; i >= 2; i-=2) {
- MachineOperand &opVal = MI->getOperand(i-1);
-
- // Get the MachineBasicBlock equivalent of the BasicBlock that is the
- // source path the phi
- MachineBasicBlock *opBlock = MI->getOperand(i).getMachineBasicBlock();
- MachineBasicBlock::iterator opI = opBlock->end();
- MachineInstr *opMI = *(--opI);
- const MachineInstrInfo &MII = TM.getInstrInfo();
- // must backtrack over ALL the branches in the previous block, until no more
- while ((MII.isBranch(opMI->getOpcode()) || MII.isReturn(opMI->getOpcode()))
- && opI != opBlock->begin())
- {
- opMI = *(--opI);
- }
- // move back to the first branch instruction so new instructions
- // are inserted right in front of it and not in front of a non-branch
- ++opI;
-
-
- // Retrieve the constant value from this op, move it to target
- // register of the phi
- if (opVal.getType() == MachineOperand::MO_SignExtendedImmed ||
- opVal.getType() == MachineOperand::MO_UnextendedImmed)
- {
- opI = RegInfo->moveImm2Reg(opBlock, opI, physReg,
- (unsigned) opVal.getImmedValue(),
- dataSize);
- saveVirtRegToStack(opBlock, opI, virtualReg, physReg);
- } else {
- // Allocate a physical register and add a move in the BB
- unsigned opVirtualReg = (unsigned) opVal.getAllocatedRegNum();
- unsigned opPhysReg; // = getFreeReg(opVirtualReg);
- opI = moveUseToReg(opBlock, opI, opVirtualReg, physReg);
- //opI = RegInfo->moveReg2Reg(opBlock, opI, physReg, opPhysReg,
- // dataSize);
- // Save that register value to the stack of the TARGET REG
- saveVirtRegToStack(opBlock, opI, virtualReg, physReg);
- }
+void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
+ // loop over each instruction
+ for (MachineBasicBlock::iterator MI = MBB.begin(); MI != MBB.end(); ++MI) {
+ // Made to combat the incorrect allocation of r2 = add r1, r1
+ std::map<unsigned, unsigned> Virt2PhysRegMap;
+
+ RegsUsed.resize(RegInfo->getNumRegs());
+
+ // This is a preliminary pass that will invalidate any registers that are
+ // used by the instruction (including implicit uses).
+ unsigned Opcode = MI->getOpcode();
+ const TargetInstrDescriptor &Desc = TM->getInstrInfo()->get(Opcode);
+ const unsigned *Regs;
+ if (Desc.ImplicitUses) {
+ for (Regs = Desc.ImplicitUses; *Regs; ++Regs)
+ RegsUsed[*Regs] = true;
+ }