+ __cpuid(static_cast<int*>(reg), 0);
+ const int n = reg[0];
+ if (n >= 1) {
+ __cpuid(static_cast<int*>(reg), 1);
+ f1c_ = uint32_t(reg[2]);
+ f1d_ = uint32_t(reg[3]);
+ }
+ if (n >= 7) {
+ __cpuidex(static_cast<int*>(reg), 7, 0);
+ f7b_ = uint32_t(reg[1]);
+ f7c_ = uint32_t(reg[2]);
+ }
+#elif defined(__i386__) && defined(__PIC__) && !defined(__clang__) && \
+ defined(__GNUC__)
+ // The following block like the normal cpuid branch below, but gcc
+ // reserves ebx for use of its pic register so we must specially
+ // handle the save and restore to avoid clobbering the register
+ uint32_t n;
+ __asm__(
+ "pushl %%ebx\n\t"
+ "cpuid\n\t"
+ "popl %%ebx\n\t"
+ : "=a"(n)
+ : "a"(0)
+ : "ecx", "edx");
+ if (n >= 1) {
+ uint32_t f1a;
+ __asm__(
+ "pushl %%ebx\n\t"
+ "cpuid\n\t"
+ "popl %%ebx\n\t"
+ : "=a"(f1a), "=c"(f1c_), "=d"(f1d_)
+ : "a"(1)
+ :);
+ }
+ if (n >= 7) {
+ __asm__(
+ "pushl %%ebx\n\t"
+ "cpuid\n\t"
+ "movl %%ebx, %%eax\n\r"
+ "popl %%ebx"
+ : "=a"(f7b_), "=c"(f7c_)
+ : "a"(7), "c"(0)
+ : "edx");
+ }