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usb: dwc_otg_310: fix usb vbus power controlled by pmic
[firefly-linux-kernel-4.4.55.git]
/
Documentation
/
devicetree
/
bindings
/
usb
/
rockchip-usb.txt
diff --git
a/Documentation/devicetree/bindings/usb/rockchip-usb.txt
b/Documentation/devicetree/bindings/usb/rockchip-usb.txt
index cf8009b3c168dc4cd8e5477cf8865782a29ea5bf..c6c25aaa18ea176ec0df4dc1ab089e4a43f77d51 100644
(file)
--- a/
Documentation/devicetree/bindings/usb/rockchip-usb.txt
+++ b/
Documentation/devicetree/bindings/usb/rockchip-usb.txt
@@
-18,6
+18,10
@@
Required properties:
"1" represents that force otg to host only mode,
"2" represents that force otg to device only mode.
"1" represents that force otg to host only mode,
"2" represents that force otg to device only mode.
+Optional properties:
+ - rockchip,usb-pmic-vbus: If present, OTG VBUS 5V is supplied
+ from PMIC.
+
Example:
- RK3288
Example:
- RK3288
@@
-102,10
+106,10
@@
Example:
};
};
-HSIC
+EHCI1
Required properties:
Required properties:
- - compatible : Should be "rockchip,rk3188_rk_
hsic
_host" or
- "rockchip,rk3288_rk_
hsic
_host" and so on, depending upon
+ - compatible : Should be "rockchip,rk3188_rk_
ehci
_host" or
+ "rockchip,rk3288_rk_
ehci1
_host" and so on, depending upon
the SoC.
- reg : Physical base address of the controller and
length of memory mapped region.
the SoC.
- reg : Physical base address of the controller and
length of memory mapped region.
@@
-117,16
+121,16
@@
Required properties:
Example:
- RK3288
Example:
- RK3288
-
hsic: hsic
@ff5c0000 {
- compatible = "rockchip,rk3288_rk_
hsic
_host";
+
usb4: usb
@ff5c0000 {
+ compatible = "rockchip,rk3288_rk_
ehci1
_host";
reg = <0xff5c0000 0x40000>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
reg = <0xff5c0000 0x40000>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&
hsic
phy_480m>, <&clk_gates7 8>,
- <&
hsic
phy_12m>, <&usbphy_480m>,
+ clocks = <&
ehci1
phy_480m>, <&clk_gates7 8>,
+ <&
ehci1
phy_12m>, <&usbphy_480m>,
<&otgphy1_480m>, <&otgphy2_480m>;
<&otgphy1_480m>, <&otgphy2_480m>;
- clock-names = "
hsicphy_480m", "hclk_hsic
",
- "
hsic
phy_12m", "usbphy_480m",
- "
hsic_usbphy1", "hsic
_usbphy2";
+ clock-names = "
ehci1phy_480m", "hclk_ehci1
",
+ "
ehci1
phy_12m", "usbphy_480m",
+ "
ehci1_usbphy1", "ehci1
_usbphy2";
};
ROCKCHIP USB-PHY CONTROL
};
ROCKCHIP USB-PHY CONTROL