1 //===- X86DisassemblerShared.h - Emitter shared header ----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #ifndef X86DISASSEMBLERSHARED_H
11 #define X86DISASSEMBLERSHARED_H
16 #include "../../lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h"
18 struct InstructionSpecifier {
19 llvm::X86Disassembler::OperandSpecifier operands[X86_MAX_OPERANDS];
20 llvm::X86Disassembler::InstructionContext insnContext;
23 InstructionSpecifier() {
24 insnContext = llvm::X86Disassembler::IC;
26 memset(operands, 0, sizeof(operands));
30 /// Specifies whether a ModR/M byte is needed and (if so) which
31 /// instruction each possible value of the ModR/M byte corresponds to. Once
32 /// this information is known, we have narrowed down to a single instruction.
33 struct ModRMDecision {
35 llvm::X86Disassembler::InstrUID instructionIDs[256];
38 /// Specifies which set of ModR/M->instruction tables to look at
39 /// given a particular opcode.
40 struct OpcodeDecision {
41 ModRMDecision modRMDecisions[256];
44 /// Specifies which opcode->instruction tables to look at given
45 /// a particular context (set of attributes). Since there are many possible
46 /// contexts, the decoder first uses CONTEXTS_SYM to determine which context
47 /// applies given a specific set of attributes. Hence there are only IC_max
48 /// entries in this table, rather than 2^(ATTR_max).
49 struct ContextDecision {
50 OpcodeDecision opcodeDecisions[llvm::X86Disassembler::IC_max];