1 //===- CodeGenTarget.h - Target Class Wrapper -------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines wrappers for the Target class and related global
11 // functionality. This makes it easier to access the data and provides a single
12 // place that needs to check it for validity. All of these classes throw
13 // exceptions on error conditions.
15 //===----------------------------------------------------------------------===//
17 #ifndef CODEGEN_TARGET_H
18 #define CODEGEN_TARGET_H
20 #include "CodeGenRegisters.h"
21 #include "CodeGenInstruction.h"
23 #include "llvm/Support/raw_ostream.h"
28 struct CodeGenRegister;
31 // SelectionDAG node properties.
32 // SDNPMemOperand: indicates that a node touches memory and therefore must
33 // have an associated memory operand that describes the access.
50 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen
51 /// record corresponds to.
52 MVT::SimpleValueType getValueType(Record *Rec);
54 std::string getName(MVT::SimpleValueType T);
55 std::string getEnumName(MVT::SimpleValueType T);
57 /// getQualifiedName - Return the name of the specified record, with a
58 /// namespace qualifier if the record contains one.
59 std::string getQualifiedName(const Record *R);
61 /// CodeGenTarget - This class corresponds to the Target class in the .td files.
64 RecordKeeper &Records;
67 mutable DenseMap<const Record*, CodeGenInstruction*> Instructions;
68 mutable CodeGenRegBank *RegBank;
69 mutable std::vector<CodeGenRegister> Registers;
70 mutable std::vector<CodeGenRegisterClass> RegisterClasses;
71 mutable std::vector<MVT::SimpleValueType> LegalValueTypes;
72 void ReadRegisters() const;
73 void ReadRegisterClasses() const;
74 void ReadInstructions() const;
75 void ReadLegalValueTypes() const;
77 mutable std::vector<const CodeGenInstruction*> InstrsByEnum;
79 CodeGenTarget(RecordKeeper &Records);
81 Record *getTargetRecord() const { return TargetRec; }
82 const std::string &getName() const;
84 /// getInstNamespace - Return the target-specific instruction namespace.
86 std::string getInstNamespace() const;
88 /// getInstructionSet - Return the InstructionSet object.
90 Record *getInstructionSet() const;
92 /// getAsmParser - Return the AssemblyParser definition for this target.
94 Record *getAsmParser() const;
96 /// getAsmWriter - Return the AssemblyWriter definition for this target.
98 Record *getAsmWriter() const;
100 /// getRegBank - Return the register bank description.
101 CodeGenRegBank &getRegBank() const;
103 const std::vector<CodeGenRegister> &getRegisters() const {
104 if (Registers.empty()) ReadRegisters();
108 /// getRegisterByName - If there is a register with the specific AsmName,
110 const CodeGenRegister *getRegisterByName(StringRef Name) const;
112 const std::vector<CodeGenRegisterClass> &getRegisterClasses() const {
113 if (RegisterClasses.empty()) ReadRegisterClasses();
114 return RegisterClasses;
117 const CodeGenRegisterClass &getRegisterClass(Record *R) const {
118 const std::vector<CodeGenRegisterClass> &RC = getRegisterClasses();
119 for (unsigned i = 0, e = RC.size(); i != e; ++i)
120 if (RC[i].TheDef == R)
122 assert(0 && "Didn't find the register class");
126 /// getRegisterClassForRegister - Find the register class that contains the
127 /// specified physical register. If the register is not in a register
128 /// class, return null. If the register is in multiple classes, and the
129 /// classes have a superset-subset relationship and the same set of
130 /// types, return the superclass. Otherwise return null.
131 const CodeGenRegisterClass *getRegisterClassForRegister(Record *R) const {
132 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
133 const CodeGenRegisterClass *FoundRC = 0;
134 for (unsigned i = 0, e = RCs.size(); i != e; ++i) {
135 const CodeGenRegisterClass &RC = RegisterClasses[i];
136 for (unsigned ei = 0, ee = RC.Elements.size(); ei != ee; ++ei) {
137 if (R != RC.Elements[ei])
140 // If a register's classes have different types, return null.
141 if (FoundRC && RC.getValueTypes() != FoundRC->getValueTypes())
144 // If this is the first class that contains the register,
145 // make a note of it and go on to the next class.
151 std::vector<Record *> Elements(RC.Elements);
152 std::vector<Record *> FoundElements(FoundRC->Elements);
153 std::sort(Elements.begin(), Elements.end());
154 std::sort(FoundElements.begin(), FoundElements.end());
156 // Check to see if the previously found class that contains
157 // the register is a subclass of the current class. If so,
158 // prefer the superclass.
159 if (std::includes(Elements.begin(), Elements.end(),
160 FoundElements.begin(), FoundElements.end())) {
165 // Check to see if the previously found class that contains
166 // the register is a superclass of the current class. If so,
167 // prefer the superclass.
168 if (std::includes(FoundElements.begin(), FoundElements.end(),
169 Elements.begin(), Elements.end()))
172 // Multiple classes, and neither is a superclass of the other.
180 /// getRegisterVTs - Find the union of all possible SimpleValueTypes for the
181 /// specified physical register.
182 std::vector<MVT::SimpleValueType> getRegisterVTs(Record *R) const;
184 const std::vector<MVT::SimpleValueType> &getLegalValueTypes() const {
185 if (LegalValueTypes.empty()) ReadLegalValueTypes();
186 return LegalValueTypes;
189 /// isLegalValueType - Return true if the specified value type is natively
190 /// supported by the target (i.e. there are registers that directly hold it).
191 bool isLegalValueType(MVT::SimpleValueType VT) const {
192 const std::vector<MVT::SimpleValueType> &LegalVTs = getLegalValueTypes();
193 for (unsigned i = 0, e = LegalVTs.size(); i != e; ++i)
194 if (LegalVTs[i] == VT) return true;
199 DenseMap<const Record*, CodeGenInstruction*> &getInstructions() const {
200 if (Instructions.empty()) ReadInstructions();
205 CodeGenInstruction &getInstruction(const Record *InstRec) const {
206 if (Instructions.empty()) ReadInstructions();
207 DenseMap<const Record*, CodeGenInstruction*>::iterator I =
208 Instructions.find(InstRec);
209 assert(I != Instructions.end() && "Not an instruction");
213 /// getInstructionsByEnumValue - Return all of the instructions defined by the
214 /// target, ordered by their enum value.
215 const std::vector<const CodeGenInstruction*> &
216 getInstructionsByEnumValue() const {
217 if (InstrsByEnum.empty()) ComputeInstrsByEnum();
221 typedef std::vector<const CodeGenInstruction*>::const_iterator inst_iterator;
222 inst_iterator inst_begin() const{return getInstructionsByEnumValue().begin();}
223 inst_iterator inst_end() const { return getInstructionsByEnumValue().end(); }
226 /// isLittleEndianEncoding - are instruction bit patterns defined as [0..n]?
228 bool isLittleEndianEncoding() const;
231 void ComputeInstrsByEnum() const;
234 /// ComplexPattern - ComplexPattern info, corresponding to the ComplexPattern
235 /// tablegen class in TargetSelectionDAG.td
236 class ComplexPattern {
237 MVT::SimpleValueType Ty;
238 unsigned NumOperands;
239 std::string SelectFunc;
240 std::vector<Record*> RootNodes;
241 unsigned Properties; // Node properties
243 ComplexPattern() : NumOperands(0) {}
244 ComplexPattern(Record *R);
246 MVT::SimpleValueType getValueType() const { return Ty; }
247 unsigned getNumOperands() const { return NumOperands; }
248 const std::string &getSelectFunc() const { return SelectFunc; }
249 const std::vector<Record*> &getRootNodes() const {
252 bool hasProperty(enum SDNP Prop) const { return Properties & (1 << Prop); }
255 } // End llvm namespace