1 //===- CodeGenTarget.h - Target Class Wrapper -------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines wrappers for the Target class and related global
11 // functionality. This makes it easier to access the data and provides a single
12 // place that needs to check it for validity. All of these classes throw
13 // exceptions on error conditions.
15 //===----------------------------------------------------------------------===//
17 #ifndef CODEGEN_TARGET_H
18 #define CODEGEN_TARGET_H
20 #include "CodeGenRegisters.h"
21 #include "CodeGenInstruction.h"
22 #include "llvm/TableGen/Record.h"
23 #include "llvm/Support/raw_ostream.h"
28 struct CodeGenRegister;
31 // SelectionDAG node properties.
32 // SDNPMemOperand: indicates that a node touches memory and therefore must
33 // have an associated memory operand that describes the access.
50 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen
51 /// record corresponds to.
52 MVT::SimpleValueType getValueType(Record *Rec);
54 std::string getName(MVT::SimpleValueType T);
55 std::string getEnumName(MVT::SimpleValueType T);
57 /// getQualifiedName - Return the name of the specified record, with a
58 /// namespace qualifier if the record contains one.
59 std::string getQualifiedName(const Record *R);
61 /// CodeGenTarget - This class corresponds to the Target class in the .td files.
64 RecordKeeper &Records;
67 mutable DenseMap<const Record*, CodeGenInstruction*> Instructions;
68 mutable CodeGenRegBank *RegBank;
69 mutable std::vector<Record*> RegAltNameIndices;
70 mutable std::vector<MVT::SimpleValueType> LegalValueTypes;
71 void ReadRegAltNameIndices() const;
72 void ReadInstructions() const;
73 void ReadLegalValueTypes() const;
75 mutable std::vector<const CodeGenInstruction*> InstrsByEnum;
77 CodeGenTarget(RecordKeeper &Records);
79 Record *getTargetRecord() const { return TargetRec; }
80 const std::string &getName() const;
82 /// getInstNamespace - Return the target-specific instruction namespace.
84 std::string getInstNamespace() const;
86 /// getInstructionSet - Return the InstructionSet object.
88 Record *getInstructionSet() const;
90 /// getAsmParser - Return the AssemblyParser definition for this target.
92 Record *getAsmParser() const;
94 /// getAsmWriter - Return the AssemblyWriter definition for this target.
96 Record *getAsmWriter() const;
98 /// getRegBank - Return the register bank description.
99 CodeGenRegBank &getRegBank() const;
101 /// getRegisterByName - If there is a register with the specific AsmName,
103 const CodeGenRegister *getRegisterByName(StringRef Name) const;
105 const std::vector<Record*> &getRegAltNameIndices() const {
106 if (RegAltNameIndices.empty()) ReadRegAltNameIndices();
107 return RegAltNameIndices;
110 const CodeGenRegisterClass &getRegisterClass(Record *R) const {
111 return *getRegBank().getRegClass(R);
114 /// getRegisterVTs - Find the union of all possible SimpleValueTypes for the
115 /// specified physical register.
116 std::vector<MVT::SimpleValueType> getRegisterVTs(Record *R) const;
118 const std::vector<MVT::SimpleValueType> &getLegalValueTypes() const {
119 if (LegalValueTypes.empty()) ReadLegalValueTypes();
120 return LegalValueTypes;
123 /// isLegalValueType - Return true if the specified value type is natively
124 /// supported by the target (i.e. there are registers that directly hold it).
125 bool isLegalValueType(MVT::SimpleValueType VT) const {
126 const std::vector<MVT::SimpleValueType> &LegalVTs = getLegalValueTypes();
127 for (unsigned i = 0, e = LegalVTs.size(); i != e; ++i)
128 if (LegalVTs[i] == VT) return true;
133 DenseMap<const Record*, CodeGenInstruction*> &getInstructions() const {
134 if (Instructions.empty()) ReadInstructions();
139 CodeGenInstruction &getInstruction(const Record *InstRec) const {
140 if (Instructions.empty()) ReadInstructions();
141 DenseMap<const Record*, CodeGenInstruction*>::iterator I =
142 Instructions.find(InstRec);
143 assert(I != Instructions.end() && "Not an instruction");
147 /// getInstructionsByEnumValue - Return all of the instructions defined by the
148 /// target, ordered by their enum value.
149 const std::vector<const CodeGenInstruction*> &
150 getInstructionsByEnumValue() const {
151 if (InstrsByEnum.empty()) ComputeInstrsByEnum();
155 typedef std::vector<const CodeGenInstruction*>::const_iterator inst_iterator;
156 inst_iterator inst_begin() const{return getInstructionsByEnumValue().begin();}
157 inst_iterator inst_end() const { return getInstructionsByEnumValue().end(); }
160 /// isLittleEndianEncoding - are instruction bit patterns defined as [0..n]?
162 bool isLittleEndianEncoding() const;
165 void ComputeInstrsByEnum() const;
168 /// ComplexPattern - ComplexPattern info, corresponding to the ComplexPattern
169 /// tablegen class in TargetSelectionDAG.td
170 class ComplexPattern {
171 MVT::SimpleValueType Ty;
172 unsigned NumOperands;
173 std::string SelectFunc;
174 std::vector<Record*> RootNodes;
175 unsigned Properties; // Node properties
177 ComplexPattern() : NumOperands(0) {}
178 ComplexPattern(Record *R);
180 MVT::SimpleValueType getValueType() const { return Ty; }
181 unsigned getNumOperands() const { return NumOperands; }
182 const std::string &getSelectFunc() const { return SelectFunc; }
183 const std::vector<Record*> &getRootNodes() const {
186 bool hasProperty(enum SDNP Prop) const { return Properties & (1 << Prop); }
189 } // End llvm namespace