1 //===- CodeGenTarget.cpp - CodeGen Target Class Wrapper -------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This class wraps target description classes used by the various code
11 // generation TableGen backends. This makes it easier to access the data and
12 // provides a single place that needs to check it for validity. All of these
13 // classes throw exceptions on error conditions.
15 //===----------------------------------------------------------------------===//
17 #include "CodeGenTarget.h"
18 #include "CodeGenIntrinsics.h"
20 #include "llvm/ADT/StringExtras.h"
21 #include "llvm/Support/CommandLine.h"
25 static cl::opt<unsigned>
26 AsmParserNum("asmparsernum", cl::init(0),
27 cl::desc("Make -gen-asm-parser emit assembly parser #N"));
29 static cl::opt<unsigned>
30 AsmWriterNum("asmwriternum", cl::init(0),
31 cl::desc("Make -gen-asm-writer emit assembly writer #N"));
33 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen
34 /// record corresponds to.
35 MVT::SimpleValueType llvm::getValueType(Record *Rec) {
36 return (MVT::SimpleValueType)Rec->getValueAsInt("Value");
39 std::string llvm::getName(MVT::SimpleValueType T) {
41 case MVT::Other: return "UNKNOWN";
42 case MVT::iPTR: return "TLI.getPointerTy()";
43 case MVT::iPTRAny: return "TLI.getPointerTy()";
44 default: return getEnumName(T);
48 std::string llvm::getEnumName(MVT::SimpleValueType T) {
50 case MVT::Other: return "MVT::Other";
51 case MVT::i1: return "MVT::i1";
52 case MVT::i8: return "MVT::i8";
53 case MVT::i16: return "MVT::i16";
54 case MVT::i32: return "MVT::i32";
55 case MVT::i64: return "MVT::i64";
56 case MVT::i128: return "MVT::i128";
57 case MVT::iAny: return "MVT::iAny";
58 case MVT::fAny: return "MVT::fAny";
59 case MVT::vAny: return "MVT::vAny";
60 case MVT::f32: return "MVT::f32";
61 case MVT::f64: return "MVT::f64";
62 case MVT::f80: return "MVT::f80";
63 case MVT::f128: return "MVT::f128";
64 case MVT::ppcf128: return "MVT::ppcf128";
65 case MVT::Flag: return "MVT::Flag";
66 case MVT::isVoid:return "MVT::isVoid";
67 case MVT::v2i8: return "MVT::v2i8";
68 case MVT::v4i8: return "MVT::v4i8";
69 case MVT::v8i8: return "MVT::v8i8";
70 case MVT::v16i8: return "MVT::v16i8";
71 case MVT::v32i8: return "MVT::v32i8";
72 case MVT::v2i16: return "MVT::v2i16";
73 case MVT::v4i16: return "MVT::v4i16";
74 case MVT::v8i16: return "MVT::v8i16";
75 case MVT::v16i16: return "MVT::v16i16";
76 case MVT::v2i32: return "MVT::v2i32";
77 case MVT::v4i32: return "MVT::v4i32";
78 case MVT::v8i32: return "MVT::v8i32";
79 case MVT::v1i64: return "MVT::v1i64";
80 case MVT::v2i64: return "MVT::v2i64";
81 case MVT::v4i64: return "MVT::v4i64";
82 case MVT::v2f32: return "MVT::v2f32";
83 case MVT::v4f32: return "MVT::v4f32";
84 case MVT::v8f32: return "MVT::v8f32";
85 case MVT::v2f64: return "MVT::v2f64";
86 case MVT::v4f64: return "MVT::v4f64";
87 case MVT::Metadata: return "MVT::Metadata";
88 case MVT::iPTR: return "MVT::iPTR";
89 case MVT::iPTRAny: return "MVT::iPTRAny";
90 default: assert(0 && "ILLEGAL VALUE TYPE!"); return "";
94 /// getQualifiedName - Return the name of the specified record, with a
95 /// namespace qualifier if the record contains one.
97 std::string llvm::getQualifiedName(const Record *R) {
98 std::string Namespace = R->getValueAsString("Namespace");
99 if (Namespace.empty()) return R->getName();
100 return Namespace + "::" + R->getName();
106 /// getTarget - Return the current instance of the Target class.
108 CodeGenTarget::CodeGenTarget() {
109 std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target");
110 if (Targets.size() == 0)
111 throw std::string("ERROR: No 'Target' subclasses defined!");
112 if (Targets.size() != 1)
113 throw std::string("ERROR: Multiple subclasses of Target defined!");
114 TargetRec = Targets[0];
118 const std::string &CodeGenTarget::getName() const {
119 return TargetRec->getName();
122 std::string CodeGenTarget::getInstNamespace() const {
125 for (inst_iterator i = inst_begin(), e = inst_end(); i != e; ++i) {
126 InstNS = i->second.Namespace;
128 // Make sure not to pick up "TargetInstrInfo" by accidentally getting
129 // the namespace off the PHI instruction or something.
130 if (InstNS != "TargetInstrInfo")
137 Record *CodeGenTarget::getInstructionSet() const {
138 return TargetRec->getValueAsDef("InstructionSet");
142 CodeGenInstruction &CodeGenTarget::getInstruction(const Record *InstRec) const {
143 return getInstruction(InstRec->getName());
147 /// getAsmParser - Return the AssemblyParser definition for this target.
149 Record *CodeGenTarget::getAsmParser() const {
150 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyParsers");
151 if (AsmParserNum >= LI.size())
152 throw "Target does not have an AsmParser #" + utostr(AsmParserNum) + "!";
153 return LI[AsmParserNum];
156 /// getAsmWriter - Return the AssemblyWriter definition for this target.
158 Record *CodeGenTarget::getAsmWriter() const {
159 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters");
160 if (AsmWriterNum >= LI.size())
161 throw "Target does not have an AsmWriter #" + utostr(AsmWriterNum) + "!";
162 return LI[AsmWriterNum];
165 void CodeGenTarget::ReadRegisters() const {
166 std::vector<Record*> Regs = Records.getAllDerivedDefinitions("Register");
168 throw std::string("No 'Register' subclasses defined!");
170 Registers.reserve(Regs.size());
171 Registers.assign(Regs.begin(), Regs.end());
174 CodeGenRegister::CodeGenRegister(Record *R) : TheDef(R) {
175 DeclaredSpillSize = R->getValueAsInt("SpillSize");
176 DeclaredSpillAlignment = R->getValueAsInt("SpillAlignment");
179 const std::string &CodeGenRegister::getName() const {
180 return TheDef->getName();
183 void CodeGenTarget::ReadRegisterClasses() const {
184 std::vector<Record*> RegClasses =
185 Records.getAllDerivedDefinitions("RegisterClass");
186 if (RegClasses.empty())
187 throw std::string("No 'RegisterClass' subclasses defined!");
189 RegisterClasses.reserve(RegClasses.size());
190 RegisterClasses.assign(RegClasses.begin(), RegClasses.end());
193 std::vector<MVT::SimpleValueType> CodeGenTarget::
194 getRegisterVTs(Record *R) const {
195 std::vector<MVT::SimpleValueType> Result;
196 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
197 for (unsigned i = 0, e = RCs.size(); i != e; ++i) {
198 const CodeGenRegisterClass &RC = RegisterClasses[i];
199 for (unsigned ei = 0, ee = RC.Elements.size(); ei != ee; ++ei) {
200 if (R == RC.Elements[ei]) {
201 const std::vector<MVT::SimpleValueType> &InVTs = RC.getValueTypes();
202 Result.insert(Result.end(), InVTs.begin(), InVTs.end());
210 CodeGenRegisterClass::CodeGenRegisterClass(Record *R) : TheDef(R) {
211 // Rename anonymous register classes.
212 if (R->getName().size() > 9 && R->getName()[9] == '.') {
213 static unsigned AnonCounter = 0;
214 R->setName("AnonRegClass_"+utostr(AnonCounter++));
217 std::vector<Record*> TypeList = R->getValueAsListOfDefs("RegTypes");
218 for (unsigned i = 0, e = TypeList.size(); i != e; ++i) {
219 Record *Type = TypeList[i];
220 if (!Type->isSubClassOf("ValueType"))
221 throw "RegTypes list member '" + Type->getName() +
222 "' does not derive from the ValueType class!";
223 VTs.push_back(getValueType(Type));
225 assert(!VTs.empty() && "RegisterClass must contain at least one ValueType!");
227 std::vector<Record*> RegList = R->getValueAsListOfDefs("MemberList");
228 for (unsigned i = 0, e = RegList.size(); i != e; ++i) {
229 Record *Reg = RegList[i];
230 if (!Reg->isSubClassOf("Register"))
231 throw "Register Class member '" + Reg->getName() +
232 "' does not derive from the Register class!";
233 Elements.push_back(Reg);
236 std::vector<Record*> SubRegClassList =
237 R->getValueAsListOfDefs("SubRegClassList");
238 for (unsigned i = 0, e = SubRegClassList.size(); i != e; ++i) {
239 Record *SubRegClass = SubRegClassList[i];
240 if (!SubRegClass->isSubClassOf("RegisterClass"))
241 throw "Register Class member '" + SubRegClass->getName() +
242 "' does not derive from the RegisterClass class!";
243 SubRegClasses.push_back(SubRegClass);
246 // Allow targets to override the size in bits of the RegisterClass.
247 unsigned Size = R->getValueAsInt("Size");
249 Namespace = R->getValueAsString("Namespace");
250 SpillSize = Size ? Size : EVT(VTs[0]).getSizeInBits();
251 SpillAlignment = R->getValueAsInt("Alignment");
252 CopyCost = R->getValueAsInt("CopyCost");
253 MethodBodies = R->getValueAsCode("MethodBodies");
254 MethodProtos = R->getValueAsCode("MethodProtos");
257 const std::string &CodeGenRegisterClass::getName() const {
258 return TheDef->getName();
261 void CodeGenTarget::ReadLegalValueTypes() const {
262 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
263 for (unsigned i = 0, e = RCs.size(); i != e; ++i)
264 for (unsigned ri = 0, re = RCs[i].VTs.size(); ri != re; ++ri)
265 LegalValueTypes.push_back(RCs[i].VTs[ri]);
267 // Remove duplicates.
268 std::sort(LegalValueTypes.begin(), LegalValueTypes.end());
269 LegalValueTypes.erase(std::unique(LegalValueTypes.begin(),
270 LegalValueTypes.end()),
271 LegalValueTypes.end());
275 void CodeGenTarget::ReadInstructions() const {
276 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
277 if (Insts.size() <= 2)
278 throw std::string("No 'Instruction' subclasses defined!");
280 // Parse the instructions defined in the .td file.
281 std::string InstFormatName =
282 getAsmWriter()->getValueAsString("InstFormatName");
284 for (unsigned i = 0, e = Insts.size(); i != e; ++i) {
285 std::string AsmStr = Insts[i]->getValueAsString(InstFormatName);
286 Instructions.insert(std::make_pair(Insts[i]->getName(),
287 CodeGenInstruction(Insts[i], AsmStr)));
291 /// getInstructionsByEnumValue - Return all of the instructions defined by the
292 /// target, ordered by their enum value.
294 getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
295 &NumberedInstructions) {
296 std::map<std::string, CodeGenInstruction>::const_iterator I;
297 I = getInstructions().find("PHI");
298 if (I == Instructions.end()) throw "Could not find 'PHI' instruction!";
299 const CodeGenInstruction *PHI = &I->second;
301 I = getInstructions().find("INLINEASM");
302 if (I == Instructions.end()) throw "Could not find 'INLINEASM' instruction!";
303 const CodeGenInstruction *INLINEASM = &I->second;
305 I = getInstructions().find("DBG_LABEL");
306 if (I == Instructions.end()) throw "Could not find 'DBG_LABEL' instruction!";
307 const CodeGenInstruction *DBG_LABEL = &I->second;
309 I = getInstructions().find("EH_LABEL");
310 if (I == Instructions.end()) throw "Could not find 'EH_LABEL' instruction!";
311 const CodeGenInstruction *EH_LABEL = &I->second;
313 I = getInstructions().find("GC_LABEL");
314 if (I == Instructions.end()) throw "Could not find 'GC_LABEL' instruction!";
315 const CodeGenInstruction *GC_LABEL = &I->second;
317 I = getInstructions().find("KILL");
318 if (I == Instructions.end()) throw "Could not find 'KILL' instruction!";
319 const CodeGenInstruction *KILL = &I->second;
321 I = getInstructions().find("EXTRACT_SUBREG");
322 if (I == Instructions.end())
323 throw "Could not find 'EXTRACT_SUBREG' instruction!";
324 const CodeGenInstruction *EXTRACT_SUBREG = &I->second;
326 I = getInstructions().find("INSERT_SUBREG");
327 if (I == Instructions.end())
328 throw "Could not find 'INSERT_SUBREG' instruction!";
329 const CodeGenInstruction *INSERT_SUBREG = &I->second;
331 I = getInstructions().find("IMPLICIT_DEF");
332 if (I == Instructions.end())
333 throw "Could not find 'IMPLICIT_DEF' instruction!";
334 const CodeGenInstruction *IMPLICIT_DEF = &I->second;
336 I = getInstructions().find("SUBREG_TO_REG");
337 if (I == Instructions.end())
338 throw "Could not find 'SUBREG_TO_REG' instruction!";
339 const CodeGenInstruction *SUBREG_TO_REG = &I->second;
341 I = getInstructions().find("COPY_TO_REGCLASS");
342 if (I == Instructions.end())
343 throw "Could not find 'COPY_TO_REGCLASS' instruction!";
344 const CodeGenInstruction *COPY_TO_REGCLASS = &I->second;
346 I = getInstructions().find("DBG_VALUE");
347 if (I == Instructions.end())
348 throw "Could not find 'DBG_VALUE' instruction!";
349 const CodeGenInstruction *DBG_VALUE = &I->second;
351 // Print out the rest of the instructions now.
352 NumberedInstructions.push_back(PHI);
353 NumberedInstructions.push_back(INLINEASM);
354 NumberedInstructions.push_back(DBG_LABEL);
355 NumberedInstructions.push_back(EH_LABEL);
356 NumberedInstructions.push_back(GC_LABEL);
357 NumberedInstructions.push_back(KILL);
358 NumberedInstructions.push_back(EXTRACT_SUBREG);
359 NumberedInstructions.push_back(INSERT_SUBREG);
360 NumberedInstructions.push_back(IMPLICIT_DEF);
361 NumberedInstructions.push_back(SUBREG_TO_REG);
362 NumberedInstructions.push_back(COPY_TO_REGCLASS);
363 NumberedInstructions.push_back(DBG_VALUE);
364 for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II)
365 if (&II->second != PHI &&
366 &II->second != INLINEASM &&
367 &II->second != DBG_LABEL &&
368 &II->second != EH_LABEL &&
369 &II->second != GC_LABEL &&
370 &II->second != KILL &&
371 &II->second != EXTRACT_SUBREG &&
372 &II->second != INSERT_SUBREG &&
373 &II->second != IMPLICIT_DEF &&
374 &II->second != SUBREG_TO_REG &&
375 &II->second != COPY_TO_REGCLASS &&
376 &II->second != DBG_VALUE)
377 NumberedInstructions.push_back(&II->second);
381 /// isLittleEndianEncoding - Return whether this target encodes its instruction
382 /// in little-endian format, i.e. bits laid out in the order [0..n]
384 bool CodeGenTarget::isLittleEndianEncoding() const {
385 return getInstructionSet()->getValueAsBit("isLittleEndianEncoding");
388 //===----------------------------------------------------------------------===//
389 // ComplexPattern implementation
391 ComplexPattern::ComplexPattern(Record *R) {
392 Ty = ::getValueType(R->getValueAsDef("Ty"));
393 NumOperands = R->getValueAsInt("NumOperands");
394 SelectFunc = R->getValueAsString("SelectFunc");
395 RootNodes = R->getValueAsListOfDefs("RootNodes");
397 // Parse the properties.
399 std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties");
400 for (unsigned i = 0, e = PropList.size(); i != e; ++i)
401 if (PropList[i]->getName() == "SDNPHasChain") {
402 Properties |= 1 << SDNPHasChain;
403 } else if (PropList[i]->getName() == "SDNPOptInFlag") {
404 Properties |= 1 << SDNPOptInFlag;
405 } else if (PropList[i]->getName() == "SDNPMayStore") {
406 Properties |= 1 << SDNPMayStore;
407 } else if (PropList[i]->getName() == "SDNPMayLoad") {
408 Properties |= 1 << SDNPMayLoad;
409 } else if (PropList[i]->getName() == "SDNPSideEffect") {
410 Properties |= 1 << SDNPSideEffect;
411 } else if (PropList[i]->getName() == "SDNPMemOperand") {
412 Properties |= 1 << SDNPMemOperand;
414 errs() << "Unsupported SD Node property '" << PropList[i]->getName()
415 << "' on ComplexPattern '" << R->getName() << "'!\n";
420 //===----------------------------------------------------------------------===//
421 // CodeGenIntrinsic Implementation
422 //===----------------------------------------------------------------------===//
424 std::vector<CodeGenIntrinsic> llvm::LoadIntrinsics(const RecordKeeper &RC,
426 std::vector<Record*> I = RC.getAllDerivedDefinitions("Intrinsic");
428 std::vector<CodeGenIntrinsic> Result;
430 for (unsigned i = 0, e = I.size(); i != e; ++i) {
431 bool isTarget = I[i]->getValueAsBit("isTarget");
432 if (isTarget == TargetOnly)
433 Result.push_back(CodeGenIntrinsic(I[i]));
438 CodeGenIntrinsic::CodeGenIntrinsic(Record *R) {
440 std::string DefName = R->getName();
442 isOverloaded = false;
443 isCommutative = false;
445 if (DefName.size() <= 4 ||
446 std::string(DefName.begin(), DefName.begin() + 4) != "int_")
447 throw "Intrinsic '" + DefName + "' does not start with 'int_'!";
449 EnumName = std::string(DefName.begin()+4, DefName.end());
451 if (R->getValue("GCCBuiltinName")) // Ignore a missing GCCBuiltinName field.
452 GCCBuiltinName = R->getValueAsString("GCCBuiltinName");
454 TargetPrefix = R->getValueAsString("TargetPrefix");
455 Name = R->getValueAsString("LLVMName");
458 // If an explicit name isn't specified, derive one from the DefName.
461 for (unsigned i = 0, e = EnumName.size(); i != e; ++i)
462 Name += (EnumName[i] == '_') ? '.' : EnumName[i];
464 // Verify it starts with "llvm.".
465 if (Name.size() <= 5 ||
466 std::string(Name.begin(), Name.begin() + 5) != "llvm.")
467 throw "Intrinsic '" + DefName + "'s name does not start with 'llvm.'!";
470 // If TargetPrefix is specified, make sure that Name starts with
471 // "llvm.<targetprefix>.".
472 if (!TargetPrefix.empty()) {
473 if (Name.size() < 6+TargetPrefix.size() ||
474 std::string(Name.begin() + 5, Name.begin() + 6 + TargetPrefix.size())
475 != (TargetPrefix + "."))
476 throw "Intrinsic '" + DefName + "' does not start with 'llvm." +
477 TargetPrefix + ".'!";
480 // Parse the list of return types.
481 std::vector<MVT::SimpleValueType> OverloadedVTs;
482 ListInit *TypeList = R->getValueAsListInit("RetTypes");
483 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
484 Record *TyEl = TypeList->getElementAsRecord(i);
485 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
486 MVT::SimpleValueType VT;
487 if (TyEl->isSubClassOf("LLVMMatchType")) {
488 unsigned MatchTy = TyEl->getValueAsInt("Number");
489 assert(MatchTy < OverloadedVTs.size() &&
490 "Invalid matching number!");
491 VT = OverloadedVTs[MatchTy];
492 // It only makes sense to use the extended and truncated vector element
493 // variants with iAny types; otherwise, if the intrinsic is not
494 // overloaded, all the types can be specified directly.
495 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") &&
496 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) ||
497 VT == MVT::iAny || VT == MVT::vAny) &&
498 "Expected iAny or vAny type");
500 VT = getValueType(TyEl->getValueAsDef("VT"));
502 if (EVT(VT).isOverloaded()) {
503 OverloadedVTs.push_back(VT);
504 isOverloaded |= true;
506 IS.RetVTs.push_back(VT);
507 IS.RetTypeDefs.push_back(TyEl);
510 if (IS.RetVTs.size() == 0)
511 throw "Intrinsic '"+DefName+"' needs at least a type for the ret value!";
513 // Parse the list of parameter types.
514 TypeList = R->getValueAsListInit("ParamTypes");
515 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
516 Record *TyEl = TypeList->getElementAsRecord(i);
517 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
518 MVT::SimpleValueType VT;
519 if (TyEl->isSubClassOf("LLVMMatchType")) {
520 unsigned MatchTy = TyEl->getValueAsInt("Number");
521 assert(MatchTy < OverloadedVTs.size() &&
522 "Invalid matching number!");
523 VT = OverloadedVTs[MatchTy];
524 // It only makes sense to use the extended and truncated vector element
525 // variants with iAny types; otherwise, if the intrinsic is not
526 // overloaded, all the types can be specified directly.
527 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") &&
528 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) ||
529 VT == MVT::iAny || VT == MVT::vAny) &&
530 "Expected iAny or vAny type");
532 VT = getValueType(TyEl->getValueAsDef("VT"));
533 if (EVT(VT).isOverloaded()) {
534 OverloadedVTs.push_back(VT);
535 isOverloaded |= true;
537 IS.ParamVTs.push_back(VT);
538 IS.ParamTypeDefs.push_back(TyEl);
541 // Parse the intrinsic properties.
542 ListInit *PropList = R->getValueAsListInit("Properties");
543 for (unsigned i = 0, e = PropList->getSize(); i != e; ++i) {
544 Record *Property = PropList->getElementAsRecord(i);
545 assert(Property->isSubClassOf("IntrinsicProperty") &&
546 "Expected a property!");
548 if (Property->getName() == "IntrNoMem")
550 else if (Property->getName() == "IntrReadArgMem")
552 else if (Property->getName() == "IntrReadMem")
554 else if (Property->getName() == "IntrWriteArgMem")
555 ModRef = WriteArgMem;
556 else if (Property->getName() == "IntrWriteMem")
558 else if (Property->getName() == "Commutative")
559 isCommutative = true;
560 else if (Property->isSubClassOf("NoCapture")) {
561 unsigned ArgNo = Property->getValueAsInt("ArgNo");
562 ArgumentAttributes.push_back(std::make_pair(ArgNo, NoCapture));
564 assert(0 && "Unknown property!");