1 //===- AsmMatcherEmitter.cpp - Generate an assembly matcher ---------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This tablegen backend emits a target specifier matcher for converting parsed
11 // assembly operands in the MCInst structures. It also emits a matcher for
12 // custom operand parsing.
14 // Converting assembly operands into MCInst structures
15 // ---------------------------------------------------
17 // The input to the target specific matcher is a list of literal tokens and
18 // operands. The target specific parser should generally eliminate any syntax
19 // which is not relevant for matching; for example, comma tokens should have
20 // already been consumed and eliminated by the parser. Most instructions will
21 // end up with a single literal token (the instruction name) and some number of
24 // Some example inputs, for X86:
25 // 'addl' (immediate ...) (register ...)
26 // 'add' (immediate ...) (memory ...)
29 // The assembly matcher is responsible for converting this input into a precise
30 // machine instruction (i.e., an instruction with a well defined encoding). This
31 // mapping has several properties which complicate matching:
33 // - It may be ambiguous; many architectures can legally encode particular
34 // variants of an instruction in different ways (for example, using a smaller
35 // encoding for small immediates). Such ambiguities should never be
36 // arbitrarily resolved by the assembler, the assembler is always responsible
37 // for choosing the "best" available instruction.
39 // - It may depend on the subtarget or the assembler context. Instructions
40 // which are invalid for the current mode, but otherwise unambiguous (e.g.,
41 // an SSE instruction in a file being assembled for i486) should be accepted
42 // and rejected by the assembler front end. However, if the proper encoding
43 // for an instruction is dependent on the assembler context then the matcher
44 // is responsible for selecting the correct machine instruction for the
47 // The core matching algorithm attempts to exploit the regularity in most
48 // instruction sets to quickly determine the set of possibly matching
49 // instructions, and the simplify the generated code. Additionally, this helps
50 // to ensure that the ambiguities are intentionally resolved by the user.
52 // The matching is divided into two distinct phases:
54 // 1. Classification: Each operand is mapped to the unique set which (a)
55 // contains it, and (b) is the largest such subset for which a single
56 // instruction could match all members.
58 // For register classes, we can generate these subgroups automatically. For
59 // arbitrary operands, we expect the user to define the classes and their
60 // relations to one another (for example, 8-bit signed immediates as a
61 // subset of 32-bit immediates).
63 // By partitioning the operands in this way, we guarantee that for any
64 // tuple of classes, any single instruction must match either all or none
65 // of the sets of operands which could classify to that tuple.
67 // In addition, the subset relation amongst classes induces a partial order
68 // on such tuples, which we use to resolve ambiguities.
70 // 2. The input can now be treated as a tuple of classes (static tokens are
71 // simple singleton sets). Each such tuple should generally map to a single
72 // instruction (we currently ignore cases where this isn't true, whee!!!),
73 // which we can emit a simple matcher for.
75 // Custom Operand Parsing
76 // ----------------------
78 // Some targets need a custom way to parse operands, some specific instructions
79 // can contain arguments that can represent processor flags and other kinds of
80 // identifiers that need to be mapped to specific values in the final encoded
81 // instructions. The target specific custom operand parsing works in the
84 // 1. A operand match table is built, each entry contains a mnemonic, an
85 // operand class, a mask for all operand positions for that same
86 // class/mnemonic and target features to be checked while trying to match.
88 // 2. The operand matcher will try every possible entry with the same
89 // mnemonic and will check if the target feature for this mnemonic also
90 // matches. After that, if the operand to be matched has its index
91 // present in the mask, a successful match occurs. Otherwise, fallback
92 // to the regular operand parsing.
94 // 3. For a match success, each operand class that has a 'ParserMethod'
95 // becomes part of a switch from where the custom method is called.
97 //===----------------------------------------------------------------------===//
99 #include "CodeGenTarget.h"
100 #include "llvm/ADT/PointerUnion.h"
101 #include "llvm/ADT/STLExtras.h"
102 #include "llvm/ADT/SmallPtrSet.h"
103 #include "llvm/ADT/SmallVector.h"
104 #include "llvm/ADT/StringExtras.h"
105 #include "llvm/Support/CommandLine.h"
106 #include "llvm/Support/Debug.h"
107 #include "llvm/Support/ErrorHandling.h"
108 #include "llvm/TableGen/Error.h"
109 #include "llvm/TableGen/Record.h"
110 #include "llvm/TableGen/StringMatcher.h"
111 #include "llvm/TableGen/StringToOffsetTable.h"
112 #include "llvm/TableGen/TableGenBackend.h"
118 #include <forward_list>
119 using namespace llvm;
121 #define DEBUG_TYPE "asm-matcher-emitter"
123 static cl::opt<std::string>
124 MatchPrefix("match-prefix", cl::init(""),
125 cl::desc("Only match instructions with the given prefix"));
128 class AsmMatcherInfo;
129 struct SubtargetFeatureInfo;
131 // Register sets are used as keys in some second-order sets TableGen creates
132 // when generating its data structures. This means that the order of two
133 // RegisterSets can be seen in the outputted AsmMatcher tables occasionally, and
134 // can even affect compiler output (at least seen in diagnostics produced when
135 // all matches fail). So we use a type that sorts them consistently.
136 typedef std::set<Record*, LessRecordByID> RegisterSet;
138 class AsmMatcherEmitter {
139 RecordKeeper &Records;
141 AsmMatcherEmitter(RecordKeeper &R) : Records(R) {}
143 void run(raw_ostream &o);
146 /// ClassInfo - Helper class for storing the information about a particular
147 /// class of operands which can be matched.
150 /// Invalid kind, for use as a sentinel value.
153 /// The class for a particular token.
156 /// The (first) register class, subsequent register classes are
157 /// RegisterClass0+1, and so on.
160 /// The (first) user defined class, subsequent user defined classes are
161 /// UserClass0+1, and so on.
165 /// Kind - The class kind, which is either a predefined kind, or (UserClass0 +
166 /// N) for the Nth user defined class.
169 /// SuperClasses - The super classes of this class. Note that for simplicities
170 /// sake user operands only record their immediate super class, while register
171 /// operands include all superclasses.
172 std::vector<ClassInfo*> SuperClasses;
174 /// Name - The full class name, suitable for use in an enum.
177 /// ClassName - The unadorned generic name for this class (e.g., Token).
178 std::string ClassName;
180 /// ValueName - The name of the value this class represents; for a token this
181 /// is the literal token string, for an operand it is the TableGen class (or
182 /// empty if this is a derived class).
183 std::string ValueName;
185 /// PredicateMethod - The name of the operand method to test whether the
186 /// operand matches this class; this is not valid for Token or register kinds.
187 std::string PredicateMethod;
189 /// RenderMethod - The name of the operand method to add this operand to an
190 /// MCInst; this is not valid for Token or register kinds.
191 std::string RenderMethod;
193 /// ParserMethod - The name of the operand method to do a target specific
194 /// parsing on the operand.
195 std::string ParserMethod;
197 /// For register classes: the records for all the registers in this class.
198 RegisterSet Registers;
200 /// For custom match classes: the diagnostic kind for when the predicate fails.
201 std::string DiagnosticType;
203 /// isRegisterClass() - Check if this is a register class.
204 bool isRegisterClass() const {
205 return Kind >= RegisterClass0 && Kind < UserClass0;
208 /// isUserClass() - Check if this is a user defined class.
209 bool isUserClass() const {
210 return Kind >= UserClass0;
213 /// isRelatedTo - Check whether this class is "related" to \p RHS. Classes
214 /// are related if they are in the same class hierarchy.
215 bool isRelatedTo(const ClassInfo &RHS) const {
216 // Tokens are only related to tokens.
217 if (Kind == Token || RHS.Kind == Token)
218 return Kind == Token && RHS.Kind == Token;
220 // Registers classes are only related to registers classes, and only if
221 // their intersection is non-empty.
222 if (isRegisterClass() || RHS.isRegisterClass()) {
223 if (!isRegisterClass() || !RHS.isRegisterClass())
227 std::insert_iterator<RegisterSet> II(Tmp, Tmp.begin());
228 std::set_intersection(Registers.begin(), Registers.end(),
229 RHS.Registers.begin(), RHS.Registers.end(),
230 II, LessRecordByID());
235 // Otherwise we have two users operands; they are related if they are in the
236 // same class hierarchy.
238 // FIXME: This is an oversimplification, they should only be related if they
239 // intersect, however we don't have that information.
240 assert(isUserClass() && RHS.isUserClass() && "Unexpected class!");
241 const ClassInfo *Root = this;
242 while (!Root->SuperClasses.empty())
243 Root = Root->SuperClasses.front();
245 const ClassInfo *RHSRoot = &RHS;
246 while (!RHSRoot->SuperClasses.empty())
247 RHSRoot = RHSRoot->SuperClasses.front();
249 return Root == RHSRoot;
252 /// isSubsetOf - Test whether this class is a subset of \p RHS.
253 bool isSubsetOf(const ClassInfo &RHS) const {
254 // This is a subset of RHS if it is the same class...
258 // ... or if any of its super classes are a subset of RHS.
259 for (const ClassInfo *CI : SuperClasses)
260 if (CI->isSubsetOf(RHS))
266 /// operator< - Compare two classes.
267 // FIXME: This ordering seems to be broken. For example:
268 // u64 < i64, i64 < s8, s8 < u64, forming a cycle
269 // u64 is a subset of i64
270 // i64 and s8 are not subsets of each other, so are ordered by name
271 // s8 and u64 are not subsets of each other, so are ordered by name
272 bool operator<(const ClassInfo &RHS) const {
276 // Unrelated classes can be ordered by kind.
277 if (!isRelatedTo(RHS))
278 return Kind < RHS.Kind;
282 llvm_unreachable("Invalid kind!");
285 // This class precedes the RHS if it is a proper subset of the RHS.
288 if (RHS.isSubsetOf(*this))
291 // Otherwise, order by name to ensure we have a total ordering.
292 return ValueName < RHS.ValueName;
297 class AsmVariantInfo {
299 std::string RegisterPrefix;
300 std::string TokenizingCharacters;
301 std::string SeparatorCharacters;
302 std::string BreakCharacters;
306 /// MatchableInfo - Helper class for storing the necessary information for an
307 /// instruction or alias which is capable of being matched.
308 struct MatchableInfo {
310 /// Token - This is the token that the operand came from.
313 /// The unique class instance this operand should match.
316 /// The operand name this is, if anything.
319 /// The suboperand index within SrcOpName, or -1 for the entire operand.
322 /// Whether the token is "isolated", i.e., it is preceded and followed
324 bool IsIsolatedToken;
326 /// Register record if this token is singleton register.
327 Record *SingletonReg;
329 explicit AsmOperand(bool IsIsolatedToken, StringRef T)
330 : Token(T), Class(nullptr), SubOpIdx(-1),
331 IsIsolatedToken(IsIsolatedToken), SingletonReg(nullptr) {}
334 /// ResOperand - This represents a single operand in the result instruction
335 /// generated by the match. In cases (like addressing modes) where a single
336 /// assembler operand expands to multiple MCOperands, this represents the
337 /// single assembler operand, not the MCOperand.
340 /// RenderAsmOperand - This represents an operand result that is
341 /// generated by calling the render method on the assembly operand. The
342 /// corresponding AsmOperand is specified by AsmOperandNum.
345 /// TiedOperand - This represents a result operand that is a duplicate of
346 /// a previous result operand.
349 /// ImmOperand - This represents an immediate value that is dumped into
353 /// RegOperand - This represents a fixed register that is dumped in.
358 /// This is the operand # in the AsmOperands list that this should be
360 unsigned AsmOperandNum;
362 /// TiedOperandNum - This is the (earlier) result operand that should be
364 unsigned TiedOperandNum;
366 /// ImmVal - This is the immediate value added to the instruction.
369 /// Register - This is the register record.
373 /// MINumOperands - The number of MCInst operands populated by this
375 unsigned MINumOperands;
377 static ResOperand getRenderedOp(unsigned AsmOpNum, unsigned NumOperands) {
379 X.Kind = RenderAsmOperand;
380 X.AsmOperandNum = AsmOpNum;
381 X.MINumOperands = NumOperands;
385 static ResOperand getTiedOp(unsigned TiedOperandNum) {
387 X.Kind = TiedOperand;
388 X.TiedOperandNum = TiedOperandNum;
393 static ResOperand getImmOp(int64_t Val) {
401 static ResOperand getRegOp(Record *Reg) {
410 /// AsmVariantID - Target's assembly syntax variant no.
413 /// AsmString - The assembly string for this instruction (with variants
414 /// removed), e.g. "movsx $src, $dst".
415 std::string AsmString;
417 /// TheDef - This is the definition of the instruction or InstAlias that this
418 /// matchable came from.
419 Record *const TheDef;
421 /// DefRec - This is the definition that it came from.
422 PointerUnion<const CodeGenInstruction*, const CodeGenInstAlias*> DefRec;
424 const CodeGenInstruction *getResultInst() const {
425 if (DefRec.is<const CodeGenInstruction*>())
426 return DefRec.get<const CodeGenInstruction*>();
427 return DefRec.get<const CodeGenInstAlias*>()->ResultInst;
430 /// ResOperands - This is the operand list that should be built for the result
432 SmallVector<ResOperand, 8> ResOperands;
434 /// Mnemonic - This is the first token of the matched instruction, its
438 /// AsmOperands - The textual operands that this instruction matches,
439 /// annotated with a class and where in the OperandList they were defined.
440 /// This directly corresponds to the tokenized AsmString after the mnemonic is
442 SmallVector<AsmOperand, 8> AsmOperands;
444 /// Predicates - The required subtarget features to match this instruction.
445 SmallVector<const SubtargetFeatureInfo *, 4> RequiredFeatures;
447 /// ConversionFnKind - The enum value which is passed to the generated
448 /// convertToMCInst to convert parsed operands into an MCInst for this
450 std::string ConversionFnKind;
452 /// If this instruction is deprecated in some form.
455 /// If this is an alias, this is use to determine whether or not to using
456 /// the conversion function defined by the instruction's AsmMatchConverter
457 /// or to use the function generated by the alias.
458 bool UseInstAsmMatchConverter;
460 MatchableInfo(const CodeGenInstruction &CGI)
461 : AsmVariantID(0), AsmString(CGI.AsmString), TheDef(CGI.TheDef), DefRec(&CGI),
462 UseInstAsmMatchConverter(true) {
465 MatchableInfo(std::unique_ptr<const CodeGenInstAlias> Alias)
466 : AsmVariantID(0), AsmString(Alias->AsmString), TheDef(Alias->TheDef),
467 DefRec(Alias.release()),
468 UseInstAsmMatchConverter(
469 TheDef->getValueAsBit("UseInstAsmMatchConverter")) {
472 // Could remove this and the dtor if PointerUnion supported unique_ptr
473 // elements with a dynamic failure/assertion (like the one below) in the case
474 // where it was copied while being in an owning state.
475 MatchableInfo(const MatchableInfo &RHS)
476 : AsmVariantID(RHS.AsmVariantID), AsmString(RHS.AsmString),
477 TheDef(RHS.TheDef), DefRec(RHS.DefRec), ResOperands(RHS.ResOperands),
478 Mnemonic(RHS.Mnemonic), AsmOperands(RHS.AsmOperands),
479 RequiredFeatures(RHS.RequiredFeatures),
480 ConversionFnKind(RHS.ConversionFnKind),
481 HasDeprecation(RHS.HasDeprecation),
482 UseInstAsmMatchConverter(RHS.UseInstAsmMatchConverter) {
483 assert(!DefRec.is<const CodeGenInstAlias *>());
487 delete DefRec.dyn_cast<const CodeGenInstAlias*>();
490 // Two-operand aliases clone from the main matchable, but mark the second
491 // operand as a tied operand of the first for purposes of the assembler.
492 void formTwoOperandAlias(StringRef Constraint);
494 void initialize(const AsmMatcherInfo &Info,
495 SmallPtrSetImpl<Record*> &SingletonRegisters,
496 AsmVariantInfo const &Variant,
497 bool HasMnemonicFirst);
499 /// validate - Return true if this matchable is a valid thing to match against
500 /// and perform a bunch of validity checking.
501 bool validate(StringRef CommentDelimiter, bool Hack) const;
503 /// findAsmOperand - Find the AsmOperand with the specified name and
504 /// suboperand index.
505 int findAsmOperand(StringRef N, int SubOpIdx) const {
506 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i)
507 if (N == AsmOperands[i].SrcOpName &&
508 SubOpIdx == AsmOperands[i].SubOpIdx)
513 /// findAsmOperandNamed - Find the first AsmOperand with the specified name.
514 /// This does not check the suboperand index.
515 int findAsmOperandNamed(StringRef N) const {
516 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i)
517 if (N == AsmOperands[i].SrcOpName)
522 void buildInstructionResultOperands();
523 void buildAliasResultOperands();
525 /// operator< - Compare two matchables.
526 bool operator<(const MatchableInfo &RHS) const {
527 // The primary comparator is the instruction mnemonic.
528 if (Mnemonic != RHS.Mnemonic)
529 return Mnemonic < RHS.Mnemonic;
531 if (AsmOperands.size() != RHS.AsmOperands.size())
532 return AsmOperands.size() < RHS.AsmOperands.size();
534 // Compare lexicographically by operand. The matcher validates that other
535 // orderings wouldn't be ambiguous using \see couldMatchAmbiguouslyWith().
536 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
537 if (*AsmOperands[i].Class < *RHS.AsmOperands[i].Class)
539 if (*RHS.AsmOperands[i].Class < *AsmOperands[i].Class)
543 // Give matches that require more features higher precedence. This is useful
544 // because we cannot define AssemblerPredicates with the negation of
545 // processor features. For example, ARM v6 "nop" may be either a HINT or
546 // MOV. With v6, we want to match HINT. The assembler has no way to
547 // predicate MOV under "NoV6", but HINT will always match first because it
548 // requires V6 while MOV does not.
549 if (RequiredFeatures.size() != RHS.RequiredFeatures.size())
550 return RequiredFeatures.size() > RHS.RequiredFeatures.size();
555 /// couldMatchAmbiguouslyWith - Check whether this matchable could
556 /// ambiguously match the same set of operands as \p RHS (without being a
557 /// strictly superior match).
558 bool couldMatchAmbiguouslyWith(const MatchableInfo &RHS) const {
559 // The primary comparator is the instruction mnemonic.
560 if (Mnemonic != RHS.Mnemonic)
563 // The number of operands is unambiguous.
564 if (AsmOperands.size() != RHS.AsmOperands.size())
567 // Otherwise, make sure the ordering of the two instructions is unambiguous
568 // by checking that either (a) a token or operand kind discriminates them,
569 // or (b) the ordering among equivalent kinds is consistent.
571 // Tokens and operand kinds are unambiguous (assuming a correct target
573 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i)
574 if (AsmOperands[i].Class->Kind != RHS.AsmOperands[i].Class->Kind ||
575 AsmOperands[i].Class->Kind == ClassInfo::Token)
576 if (*AsmOperands[i].Class < *RHS.AsmOperands[i].Class ||
577 *RHS.AsmOperands[i].Class < *AsmOperands[i].Class)
580 // Otherwise, this operand could commute if all operands are equivalent, or
581 // there is a pair of operands that compare less than and a pair that
582 // compare greater than.
583 bool HasLT = false, HasGT = false;
584 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
585 if (*AsmOperands[i].Class < *RHS.AsmOperands[i].Class)
587 if (*RHS.AsmOperands[i].Class < *AsmOperands[i].Class)
591 return !(HasLT ^ HasGT);
597 void tokenizeAsmString(AsmMatcherInfo const &Info,
598 AsmVariantInfo const &Variant);
599 void addAsmOperand(StringRef Token, bool IsIsolatedToken = false);
602 /// SubtargetFeatureInfo - Helper class for storing information on a subtarget
603 /// feature which participates in instruction matching.
604 struct SubtargetFeatureInfo {
605 /// \brief The predicate record for this feature.
608 /// \brief An unique index assigned to represent this feature.
611 SubtargetFeatureInfo(Record *D, uint64_t Idx) : TheDef(D), Index(Idx) {}
613 /// \brief The name of the enumerated constant identifying this feature.
614 std::string getEnumName() const {
615 return "Feature_" + TheDef->getName();
619 errs() << getEnumName() << " " << Index << "\n";
624 struct OperandMatchEntry {
625 unsigned OperandMask;
626 const MatchableInfo* MI;
629 static OperandMatchEntry create(const MatchableInfo *mi, ClassInfo *ci,
632 X.OperandMask = opMask;
640 class AsmMatcherInfo {
643 RecordKeeper &Records;
645 /// The tablegen AsmParser record.
648 /// Target - The target information.
649 CodeGenTarget &Target;
651 /// The classes which are needed for matching.
652 std::forward_list<ClassInfo> Classes;
654 /// The information on the matchables to match.
655 std::vector<std::unique_ptr<MatchableInfo>> Matchables;
657 /// Info for custom matching operands by user defined methods.
658 std::vector<OperandMatchEntry> OperandMatchInfo;
660 /// Map of Register records to their class information.
661 typedef std::map<Record*, ClassInfo*, LessRecordByID> RegisterClassesTy;
662 RegisterClassesTy RegisterClasses;
664 /// Map of Predicate records to their subtarget information.
665 std::map<Record *, SubtargetFeatureInfo, LessRecordByID> SubtargetFeatures;
667 /// Map of AsmOperandClass records to their class information.
668 std::map<Record*, ClassInfo*> AsmOperandClasses;
671 /// Map of token to class information which has already been constructed.
672 std::map<std::string, ClassInfo*> TokenClasses;
674 /// Map of RegisterClass records to their class information.
675 std::map<Record*, ClassInfo*> RegisterClassClasses;
678 /// getTokenClass - Lookup or create the class for the given token.
679 ClassInfo *getTokenClass(StringRef Token);
681 /// getOperandClass - Lookup or create the class for the given operand.
682 ClassInfo *getOperandClass(const CGIOperandList::OperandInfo &OI,
684 ClassInfo *getOperandClass(Record *Rec, int SubOpIdx);
686 /// buildRegisterClasses - Build the ClassInfo* instances for register
688 void buildRegisterClasses(SmallPtrSetImpl<Record*> &SingletonRegisters);
690 /// buildOperandClasses - Build the ClassInfo* instances for user defined
692 void buildOperandClasses();
694 void buildInstructionOperandReference(MatchableInfo *II, StringRef OpName,
696 void buildAliasOperandReference(MatchableInfo *II, StringRef OpName,
697 MatchableInfo::AsmOperand &Op);
700 AsmMatcherInfo(Record *AsmParser,
701 CodeGenTarget &Target,
702 RecordKeeper &Records);
704 /// buildInfo - Construct the various tables used during matching.
707 /// buildOperandMatchInfo - Build the necessary information to handle user
708 /// defined operand parsing methods.
709 void buildOperandMatchInfo();
711 /// getSubtargetFeature - Lookup or create the subtarget feature info for the
713 const SubtargetFeatureInfo *getSubtargetFeature(Record *Def) const {
714 assert(Def->isSubClassOf("Predicate") && "Invalid predicate type!");
715 const auto &I = SubtargetFeatures.find(Def);
716 return I == SubtargetFeatures.end() ? nullptr : &I->second;
719 RecordKeeper &getRecords() const {
724 } // End anonymous namespace
726 void MatchableInfo::dump() const {
727 errs() << TheDef->getName() << " -- " << "flattened:\"" << AsmString <<"\"\n";
729 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
730 const AsmOperand &Op = AsmOperands[i];
731 errs() << " op[" << i << "] = " << Op.Class->ClassName << " - ";
732 errs() << '\"' << Op.Token << "\"\n";
736 static std::pair<StringRef, StringRef>
737 parseTwoOperandConstraint(StringRef S, ArrayRef<SMLoc> Loc) {
738 // Split via the '='.
739 std::pair<StringRef, StringRef> Ops = S.split('=');
740 if (Ops.second == "")
741 PrintFatalError(Loc, "missing '=' in two-operand alias constraint");
742 // Trim whitespace and the leading '$' on the operand names.
743 size_t start = Ops.first.find_first_of('$');
744 if (start == std::string::npos)
745 PrintFatalError(Loc, "expected '$' prefix on asm operand name");
746 Ops.first = Ops.first.slice(start + 1, std::string::npos);
747 size_t end = Ops.first.find_last_of(" \t");
748 Ops.first = Ops.first.slice(0, end);
749 // Now the second operand.
750 start = Ops.second.find_first_of('$');
751 if (start == std::string::npos)
752 PrintFatalError(Loc, "expected '$' prefix on asm operand name");
753 Ops.second = Ops.second.slice(start + 1, std::string::npos);
754 end = Ops.second.find_last_of(" \t");
755 Ops.first = Ops.first.slice(0, end);
759 void MatchableInfo::formTwoOperandAlias(StringRef Constraint) {
760 // Figure out which operands are aliased and mark them as tied.
761 std::pair<StringRef, StringRef> Ops =
762 parseTwoOperandConstraint(Constraint, TheDef->getLoc());
764 // Find the AsmOperands that refer to the operands we're aliasing.
765 int SrcAsmOperand = findAsmOperandNamed(Ops.first);
766 int DstAsmOperand = findAsmOperandNamed(Ops.second);
767 if (SrcAsmOperand == -1)
768 PrintFatalError(TheDef->getLoc(),
769 "unknown source two-operand alias operand '" + Ops.first +
771 if (DstAsmOperand == -1)
772 PrintFatalError(TheDef->getLoc(),
773 "unknown destination two-operand alias operand '" +
776 // Find the ResOperand that refers to the operand we're aliasing away
777 // and update it to refer to the combined operand instead.
778 for (ResOperand &Op : ResOperands) {
779 if (Op.Kind == ResOperand::RenderAsmOperand &&
780 Op.AsmOperandNum == (unsigned)SrcAsmOperand) {
781 Op.AsmOperandNum = DstAsmOperand;
785 // Remove the AsmOperand for the alias operand.
786 AsmOperands.erase(AsmOperands.begin() + SrcAsmOperand);
787 // Adjust the ResOperand references to any AsmOperands that followed
788 // the one we just deleted.
789 for (ResOperand &Op : ResOperands) {
792 // Nothing to do for operands that don't reference AsmOperands.
794 case ResOperand::RenderAsmOperand:
795 if (Op.AsmOperandNum > (unsigned)SrcAsmOperand)
798 case ResOperand::TiedOperand:
799 if (Op.TiedOperandNum > (unsigned)SrcAsmOperand)
806 /// extractSingletonRegisterForAsmOperand - Extract singleton register,
807 /// if present, from specified token.
809 extractSingletonRegisterForAsmOperand(MatchableInfo::AsmOperand &Op,
810 const AsmMatcherInfo &Info,
811 StringRef RegisterPrefix) {
812 StringRef Tok = Op.Token;
814 // If this token is not an isolated token, i.e., it isn't separated from
815 // other tokens (e.g. with whitespace), don't interpret it as a register name.
816 if (!Op.IsIsolatedToken)
819 if (RegisterPrefix.empty()) {
820 std::string LoweredTok = Tok.lower();
821 if (const CodeGenRegister *Reg = Info.Target.getRegisterByName(LoweredTok))
822 Op.SingletonReg = Reg->TheDef;
826 if (!Tok.startswith(RegisterPrefix))
829 StringRef RegName = Tok.substr(RegisterPrefix.size());
830 if (const CodeGenRegister *Reg = Info.Target.getRegisterByName(RegName))
831 Op.SingletonReg = Reg->TheDef;
833 // If there is no register prefix (i.e. "%" in "%eax"), then this may
834 // be some random non-register token, just ignore it.
838 void MatchableInfo::initialize(const AsmMatcherInfo &Info,
839 SmallPtrSetImpl<Record*> &SingletonRegisters,
840 AsmVariantInfo const &Variant,
841 bool HasMnemonicFirst) {
842 AsmVariantID = Variant.AsmVariantNo;
844 CodeGenInstruction::FlattenAsmStringVariants(AsmString,
845 Variant.AsmVariantNo);
847 tokenizeAsmString(Info, Variant);
849 // The first token of the instruction is the mnemonic, which must be a
850 // simple string, not a $foo variable or a singleton register.
851 if (AsmOperands.empty())
852 PrintFatalError(TheDef->getLoc(),
853 "Instruction '" + TheDef->getName() + "' has no tokens");
855 assert(!AsmOperands[0].Token.empty());
856 if (HasMnemonicFirst) {
857 Mnemonic = AsmOperands[0].Token;
858 if (Mnemonic[0] == '$')
859 PrintFatalError(TheDef->getLoc(),
860 "Invalid instruction mnemonic '" + Mnemonic + "'!");
862 // Remove the first operand, it is tracked in the mnemonic field.
863 AsmOperands.erase(AsmOperands.begin());
864 } else if (AsmOperands[0].Token[0] != '$')
865 Mnemonic = AsmOperands[0].Token;
867 // Compute the require features.
868 for (Record *Predicate : TheDef->getValueAsListOfDefs("Predicates"))
869 if (const SubtargetFeatureInfo *Feature =
870 Info.getSubtargetFeature(Predicate))
871 RequiredFeatures.push_back(Feature);
873 // Collect singleton registers, if used.
874 for (MatchableInfo::AsmOperand &Op : AsmOperands) {
875 extractSingletonRegisterForAsmOperand(Op, Info, Variant.RegisterPrefix);
876 if (Record *Reg = Op.SingletonReg)
877 SingletonRegisters.insert(Reg);
880 const RecordVal *DepMask = TheDef->getValue("DeprecatedFeatureMask");
882 DepMask = TheDef->getValue("ComplexDeprecationPredicate");
885 DepMask ? !DepMask->getValue()->getAsUnquotedString().empty() : false;
888 /// Append an AsmOperand for the given substring of AsmString.
889 void MatchableInfo::addAsmOperand(StringRef Token, bool IsIsolatedToken) {
890 AsmOperands.push_back(AsmOperand(IsIsolatedToken, Token));
893 /// tokenizeAsmString - Tokenize a simplified assembly string.
894 void MatchableInfo::tokenizeAsmString(const AsmMatcherInfo &Info,
895 AsmVariantInfo const &Variant) {
896 StringRef String = AsmString;
899 bool IsIsolatedToken = true;
900 for (size_t i = 0, e = String.size(); i != e; ++i) {
901 char Char = String[i];
902 if (Variant.BreakCharacters.find(Char) != std::string::npos) {
904 addAsmOperand(String.slice(Prev, i), false);
906 IsIsolatedToken = false;
911 if (Variant.TokenizingCharacters.find(Char) != std::string::npos) {
913 addAsmOperand(String.slice(Prev, i), IsIsolatedToken);
915 IsIsolatedToken = false;
917 addAsmOperand(String.slice(i, i + 1), IsIsolatedToken);
919 IsIsolatedToken = true;
922 if (Variant.SeparatorCharacters.find(Char) != std::string::npos) {
924 addAsmOperand(String.slice(Prev, i), IsIsolatedToken);
928 IsIsolatedToken = true;
935 addAsmOperand(String.slice(Prev, i), false);
937 IsIsolatedToken = false;
940 assert(i != String.size() && "Invalid quoted character");
941 addAsmOperand(String.slice(i, i + 1), IsIsolatedToken);
943 IsIsolatedToken = false;
948 addAsmOperand(String.slice(Prev, i), false);
950 IsIsolatedToken = false;
953 // If this isn't "${", start new identifier looking like "$xxx"
954 if (i + 1 == String.size() || String[i + 1] != '{') {
959 size_t EndPos = String.find('}', i);
960 assert(EndPos != StringRef::npos &&
961 "Missing brace in operand reference!");
962 addAsmOperand(String.slice(i, EndPos+1), IsIsolatedToken);
965 IsIsolatedToken = false;
974 if (InTok && Prev != String.size())
975 addAsmOperand(String.substr(Prev), IsIsolatedToken);
978 bool MatchableInfo::validate(StringRef CommentDelimiter, bool Hack) const {
979 // Reject matchables with no .s string.
980 if (AsmString.empty())
981 PrintFatalError(TheDef->getLoc(), "instruction with empty asm string");
983 // Reject any matchables with a newline in them, they should be marked
984 // isCodeGenOnly if they are pseudo instructions.
985 if (AsmString.find('\n') != std::string::npos)
986 PrintFatalError(TheDef->getLoc(),
987 "multiline instruction is not valid for the asmparser, "
988 "mark it isCodeGenOnly");
990 // Remove comments from the asm string. We know that the asmstring only
992 if (!CommentDelimiter.empty() &&
993 StringRef(AsmString).find(CommentDelimiter) != StringRef::npos)
994 PrintFatalError(TheDef->getLoc(),
995 "asmstring for instruction has comment character in it, "
996 "mark it isCodeGenOnly");
998 // Reject matchables with operand modifiers, these aren't something we can
999 // handle, the target should be refactored to use operands instead of
1002 // Also, check for instructions which reference the operand multiple times;
1003 // this implies a constraint we would not honor.
1004 std::set<std::string> OperandNames;
1005 for (const AsmOperand &Op : AsmOperands) {
1006 StringRef Tok = Op.Token;
1007 if (Tok[0] == '$' && Tok.find(':') != StringRef::npos)
1008 PrintFatalError(TheDef->getLoc(),
1009 "matchable with operand modifier '" + Tok +
1010 "' not supported by asm matcher. Mark isCodeGenOnly!");
1012 // Verify that any operand is only mentioned once.
1013 // We reject aliases and ignore instructions for now.
1014 if (Tok[0] == '$' && !OperandNames.insert(Tok).second) {
1016 PrintFatalError(TheDef->getLoc(),
1017 "ERROR: matchable with tied operand '" + Tok +
1018 "' can never be matched!");
1019 // FIXME: Should reject these. The ARM backend hits this with $lane in a
1020 // bunch of instructions. It is unclear what the right answer is.
1022 errs() << "warning: '" << TheDef->getName() << "': "
1023 << "ignoring instruction with tied operand '"
1033 static std::string getEnumNameForToken(StringRef Str) {
1036 for (StringRef::iterator it = Str.begin(), ie = Str.end(); it != ie; ++it) {
1038 case '*': Res += "_STAR_"; break;
1039 case '%': Res += "_PCT_"; break;
1040 case ':': Res += "_COLON_"; break;
1041 case '!': Res += "_EXCLAIM_"; break;
1042 case '.': Res += "_DOT_"; break;
1043 case '<': Res += "_LT_"; break;
1044 case '>': Res += "_GT_"; break;
1045 case '-': Res += "_MINUS_"; break;
1047 if ((*it >= 'A' && *it <= 'Z') ||
1048 (*it >= 'a' && *it <= 'z') ||
1049 (*it >= '0' && *it <= '9'))
1052 Res += "_" + utostr((unsigned) *it) + "_";
1059 ClassInfo *AsmMatcherInfo::getTokenClass(StringRef Token) {
1060 ClassInfo *&Entry = TokenClasses[Token];
1063 Classes.emplace_front();
1064 Entry = &Classes.front();
1065 Entry->Kind = ClassInfo::Token;
1066 Entry->ClassName = "Token";
1067 Entry->Name = "MCK_" + getEnumNameForToken(Token);
1068 Entry->ValueName = Token;
1069 Entry->PredicateMethod = "<invalid>";
1070 Entry->RenderMethod = "<invalid>";
1071 Entry->ParserMethod = "";
1072 Entry->DiagnosticType = "";
1079 AsmMatcherInfo::getOperandClass(const CGIOperandList::OperandInfo &OI,
1081 Record *Rec = OI.Rec;
1083 Rec = cast<DefInit>(OI.MIOperandInfo->getArg(SubOpIdx))->getDef();
1084 return getOperandClass(Rec, SubOpIdx);
1088 AsmMatcherInfo::getOperandClass(Record *Rec, int SubOpIdx) {
1089 if (Rec->isSubClassOf("RegisterOperand")) {
1090 // RegisterOperand may have an associated ParserMatchClass. If it does,
1091 // use it, else just fall back to the underlying register class.
1092 const RecordVal *R = Rec->getValue("ParserMatchClass");
1093 if (!R || !R->getValue())
1094 PrintFatalError("Record `" + Rec->getName() +
1095 "' does not have a ParserMatchClass!\n");
1097 if (DefInit *DI= dyn_cast<DefInit>(R->getValue())) {
1098 Record *MatchClass = DI->getDef();
1099 if (ClassInfo *CI = AsmOperandClasses[MatchClass])
1103 // No custom match class. Just use the register class.
1104 Record *ClassRec = Rec->getValueAsDef("RegClass");
1106 PrintFatalError(Rec->getLoc(), "RegisterOperand `" + Rec->getName() +
1107 "' has no associated register class!\n");
1108 if (ClassInfo *CI = RegisterClassClasses[ClassRec])
1110 PrintFatalError(Rec->getLoc(), "register class has no class info!");
1114 if (Rec->isSubClassOf("RegisterClass")) {
1115 if (ClassInfo *CI = RegisterClassClasses[Rec])
1117 PrintFatalError(Rec->getLoc(), "register class has no class info!");
1120 if (!Rec->isSubClassOf("Operand"))
1121 PrintFatalError(Rec->getLoc(), "Operand `" + Rec->getName() +
1122 "' does not derive from class Operand!\n");
1123 Record *MatchClass = Rec->getValueAsDef("ParserMatchClass");
1124 if (ClassInfo *CI = AsmOperandClasses[MatchClass])
1127 PrintFatalError(Rec->getLoc(), "operand has no match class!");
1130 struct LessRegisterSet {
1131 bool operator() (const RegisterSet &LHS, const RegisterSet & RHS) const {
1132 // std::set<T> defines its own compariso "operator<", but it
1133 // performs a lexicographical comparison by T's innate comparison
1134 // for some reason. We don't want non-deterministic pointer
1135 // comparisons so use this instead.
1136 return std::lexicographical_compare(LHS.begin(), LHS.end(),
1137 RHS.begin(), RHS.end(),
1142 void AsmMatcherInfo::
1143 buildRegisterClasses(SmallPtrSetImpl<Record*> &SingletonRegisters) {
1144 const auto &Registers = Target.getRegBank().getRegisters();
1145 auto &RegClassList = Target.getRegBank().getRegClasses();
1147 typedef std::set<RegisterSet, LessRegisterSet> RegisterSetSet;
1149 // The register sets used for matching.
1150 RegisterSetSet RegisterSets;
1152 // Gather the defined sets.
1153 for (const CodeGenRegisterClass &RC : RegClassList)
1154 RegisterSets.insert(
1155 RegisterSet(RC.getOrder().begin(), RC.getOrder().end()));
1157 // Add any required singleton sets.
1158 for (Record *Rec : SingletonRegisters) {
1159 RegisterSets.insert(RegisterSet(&Rec, &Rec + 1));
1162 // Introduce derived sets where necessary (when a register does not determine
1163 // a unique register set class), and build the mapping of registers to the set
1164 // they should classify to.
1165 std::map<Record*, RegisterSet> RegisterMap;
1166 for (const CodeGenRegister &CGR : Registers) {
1167 // Compute the intersection of all sets containing this register.
1168 RegisterSet ContainingSet;
1170 for (const RegisterSet &RS : RegisterSets) {
1171 if (!RS.count(CGR.TheDef))
1174 if (ContainingSet.empty()) {
1180 std::swap(Tmp, ContainingSet);
1181 std::insert_iterator<RegisterSet> II(ContainingSet,
1182 ContainingSet.begin());
1183 std::set_intersection(Tmp.begin(), Tmp.end(), RS.begin(), RS.end(), II,
1187 if (!ContainingSet.empty()) {
1188 RegisterSets.insert(ContainingSet);
1189 RegisterMap.insert(std::make_pair(CGR.TheDef, ContainingSet));
1193 // Construct the register classes.
1194 std::map<RegisterSet, ClassInfo*, LessRegisterSet> RegisterSetClasses;
1196 for (const RegisterSet &RS : RegisterSets) {
1197 Classes.emplace_front();
1198 ClassInfo *CI = &Classes.front();
1199 CI->Kind = ClassInfo::RegisterClass0 + Index;
1200 CI->ClassName = "Reg" + utostr(Index);
1201 CI->Name = "MCK_Reg" + utostr(Index);
1203 CI->PredicateMethod = ""; // unused
1204 CI->RenderMethod = "addRegOperands";
1206 // FIXME: diagnostic type.
1207 CI->DiagnosticType = "";
1208 RegisterSetClasses.insert(std::make_pair(RS, CI));
1212 // Find the superclasses; we could compute only the subgroup lattice edges,
1213 // but there isn't really a point.
1214 for (const RegisterSet &RS : RegisterSets) {
1215 ClassInfo *CI = RegisterSetClasses[RS];
1216 for (const RegisterSet &RS2 : RegisterSets)
1218 std::includes(RS2.begin(), RS2.end(), RS.begin(), RS.end(),
1220 CI->SuperClasses.push_back(RegisterSetClasses[RS2]);
1223 // Name the register classes which correspond to a user defined RegisterClass.
1224 for (const CodeGenRegisterClass &RC : RegClassList) {
1225 // Def will be NULL for non-user defined register classes.
1226 Record *Def = RC.getDef();
1229 ClassInfo *CI = RegisterSetClasses[RegisterSet(RC.getOrder().begin(),
1230 RC.getOrder().end())];
1231 if (CI->ValueName.empty()) {
1232 CI->ClassName = RC.getName();
1233 CI->Name = "MCK_" + RC.getName();
1234 CI->ValueName = RC.getName();
1236 CI->ValueName = CI->ValueName + "," + RC.getName();
1238 RegisterClassClasses.insert(std::make_pair(Def, CI));
1241 // Populate the map for individual registers.
1242 for (std::map<Record*, RegisterSet>::iterator it = RegisterMap.begin(),
1243 ie = RegisterMap.end(); it != ie; ++it)
1244 RegisterClasses[it->first] = RegisterSetClasses[it->second];
1246 // Name the register classes which correspond to singleton registers.
1247 for (Record *Rec : SingletonRegisters) {
1248 ClassInfo *CI = RegisterClasses[Rec];
1249 assert(CI && "Missing singleton register class info!");
1251 if (CI->ValueName.empty()) {
1252 CI->ClassName = Rec->getName();
1253 CI->Name = "MCK_" + Rec->getName();
1254 CI->ValueName = Rec->getName();
1256 CI->ValueName = CI->ValueName + "," + Rec->getName();
1260 void AsmMatcherInfo::buildOperandClasses() {
1261 std::vector<Record*> AsmOperands =
1262 Records.getAllDerivedDefinitions("AsmOperandClass");
1264 // Pre-populate AsmOperandClasses map.
1265 for (Record *Rec : AsmOperands) {
1266 Classes.emplace_front();
1267 AsmOperandClasses[Rec] = &Classes.front();
1271 for (Record *Rec : AsmOperands) {
1272 ClassInfo *CI = AsmOperandClasses[Rec];
1273 CI->Kind = ClassInfo::UserClass0 + Index;
1275 ListInit *Supers = Rec->getValueAsListInit("SuperClasses");
1276 for (Init *I : Supers->getValues()) {
1277 DefInit *DI = dyn_cast<DefInit>(I);
1279 PrintError(Rec->getLoc(), "Invalid super class reference!");
1283 ClassInfo *SC = AsmOperandClasses[DI->getDef()];
1285 PrintError(Rec->getLoc(), "Invalid super class reference!");
1287 CI->SuperClasses.push_back(SC);
1289 CI->ClassName = Rec->getValueAsString("Name");
1290 CI->Name = "MCK_" + CI->ClassName;
1291 CI->ValueName = Rec->getName();
1293 // Get or construct the predicate method name.
1294 Init *PMName = Rec->getValueInit("PredicateMethod");
1295 if (StringInit *SI = dyn_cast<StringInit>(PMName)) {
1296 CI->PredicateMethod = SI->getValue();
1298 assert(isa<UnsetInit>(PMName) && "Unexpected PredicateMethod field!");
1299 CI->PredicateMethod = "is" + CI->ClassName;
1302 // Get or construct the render method name.
1303 Init *RMName = Rec->getValueInit("RenderMethod");
1304 if (StringInit *SI = dyn_cast<StringInit>(RMName)) {
1305 CI->RenderMethod = SI->getValue();
1307 assert(isa<UnsetInit>(RMName) && "Unexpected RenderMethod field!");
1308 CI->RenderMethod = "add" + CI->ClassName + "Operands";
1311 // Get the parse method name or leave it as empty.
1312 Init *PRMName = Rec->getValueInit("ParserMethod");
1313 if (StringInit *SI = dyn_cast<StringInit>(PRMName))
1314 CI->ParserMethod = SI->getValue();
1316 // Get the diagnostic type or leave it as empty.
1317 // Get the parse method name or leave it as empty.
1318 Init *DiagnosticType = Rec->getValueInit("DiagnosticType");
1319 if (StringInit *SI = dyn_cast<StringInit>(DiagnosticType))
1320 CI->DiagnosticType = SI->getValue();
1326 AsmMatcherInfo::AsmMatcherInfo(Record *asmParser,
1327 CodeGenTarget &target,
1328 RecordKeeper &records)
1329 : Records(records), AsmParser(asmParser), Target(target) {
1332 /// buildOperandMatchInfo - Build the necessary information to handle user
1333 /// defined operand parsing methods.
1334 void AsmMatcherInfo::buildOperandMatchInfo() {
1336 /// Map containing a mask with all operands indices that can be found for
1337 /// that class inside a instruction.
1338 typedef std::map<ClassInfo *, unsigned, less_ptr<ClassInfo>> OpClassMaskTy;
1339 OpClassMaskTy OpClassMask;
1341 for (const auto &MI : Matchables) {
1342 OpClassMask.clear();
1344 // Keep track of all operands of this instructions which belong to the
1346 for (unsigned i = 0, e = MI->AsmOperands.size(); i != e; ++i) {
1347 const MatchableInfo::AsmOperand &Op = MI->AsmOperands[i];
1348 if (Op.Class->ParserMethod.empty())
1350 unsigned &OperandMask = OpClassMask[Op.Class];
1351 OperandMask |= (1 << i);
1354 // Generate operand match info for each mnemonic/operand class pair.
1355 for (const auto &OCM : OpClassMask) {
1356 unsigned OpMask = OCM.second;
1357 ClassInfo *CI = OCM.first;
1358 OperandMatchInfo.push_back(OperandMatchEntry::create(MI.get(), CI,
1364 void AsmMatcherInfo::buildInfo() {
1365 // Build information about all of the AssemblerPredicates.
1366 std::vector<Record*> AllPredicates =
1367 Records.getAllDerivedDefinitions("Predicate");
1368 for (Record *Pred : AllPredicates) {
1369 // Ignore predicates that are not intended for the assembler.
1370 if (!Pred->getValueAsBit("AssemblerMatcherPredicate"))
1373 if (Pred->getName().empty())
1374 PrintFatalError(Pred->getLoc(), "Predicate has no name!");
1376 SubtargetFeatures.insert(std::make_pair(
1377 Pred, SubtargetFeatureInfo(Pred, SubtargetFeatures.size())));
1378 DEBUG(SubtargetFeatures.find(Pred)->second.dump());
1379 assert(SubtargetFeatures.size() <= 64 && "Too many subtarget features!");
1382 bool HasMnemonicFirst = AsmParser->getValueAsBit("HasMnemonicFirst");
1384 // Parse the instructions; we need to do this first so that we can gather the
1385 // singleton register classes.
1386 SmallPtrSet<Record*, 16> SingletonRegisters;
1387 unsigned VariantCount = Target.getAsmParserVariantCount();
1388 for (unsigned VC = 0; VC != VariantCount; ++VC) {
1389 Record *AsmVariant = Target.getAsmParserVariant(VC);
1390 std::string CommentDelimiter =
1391 AsmVariant->getValueAsString("CommentDelimiter");
1392 AsmVariantInfo Variant;
1393 Variant.RegisterPrefix = AsmVariant->getValueAsString("RegisterPrefix");
1394 Variant.TokenizingCharacters =
1395 AsmVariant->getValueAsString("TokenizingCharacters");
1396 Variant.SeparatorCharacters =
1397 AsmVariant->getValueAsString("SeparatorCharacters");
1398 Variant.BreakCharacters =
1399 AsmVariant->getValueAsString("BreakCharacters");
1400 Variant.AsmVariantNo = AsmVariant->getValueAsInt("Variant");
1402 for (const CodeGenInstruction *CGI : Target.instructions()) {
1404 // If the tblgen -match-prefix option is specified (for tblgen hackers),
1405 // filter the set of instructions we consider.
1406 if (!StringRef(CGI->TheDef->getName()).startswith(MatchPrefix))
1409 // Ignore "codegen only" instructions.
1410 if (CGI->TheDef->getValueAsBit("isCodeGenOnly"))
1413 auto II = llvm::make_unique<MatchableInfo>(*CGI);
1415 II->initialize(*this, SingletonRegisters, Variant, HasMnemonicFirst);
1417 // Ignore instructions which shouldn't be matched and diagnose invalid
1418 // instruction definitions with an error.
1419 if (!II->validate(CommentDelimiter, true))
1422 Matchables.push_back(std::move(II));
1425 // Parse all of the InstAlias definitions and stick them in the list of
1427 std::vector<Record*> AllInstAliases =
1428 Records.getAllDerivedDefinitions("InstAlias");
1429 for (unsigned i = 0, e = AllInstAliases.size(); i != e; ++i) {
1430 auto Alias = llvm::make_unique<CodeGenInstAlias>(AllInstAliases[i],
1431 Variant.AsmVariantNo,
1434 // If the tblgen -match-prefix option is specified (for tblgen hackers),
1435 // filter the set of instruction aliases we consider, based on the target
1437 if (!StringRef(Alias->ResultInst->TheDef->getName())
1438 .startswith( MatchPrefix))
1441 auto II = llvm::make_unique<MatchableInfo>(std::move(Alias));
1443 II->initialize(*this, SingletonRegisters, Variant, HasMnemonicFirst);
1445 // Validate the alias definitions.
1446 II->validate(CommentDelimiter, false);
1448 Matchables.push_back(std::move(II));
1452 // Build info for the register classes.
1453 buildRegisterClasses(SingletonRegisters);
1455 // Build info for the user defined assembly operand classes.
1456 buildOperandClasses();
1458 // Build the information about matchables, now that we have fully formed
1460 std::vector<std::unique_ptr<MatchableInfo>> NewMatchables;
1461 for (auto &II : Matchables) {
1462 // Parse the tokens after the mnemonic.
1463 // Note: buildInstructionOperandReference may insert new AsmOperands, so
1464 // don't precompute the loop bound.
1465 for (unsigned i = 0; i != II->AsmOperands.size(); ++i) {
1466 MatchableInfo::AsmOperand &Op = II->AsmOperands[i];
1467 StringRef Token = Op.Token;
1469 // Check for singleton registers.
1470 if (Record *RegRecord = Op.SingletonReg) {
1471 Op.Class = RegisterClasses[RegRecord];
1472 assert(Op.Class && Op.Class->Registers.size() == 1 &&
1473 "Unexpected class for singleton register");
1477 // Check for simple tokens.
1478 if (Token[0] != '$') {
1479 Op.Class = getTokenClass(Token);
1483 if (Token.size() > 1 && isdigit(Token[1])) {
1484 Op.Class = getTokenClass(Token);
1488 // Otherwise this is an operand reference.
1489 StringRef OperandName;
1490 if (Token[1] == '{')
1491 OperandName = Token.substr(2, Token.size() - 3);
1493 OperandName = Token.substr(1);
1495 if (II->DefRec.is<const CodeGenInstruction*>())
1496 buildInstructionOperandReference(II.get(), OperandName, i);
1498 buildAliasOperandReference(II.get(), OperandName, Op);
1501 if (II->DefRec.is<const CodeGenInstruction*>()) {
1502 II->buildInstructionResultOperands();
1503 // If the instruction has a two-operand alias, build up the
1504 // matchable here. We'll add them in bulk at the end to avoid
1505 // confusing this loop.
1506 std::string Constraint =
1507 II->TheDef->getValueAsString("TwoOperandAliasConstraint");
1508 if (Constraint != "") {
1509 // Start by making a copy of the original matchable.
1510 auto AliasII = llvm::make_unique<MatchableInfo>(*II);
1512 // Adjust it to be a two-operand alias.
1513 AliasII->formTwoOperandAlias(Constraint);
1515 // Add the alias to the matchables list.
1516 NewMatchables.push_back(std::move(AliasII));
1519 II->buildAliasResultOperands();
1521 if (!NewMatchables.empty())
1522 Matchables.insert(Matchables.end(),
1523 std::make_move_iterator(NewMatchables.begin()),
1524 std::make_move_iterator(NewMatchables.end()));
1526 // Process token alias definitions and set up the associated superclass
1528 std::vector<Record*> AllTokenAliases =
1529 Records.getAllDerivedDefinitions("TokenAlias");
1530 for (Record *Rec : AllTokenAliases) {
1531 ClassInfo *FromClass = getTokenClass(Rec->getValueAsString("FromToken"));
1532 ClassInfo *ToClass = getTokenClass(Rec->getValueAsString("ToToken"));
1533 if (FromClass == ToClass)
1534 PrintFatalError(Rec->getLoc(),
1535 "error: Destination value identical to source value.");
1536 FromClass->SuperClasses.push_back(ToClass);
1539 // Reorder classes so that classes precede super classes.
1543 /// buildInstructionOperandReference - The specified operand is a reference to a
1544 /// named operand such as $src. Resolve the Class and OperandInfo pointers.
1545 void AsmMatcherInfo::
1546 buildInstructionOperandReference(MatchableInfo *II,
1547 StringRef OperandName,
1548 unsigned AsmOpIdx) {
1549 const CodeGenInstruction &CGI = *II->DefRec.get<const CodeGenInstruction*>();
1550 const CGIOperandList &Operands = CGI.Operands;
1551 MatchableInfo::AsmOperand *Op = &II->AsmOperands[AsmOpIdx];
1553 // Map this token to an operand.
1555 if (!Operands.hasOperandNamed(OperandName, Idx))
1556 PrintFatalError(II->TheDef->getLoc(),
1557 "error: unable to find operand: '" + OperandName + "'");
1559 // If the instruction operand has multiple suboperands, but the parser
1560 // match class for the asm operand is still the default "ImmAsmOperand",
1561 // then handle each suboperand separately.
1562 if (Op->SubOpIdx == -1 && Operands[Idx].MINumOperands > 1) {
1563 Record *Rec = Operands[Idx].Rec;
1564 assert(Rec->isSubClassOf("Operand") && "Unexpected operand!");
1565 Record *MatchClass = Rec->getValueAsDef("ParserMatchClass");
1566 if (MatchClass && MatchClass->getValueAsString("Name") == "Imm") {
1567 // Insert remaining suboperands after AsmOpIdx in II->AsmOperands.
1568 StringRef Token = Op->Token; // save this in case Op gets moved
1569 for (unsigned SI = 1, SE = Operands[Idx].MINumOperands; SI != SE; ++SI) {
1570 MatchableInfo::AsmOperand NewAsmOp(/*IsIsolatedToken=*/true, Token);
1571 NewAsmOp.SubOpIdx = SI;
1572 II->AsmOperands.insert(II->AsmOperands.begin()+AsmOpIdx+SI, NewAsmOp);
1574 // Replace Op with first suboperand.
1575 Op = &II->AsmOperands[AsmOpIdx]; // update the pointer in case it moved
1580 // Set up the operand class.
1581 Op->Class = getOperandClass(Operands[Idx], Op->SubOpIdx);
1583 // If the named operand is tied, canonicalize it to the untied operand.
1584 // For example, something like:
1585 // (outs GPR:$dst), (ins GPR:$src)
1586 // with an asmstring of
1588 // we want to canonicalize to:
1590 // so that we know how to provide the $dst operand when filling in the result.
1592 if (Operands[Idx].MINumOperands == 1)
1593 OITied = Operands[Idx].getTiedRegister();
1595 // The tied operand index is an MIOperand index, find the operand that
1597 std::pair<unsigned, unsigned> Idx = Operands.getSubOperandNumber(OITied);
1598 OperandName = Operands[Idx.first].Name;
1599 Op->SubOpIdx = Idx.second;
1602 Op->SrcOpName = OperandName;
1605 /// buildAliasOperandReference - When parsing an operand reference out of the
1606 /// matching string (e.g. "movsx $src, $dst"), determine what the class of the
1607 /// operand reference is by looking it up in the result pattern definition.
1608 void AsmMatcherInfo::buildAliasOperandReference(MatchableInfo *II,
1609 StringRef OperandName,
1610 MatchableInfo::AsmOperand &Op) {
1611 const CodeGenInstAlias &CGA = *II->DefRec.get<const CodeGenInstAlias*>();
1613 // Set up the operand class.
1614 for (unsigned i = 0, e = CGA.ResultOperands.size(); i != e; ++i)
1615 if (CGA.ResultOperands[i].isRecord() &&
1616 CGA.ResultOperands[i].getName() == OperandName) {
1617 // It's safe to go with the first one we find, because CodeGenInstAlias
1618 // validates that all operands with the same name have the same record.
1619 Op.SubOpIdx = CGA.ResultInstOperandIndex[i].second;
1620 // Use the match class from the Alias definition, not the
1621 // destination instruction, as we may have an immediate that's
1622 // being munged by the match class.
1623 Op.Class = getOperandClass(CGA.ResultOperands[i].getRecord(),
1625 Op.SrcOpName = OperandName;
1629 PrintFatalError(II->TheDef->getLoc(),
1630 "error: unable to find operand: '" + OperandName + "'");
1633 void MatchableInfo::buildInstructionResultOperands() {
1634 const CodeGenInstruction *ResultInst = getResultInst();
1636 // Loop over all operands of the result instruction, determining how to
1638 for (const CGIOperandList::OperandInfo &OpInfo : ResultInst->Operands) {
1639 // If this is a tied operand, just copy from the previously handled operand.
1641 if (OpInfo.MINumOperands == 1)
1642 TiedOp = OpInfo.getTiedRegister();
1644 ResOperands.push_back(ResOperand::getTiedOp(TiedOp));
1648 // Find out what operand from the asmparser this MCInst operand comes from.
1649 int SrcOperand = findAsmOperandNamed(OpInfo.Name);
1650 if (OpInfo.Name.empty() || SrcOperand == -1) {
1651 // This may happen for operands that are tied to a suboperand of a
1652 // complex operand. Simply use a dummy value here; nobody should
1653 // use this operand slot.
1654 // FIXME: The long term goal is for the MCOperand list to not contain
1655 // tied operands at all.
1656 ResOperands.push_back(ResOperand::getImmOp(0));
1660 // Check if the one AsmOperand populates the entire operand.
1661 unsigned NumOperands = OpInfo.MINumOperands;
1662 if (AsmOperands[SrcOperand].SubOpIdx == -1) {
1663 ResOperands.push_back(ResOperand::getRenderedOp(SrcOperand, NumOperands));
1667 // Add a separate ResOperand for each suboperand.
1668 for (unsigned AI = 0; AI < NumOperands; ++AI) {
1669 assert(AsmOperands[SrcOperand+AI].SubOpIdx == (int)AI &&
1670 AsmOperands[SrcOperand+AI].SrcOpName == OpInfo.Name &&
1671 "unexpected AsmOperands for suboperands");
1672 ResOperands.push_back(ResOperand::getRenderedOp(SrcOperand + AI, 1));
1677 void MatchableInfo::buildAliasResultOperands() {
1678 const CodeGenInstAlias &CGA = *DefRec.get<const CodeGenInstAlias*>();
1679 const CodeGenInstruction *ResultInst = getResultInst();
1681 // Loop over all operands of the result instruction, determining how to
1683 unsigned AliasOpNo = 0;
1684 unsigned LastOpNo = CGA.ResultInstOperandIndex.size();
1685 for (unsigned i = 0, e = ResultInst->Operands.size(); i != e; ++i) {
1686 const CGIOperandList::OperandInfo *OpInfo = &ResultInst->Operands[i];
1688 // If this is a tied operand, just copy from the previously handled operand.
1690 if (OpInfo->MINumOperands == 1)
1691 TiedOp = OpInfo->getTiedRegister();
1693 ResOperands.push_back(ResOperand::getTiedOp(TiedOp));
1697 // Handle all the suboperands for this operand.
1698 const std::string &OpName = OpInfo->Name;
1699 for ( ; AliasOpNo < LastOpNo &&
1700 CGA.ResultInstOperandIndex[AliasOpNo].first == i; ++AliasOpNo) {
1701 int SubIdx = CGA.ResultInstOperandIndex[AliasOpNo].second;
1703 // Find out what operand from the asmparser that this MCInst operand
1705 switch (CGA.ResultOperands[AliasOpNo].Kind) {
1706 case CodeGenInstAlias::ResultOperand::K_Record: {
1707 StringRef Name = CGA.ResultOperands[AliasOpNo].getName();
1708 int SrcOperand = findAsmOperand(Name, SubIdx);
1709 if (SrcOperand == -1)
1710 PrintFatalError(TheDef->getLoc(), "Instruction '" +
1711 TheDef->getName() + "' has operand '" + OpName +
1712 "' that doesn't appear in asm string!");
1713 unsigned NumOperands = (SubIdx == -1 ? OpInfo->MINumOperands : 1);
1714 ResOperands.push_back(ResOperand::getRenderedOp(SrcOperand,
1718 case CodeGenInstAlias::ResultOperand::K_Imm: {
1719 int64_t ImmVal = CGA.ResultOperands[AliasOpNo].getImm();
1720 ResOperands.push_back(ResOperand::getImmOp(ImmVal));
1723 case CodeGenInstAlias::ResultOperand::K_Reg: {
1724 Record *Reg = CGA.ResultOperands[AliasOpNo].getRegister();
1725 ResOperands.push_back(ResOperand::getRegOp(Reg));
1733 static unsigned getConverterOperandID(const std::string &Name,
1734 SmallSetVector<std::string, 16> &Table,
1736 IsNew = Table.insert(Name);
1738 unsigned ID = IsNew ? Table.size() - 1 :
1739 std::find(Table.begin(), Table.end(), Name) - Table.begin();
1741 assert(ID < Table.size());
1747 static void emitConvertFuncs(CodeGenTarget &Target, StringRef ClassName,
1748 std::vector<std::unique_ptr<MatchableInfo>> &Infos,
1749 bool HasMnemonicFirst, raw_ostream &OS) {
1750 SmallSetVector<std::string, 16> OperandConversionKinds;
1751 SmallSetVector<std::string, 16> InstructionConversionKinds;
1752 std::vector<std::vector<uint8_t> > ConversionTable;
1753 size_t MaxRowLength = 2; // minimum is custom converter plus terminator.
1755 // TargetOperandClass - This is the target's operand class, like X86Operand.
1756 std::string TargetOperandClass = Target.getName() + "Operand";
1758 // Write the convert function to a separate stream, so we can drop it after
1759 // the enum. We'll build up the conversion handlers for the individual
1760 // operand types opportunistically as we encounter them.
1761 std::string ConvertFnBody;
1762 raw_string_ostream CvtOS(ConvertFnBody);
1763 // Start the unified conversion function.
1764 CvtOS << "void " << Target.getName() << ClassName << "::\n"
1765 << "convertToMCInst(unsigned Kind, MCInst &Inst, "
1766 << "unsigned Opcode,\n"
1767 << " const OperandVector"
1768 << " &Operands) {\n"
1769 << " assert(Kind < CVT_NUM_SIGNATURES && \"Invalid signature!\");\n"
1770 << " const uint8_t *Converter = ConversionTable[Kind];\n"
1771 << " Inst.setOpcode(Opcode);\n"
1772 << " for (const uint8_t *p = Converter; *p; p+= 2) {\n"
1773 << " switch (*p) {\n"
1774 << " default: llvm_unreachable(\"invalid conversion entry!\");\n"
1775 << " case CVT_Reg:\n"
1776 << " static_cast<" << TargetOperandClass
1777 << "&>(*Operands[*(p + 1)]).addRegOperands(Inst, 1);\n"
1779 << " case CVT_Tied:\n"
1780 << " Inst.addOperand(Inst.getOperand(*(p + 1)));\n"
1783 std::string OperandFnBody;
1784 raw_string_ostream OpOS(OperandFnBody);
1785 // Start the operand number lookup function.
1786 OpOS << "void " << Target.getName() << ClassName << "::\n"
1787 << "convertToMapAndConstraints(unsigned Kind,\n";
1789 OpOS << "const OperandVector &Operands) {\n"
1790 << " assert(Kind < CVT_NUM_SIGNATURES && \"Invalid signature!\");\n"
1791 << " unsigned NumMCOperands = 0;\n"
1792 << " const uint8_t *Converter = ConversionTable[Kind];\n"
1793 << " for (const uint8_t *p = Converter; *p; p+= 2) {\n"
1794 << " switch (*p) {\n"
1795 << " default: llvm_unreachable(\"invalid conversion entry!\");\n"
1796 << " case CVT_Reg:\n"
1797 << " Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);\n"
1798 << " Operands[*(p + 1)]->setConstraint(\"r\");\n"
1799 << " ++NumMCOperands;\n"
1801 << " case CVT_Tied:\n"
1802 << " ++NumMCOperands;\n"
1805 // Pre-populate the operand conversion kinds with the standard always
1806 // available entries.
1807 OperandConversionKinds.insert("CVT_Done");
1808 OperandConversionKinds.insert("CVT_Reg");
1809 OperandConversionKinds.insert("CVT_Tied");
1810 enum { CVT_Done, CVT_Reg, CVT_Tied };
1812 for (auto &II : Infos) {
1813 // Check if we have a custom match function.
1814 std::string AsmMatchConverter =
1815 II->getResultInst()->TheDef->getValueAsString("AsmMatchConverter");
1816 if (!AsmMatchConverter.empty() && II->UseInstAsmMatchConverter) {
1817 std::string Signature = "ConvertCustom_" + AsmMatchConverter;
1818 II->ConversionFnKind = Signature;
1820 // Check if we have already generated this signature.
1821 if (!InstructionConversionKinds.insert(Signature))
1824 // Remember this converter for the kind enum.
1825 unsigned KindID = OperandConversionKinds.size();
1826 OperandConversionKinds.insert("CVT_" +
1827 getEnumNameForToken(AsmMatchConverter));
1829 // Add the converter row for this instruction.
1830 ConversionTable.emplace_back();
1831 ConversionTable.back().push_back(KindID);
1832 ConversionTable.back().push_back(CVT_Done);
1834 // Add the handler to the conversion driver function.
1835 CvtOS << " case CVT_"
1836 << getEnumNameForToken(AsmMatchConverter) << ":\n"
1837 << " " << AsmMatchConverter << "(Inst, Operands);\n"
1840 // FIXME: Handle the operand number lookup for custom match functions.
1844 // Build the conversion function signature.
1845 std::string Signature = "Convert";
1847 std::vector<uint8_t> ConversionRow;
1849 // Compute the convert enum and the case body.
1850 MaxRowLength = std::max(MaxRowLength, II->ResOperands.size()*2 + 1 );
1852 for (unsigned i = 0, e = II->ResOperands.size(); i != e; ++i) {
1853 const MatchableInfo::ResOperand &OpInfo = II->ResOperands[i];
1855 // Generate code to populate each result operand.
1856 switch (OpInfo.Kind) {
1857 case MatchableInfo::ResOperand::RenderAsmOperand: {
1858 // This comes from something we parsed.
1859 const MatchableInfo::AsmOperand &Op =
1860 II->AsmOperands[OpInfo.AsmOperandNum];
1862 // Registers are always converted the same, don't duplicate the
1863 // conversion function based on them.
1866 Class = Op.Class->isRegisterClass() ? "Reg" : Op.Class->ClassName;
1868 Signature += utostr(OpInfo.MINumOperands);
1869 Signature += "_" + itostr(OpInfo.AsmOperandNum);
1871 // Add the conversion kind, if necessary, and get the associated ID
1872 // the index of its entry in the vector).
1873 std::string Name = "CVT_" + (Op.Class->isRegisterClass() ? "Reg" :
1874 Op.Class->RenderMethod);
1875 Name = getEnumNameForToken(Name);
1877 bool IsNewConverter = false;
1878 unsigned ID = getConverterOperandID(Name, OperandConversionKinds,
1881 // Add the operand entry to the instruction kind conversion row.
1882 ConversionRow.push_back(ID);
1883 ConversionRow.push_back(OpInfo.AsmOperandNum + HasMnemonicFirst);
1885 if (!IsNewConverter)
1888 // This is a new operand kind. Add a handler for it to the
1889 // converter driver.
1890 CvtOS << " case " << Name << ":\n"
1891 << " static_cast<" << TargetOperandClass
1892 << "&>(*Operands[*(p + 1)])." << Op.Class->RenderMethod
1893 << "(Inst, " << OpInfo.MINumOperands << ");\n"
1896 // Add a handler for the operand number lookup.
1897 OpOS << " case " << Name << ":\n"
1898 << " Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);\n";
1900 if (Op.Class->isRegisterClass())
1901 OpOS << " Operands[*(p + 1)]->setConstraint(\"r\");\n";
1903 OpOS << " Operands[*(p + 1)]->setConstraint(\"m\");\n";
1904 OpOS << " NumMCOperands += " << OpInfo.MINumOperands << ";\n"
1908 case MatchableInfo::ResOperand::TiedOperand: {
1909 // If this operand is tied to a previous one, just copy the MCInst
1910 // operand from the earlier one.We can only tie single MCOperand values.
1911 assert(OpInfo.MINumOperands == 1 && "Not a singular MCOperand");
1912 unsigned TiedOp = OpInfo.TiedOperandNum;
1913 assert(i > TiedOp && "Tied operand precedes its target!");
1914 Signature += "__Tie" + utostr(TiedOp);
1915 ConversionRow.push_back(CVT_Tied);
1916 ConversionRow.push_back(TiedOp);
1919 case MatchableInfo::ResOperand::ImmOperand: {
1920 int64_t Val = OpInfo.ImmVal;
1921 std::string Ty = "imm_" + itostr(Val);
1922 Ty = getEnumNameForToken(Ty);
1923 Signature += "__" + Ty;
1925 std::string Name = "CVT_" + Ty;
1926 bool IsNewConverter = false;
1927 unsigned ID = getConverterOperandID(Name, OperandConversionKinds,
1929 // Add the operand entry to the instruction kind conversion row.
1930 ConversionRow.push_back(ID);
1931 ConversionRow.push_back(0);
1933 if (!IsNewConverter)
1936 CvtOS << " case " << Name << ":\n"
1937 << " Inst.addOperand(MCOperand::createImm(" << Val << "));\n"
1940 OpOS << " case " << Name << ":\n"
1941 << " Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);\n"
1942 << " Operands[*(p + 1)]->setConstraint(\"\");\n"
1943 << " ++NumMCOperands;\n"
1947 case MatchableInfo::ResOperand::RegOperand: {
1948 std::string Reg, Name;
1949 if (!OpInfo.Register) {
1953 Reg = getQualifiedName(OpInfo.Register);
1954 Name = "reg" + OpInfo.Register->getName();
1956 Signature += "__" + Name;
1957 Name = "CVT_" + Name;
1958 bool IsNewConverter = false;
1959 unsigned ID = getConverterOperandID(Name, OperandConversionKinds,
1961 // Add the operand entry to the instruction kind conversion row.
1962 ConversionRow.push_back(ID);
1963 ConversionRow.push_back(0);
1965 if (!IsNewConverter)
1967 CvtOS << " case " << Name << ":\n"
1968 << " Inst.addOperand(MCOperand::createReg(" << Reg << "));\n"
1971 OpOS << " case " << Name << ":\n"
1972 << " Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);\n"
1973 << " Operands[*(p + 1)]->setConstraint(\"m\");\n"
1974 << " ++NumMCOperands;\n"
1980 // If there were no operands, add to the signature to that effect
1981 if (Signature == "Convert")
1982 Signature += "_NoOperands";
1984 II->ConversionFnKind = Signature;
1986 // Save the signature. If we already have it, don't add a new row
1988 if (!InstructionConversionKinds.insert(Signature))
1991 // Add the row to the table.
1992 ConversionTable.push_back(std::move(ConversionRow));
1995 // Finish up the converter driver function.
1996 CvtOS << " }\n }\n}\n\n";
1998 // Finish up the operand number lookup function.
1999 OpOS << " }\n }\n}\n\n";
2001 OS << "namespace {\n";
2003 // Output the operand conversion kind enum.
2004 OS << "enum OperatorConversionKind {\n";
2005 for (const std::string &Converter : OperandConversionKinds)
2006 OS << " " << Converter << ",\n";
2007 OS << " CVT_NUM_CONVERTERS\n";
2010 // Output the instruction conversion kind enum.
2011 OS << "enum InstructionConversionKind {\n";
2012 for (const std::string &Signature : InstructionConversionKinds)
2013 OS << " " << Signature << ",\n";
2014 OS << " CVT_NUM_SIGNATURES\n";
2018 OS << "} // end anonymous namespace\n\n";
2020 // Output the conversion table.
2021 OS << "static const uint8_t ConversionTable[CVT_NUM_SIGNATURES]["
2022 << MaxRowLength << "] = {\n";
2024 for (unsigned Row = 0, ERow = ConversionTable.size(); Row != ERow; ++Row) {
2025 assert(ConversionTable[Row].size() % 2 == 0 && "bad conversion row!");
2026 OS << " // " << InstructionConversionKinds[Row] << "\n";
2028 for (unsigned i = 0, e = ConversionTable[Row].size(); i != e; i += 2)
2029 OS << OperandConversionKinds[ConversionTable[Row][i]] << ", "
2030 << (unsigned)(ConversionTable[Row][i + 1]) << ", ";
2031 OS << "CVT_Done },\n";
2036 // Spit out the conversion driver function.
2039 // Spit out the operand number lookup function.
2043 /// emitMatchClassEnumeration - Emit the enumeration for match class kinds.
2044 static void emitMatchClassEnumeration(CodeGenTarget &Target,
2045 std::forward_list<ClassInfo> &Infos,
2047 OS << "namespace {\n\n";
2049 OS << "/// MatchClassKind - The kinds of classes which participate in\n"
2050 << "/// instruction matching.\n";
2051 OS << "enum MatchClassKind {\n";
2052 OS << " InvalidMatchClass = 0,\n";
2053 for (const auto &CI : Infos) {
2054 OS << " " << CI.Name << ", // ";
2055 if (CI.Kind == ClassInfo::Token) {
2056 OS << "'" << CI.ValueName << "'\n";
2057 } else if (CI.isRegisterClass()) {
2058 if (!CI.ValueName.empty())
2059 OS << "register class '" << CI.ValueName << "'\n";
2061 OS << "derived register class\n";
2063 OS << "user defined class '" << CI.ValueName << "'\n";
2066 OS << " NumMatchClassKinds\n";
2072 /// emitValidateOperandClass - Emit the function to validate an operand class.
2073 static void emitValidateOperandClass(AsmMatcherInfo &Info,
2075 OS << "static unsigned validateOperandClass(MCParsedAsmOperand &GOp, "
2076 << "MatchClassKind Kind) {\n";
2077 OS << " " << Info.Target.getName() << "Operand &Operand = ("
2078 << Info.Target.getName() << "Operand&)GOp;\n";
2080 // The InvalidMatchClass is not to match any operand.
2081 OS << " if (Kind == InvalidMatchClass)\n";
2082 OS << " return MCTargetAsmParser::Match_InvalidOperand;\n\n";
2084 // Check for Token operands first.
2085 // FIXME: Use a more specific diagnostic type.
2086 OS << " if (Operand.isToken())\n";
2087 OS << " return isSubclass(matchTokenString(Operand.getToken()), Kind) ?\n"
2088 << " MCTargetAsmParser::Match_Success :\n"
2089 << " MCTargetAsmParser::Match_InvalidOperand;\n\n";
2091 // Check the user classes. We don't care what order since we're only
2092 // actually matching against one of them.
2093 for (const auto &CI : Info.Classes) {
2094 if (!CI.isUserClass())
2097 OS << " // '" << CI.ClassName << "' class\n";
2098 OS << " if (Kind == " << CI.Name << ") {\n";
2099 OS << " if (Operand." << CI.PredicateMethod << "())\n";
2100 OS << " return MCTargetAsmParser::Match_Success;\n";
2101 if (!CI.DiagnosticType.empty())
2102 OS << " return " << Info.Target.getName() << "AsmParser::Match_"
2103 << CI.DiagnosticType << ";\n";
2107 // Check for register operands, including sub-classes.
2108 OS << " if (Operand.isReg()) {\n";
2109 OS << " MatchClassKind OpKind;\n";
2110 OS << " switch (Operand.getReg()) {\n";
2111 OS << " default: OpKind = InvalidMatchClass; break;\n";
2112 for (const auto &RC : Info.RegisterClasses)
2113 OS << " case " << Info.Target.getName() << "::"
2114 << RC.first->getName() << ": OpKind = " << RC.second->Name
2117 OS << " return isSubclass(OpKind, Kind) ? "
2118 << "MCTargetAsmParser::Match_Success :\n "
2119 << " MCTargetAsmParser::Match_InvalidOperand;\n }\n\n";
2121 // Generic fallthrough match failure case for operands that don't have
2122 // specialized diagnostic types.
2123 OS << " return MCTargetAsmParser::Match_InvalidOperand;\n";
2127 /// emitIsSubclass - Emit the subclass predicate function.
2128 static void emitIsSubclass(CodeGenTarget &Target,
2129 std::forward_list<ClassInfo> &Infos,
2131 OS << "/// isSubclass - Compute whether \\p A is a subclass of \\p B.\n";
2132 OS << "static bool isSubclass(MatchClassKind A, MatchClassKind B) {\n";
2133 OS << " if (A == B)\n";
2134 OS << " return true;\n\n";
2136 bool EmittedSwitch = false;
2137 for (const auto &A : Infos) {
2138 std::vector<StringRef> SuperClasses;
2139 for (const auto &B : Infos) {
2140 if (&A != &B && A.isSubsetOf(B))
2141 SuperClasses.push_back(B.Name);
2144 if (SuperClasses.empty())
2147 // If this is the first SuperClass, emit the switch header.
2148 if (!EmittedSwitch) {
2149 OS << " switch (A) {\n";
2150 OS << " default:\n";
2151 OS << " return false;\n";
2152 EmittedSwitch = true;
2155 OS << "\n case " << A.Name << ":\n";
2157 if (SuperClasses.size() == 1) {
2158 OS << " return B == " << SuperClasses.back() << ";\n";
2162 if (!SuperClasses.empty()) {
2163 OS << " switch (B) {\n";
2164 OS << " default: return false;\n";
2165 for (StringRef SC : SuperClasses)
2166 OS << " case " << SC << ": return true;\n";
2169 // No case statement to emit
2170 OS << " return false;\n";
2174 // If there were case statements emitted into the string stream write the
2179 OS << " return false;\n";
2184 /// emitMatchTokenString - Emit the function to match a token string to the
2185 /// appropriate match class value.
2186 static void emitMatchTokenString(CodeGenTarget &Target,
2187 std::forward_list<ClassInfo> &Infos,
2189 // Construct the match list.
2190 std::vector<StringMatcher::StringPair> Matches;
2191 for (const auto &CI : Infos) {
2192 if (CI.Kind == ClassInfo::Token)
2193 Matches.emplace_back(CI.ValueName, "return " + CI.Name + ";");
2196 OS << "static MatchClassKind matchTokenString(StringRef Name) {\n";
2198 StringMatcher("Name", Matches, OS).Emit();
2200 OS << " return InvalidMatchClass;\n";
2204 /// emitMatchRegisterName - Emit the function to match a string to the target
2205 /// specific register enum.
2206 static void emitMatchRegisterName(CodeGenTarget &Target, Record *AsmParser,
2208 // Construct the match list.
2209 std::vector<StringMatcher::StringPair> Matches;
2210 const auto &Regs = Target.getRegBank().getRegisters();
2211 for (const CodeGenRegister &Reg : Regs) {
2212 if (Reg.TheDef->getValueAsString("AsmName").empty())
2215 Matches.emplace_back(Reg.TheDef->getValueAsString("AsmName"),
2216 "return " + utostr(Reg.EnumValue) + ";");
2219 OS << "static unsigned MatchRegisterName(StringRef Name) {\n";
2221 StringMatcher("Name", Matches, OS).Emit();
2223 OS << " return 0;\n";
2227 static const char *getMinimalTypeForRange(uint64_t Range) {
2228 assert(Range <= 0xFFFFFFFFFFFFFFFFULL && "Enum too large");
2229 if (Range > 0xFFFFFFFFULL)
2238 static const char *getMinimalRequiredFeaturesType(const AsmMatcherInfo &Info) {
2239 uint64_t MaxIndex = Info.SubtargetFeatures.size();
2242 return getMinimalTypeForRange(1ULL << MaxIndex);
2245 /// emitSubtargetFeatureFlagEnumeration - Emit the subtarget feature flag
2247 static void emitSubtargetFeatureFlagEnumeration(AsmMatcherInfo &Info,
2249 OS << "// Flags for subtarget features that participate in "
2250 << "instruction matching.\n";
2251 OS << "enum SubtargetFeatureFlag : " << getMinimalRequiredFeaturesType(Info)
2253 for (const auto &SF : Info.SubtargetFeatures) {
2254 const SubtargetFeatureInfo &SFI = SF.second;
2255 OS << " " << SFI.getEnumName() << " = (1ULL << " << SFI.Index << "),\n";
2257 OS << " Feature_None = 0\n";
2261 /// emitOperandDiagnosticTypes - Emit the operand matching diagnostic types.
2262 static void emitOperandDiagnosticTypes(AsmMatcherInfo &Info, raw_ostream &OS) {
2263 // Get the set of diagnostic types from all of the operand classes.
2264 std::set<StringRef> Types;
2265 for (const auto &OpClassEntry : Info.AsmOperandClasses) {
2266 if (!OpClassEntry.second->DiagnosticType.empty())
2267 Types.insert(OpClassEntry.second->DiagnosticType);
2270 if (Types.empty()) return;
2272 // Now emit the enum entries.
2273 for (StringRef Type : Types)
2274 OS << " Match_" << Type << ",\n";
2275 OS << " END_OPERAND_DIAGNOSTIC_TYPES\n";
2278 /// emitGetSubtargetFeatureName - Emit the helper function to get the
2279 /// user-level name for a subtarget feature.
2280 static void emitGetSubtargetFeatureName(AsmMatcherInfo &Info, raw_ostream &OS) {
2281 OS << "// User-level names for subtarget features that participate in\n"
2282 << "// instruction matching.\n"
2283 << "static const char *getSubtargetFeatureName(uint64_t Val) {\n";
2284 if (!Info.SubtargetFeatures.empty()) {
2285 OS << " switch(Val) {\n";
2286 for (const auto &SF : Info.SubtargetFeatures) {
2287 const SubtargetFeatureInfo &SFI = SF.second;
2288 // FIXME: Totally just a placeholder name to get the algorithm working.
2289 OS << " case " << SFI.getEnumName() << ": return \""
2290 << SFI.TheDef->getValueAsString("PredicateName") << "\";\n";
2292 OS << " default: return \"(unknown)\";\n";
2295 // Nothing to emit, so skip the switch
2296 OS << " return \"(unknown)\";\n";
2301 /// emitComputeAvailableFeatures - Emit the function to compute the list of
2302 /// available features given a subtarget.
2303 static void emitComputeAvailableFeatures(AsmMatcherInfo &Info,
2305 std::string ClassName =
2306 Info.AsmParser->getValueAsString("AsmParserClassName");
2308 OS << "uint64_t " << Info.Target.getName() << ClassName << "::\n"
2309 << "ComputeAvailableFeatures(const FeatureBitset& FB) const {\n";
2310 OS << " uint64_t Features = 0;\n";
2311 for (const auto &SF : Info.SubtargetFeatures) {
2312 const SubtargetFeatureInfo &SFI = SF.second;
2315 std::string CondStorage =
2316 SFI.TheDef->getValueAsString("AssemblerCondString");
2317 StringRef Conds = CondStorage;
2318 std::pair<StringRef,StringRef> Comma = Conds.split(',');
2325 StringRef Cond = Comma.first;
2326 if (Cond[0] == '!') {
2328 Cond = Cond.substr(1);
2334 OS << "FB[" << Info.Target.getName() << "::" << Cond << "])";
2336 if (Comma.second.empty())
2340 Comma = Comma.second.split(',');
2344 OS << " Features |= " << SFI.getEnumName() << ";\n";
2346 OS << " return Features;\n";
2350 static std::string GetAliasRequiredFeatures(Record *R,
2351 const AsmMatcherInfo &Info) {
2352 std::vector<Record*> ReqFeatures = R->getValueAsListOfDefs("Predicates");
2354 unsigned NumFeatures = 0;
2355 for (unsigned i = 0, e = ReqFeatures.size(); i != e; ++i) {
2356 const SubtargetFeatureInfo *F = Info.getSubtargetFeature(ReqFeatures[i]);
2359 PrintFatalError(R->getLoc(), "Predicate '" + ReqFeatures[i]->getName() +
2360 "' is not marked as an AssemblerPredicate!");
2365 Result += F->getEnumName();
2369 if (NumFeatures > 1)
2370 Result = '(' + Result + ')';
2374 static void emitMnemonicAliasVariant(raw_ostream &OS,const AsmMatcherInfo &Info,
2375 std::vector<Record*> &Aliases,
2376 unsigned Indent = 0,
2377 StringRef AsmParserVariantName = StringRef()){
2378 // Keep track of all the aliases from a mnemonic. Use an std::map so that the
2379 // iteration order of the map is stable.
2380 std::map<std::string, std::vector<Record*> > AliasesFromMnemonic;
2382 for (Record *R : Aliases) {
2383 // FIXME: Allow AssemblerVariantName to be a comma separated list.
2384 std::string AsmVariantName = R->getValueAsString("AsmVariantName");
2385 if (AsmVariantName != AsmParserVariantName)
2387 AliasesFromMnemonic[R->getValueAsString("FromMnemonic")].push_back(R);
2389 if (AliasesFromMnemonic.empty())
2392 // Process each alias a "from" mnemonic at a time, building the code executed
2393 // by the string remapper.
2394 std::vector<StringMatcher::StringPair> Cases;
2395 for (const auto &AliasEntry : AliasesFromMnemonic) {
2396 const std::vector<Record*> &ToVec = AliasEntry.second;
2398 // Loop through each alias and emit code that handles each case. If there
2399 // are two instructions without predicates, emit an error. If there is one,
2401 std::string MatchCode;
2402 int AliasWithNoPredicate = -1;
2404 for (unsigned i = 0, e = ToVec.size(); i != e; ++i) {
2405 Record *R = ToVec[i];
2406 std::string FeatureMask = GetAliasRequiredFeatures(R, Info);
2408 // If this unconditionally matches, remember it for later and diagnose
2410 if (FeatureMask.empty()) {
2411 if (AliasWithNoPredicate != -1) {
2412 // We can't have two aliases from the same mnemonic with no predicate.
2413 PrintError(ToVec[AliasWithNoPredicate]->getLoc(),
2414 "two MnemonicAliases with the same 'from' mnemonic!");
2415 PrintFatalError(R->getLoc(), "this is the other MnemonicAlias.");
2418 AliasWithNoPredicate = i;
2421 if (R->getValueAsString("ToMnemonic") == AliasEntry.first)
2422 PrintFatalError(R->getLoc(), "MnemonicAlias to the same string");
2424 if (!MatchCode.empty())
2425 MatchCode += "else ";
2426 MatchCode += "if ((Features & " + FeatureMask + ") == "+FeatureMask+")\n";
2427 MatchCode += " Mnemonic = \"" +R->getValueAsString("ToMnemonic")+"\";\n";
2430 if (AliasWithNoPredicate != -1) {
2431 Record *R = ToVec[AliasWithNoPredicate];
2432 if (!MatchCode.empty())
2433 MatchCode += "else\n ";
2434 MatchCode += "Mnemonic = \"" + R->getValueAsString("ToMnemonic")+"\";\n";
2437 MatchCode += "return;";
2439 Cases.push_back(std::make_pair(AliasEntry.first, MatchCode));
2441 StringMatcher("Mnemonic", Cases, OS).Emit(Indent);
2444 /// emitMnemonicAliases - If the target has any MnemonicAlias<> definitions,
2445 /// emit a function for them and return true, otherwise return false.
2446 static bool emitMnemonicAliases(raw_ostream &OS, const AsmMatcherInfo &Info,
2447 CodeGenTarget &Target) {
2448 // Ignore aliases when match-prefix is set.
2449 if (!MatchPrefix.empty())
2452 std::vector<Record*> Aliases =
2453 Info.getRecords().getAllDerivedDefinitions("MnemonicAlias");
2454 if (Aliases.empty()) return false;
2456 OS << "static void applyMnemonicAliases(StringRef &Mnemonic, "
2457 "uint64_t Features, unsigned VariantID) {\n";
2458 OS << " switch (VariantID) {\n";
2459 unsigned VariantCount = Target.getAsmParserVariantCount();
2460 for (unsigned VC = 0; VC != VariantCount; ++VC) {
2461 Record *AsmVariant = Target.getAsmParserVariant(VC);
2462 int AsmParserVariantNo = AsmVariant->getValueAsInt("Variant");
2463 std::string AsmParserVariantName = AsmVariant->getValueAsString("Name");
2464 OS << " case " << AsmParserVariantNo << ":\n";
2465 emitMnemonicAliasVariant(OS, Info, Aliases, /*Indent=*/2,
2466 AsmParserVariantName);
2471 // Emit aliases that apply to all variants.
2472 emitMnemonicAliasVariant(OS, Info, Aliases);
2479 static void emitCustomOperandParsing(raw_ostream &OS, CodeGenTarget &Target,
2480 const AsmMatcherInfo &Info, StringRef ClassName,
2481 StringToOffsetTable &StringTable,
2482 unsigned MaxMnemonicIndex, bool HasMnemonicFirst) {
2483 unsigned MaxMask = 0;
2484 for (const OperandMatchEntry &OMI : Info.OperandMatchInfo) {
2485 MaxMask |= OMI.OperandMask;
2488 // Emit the static custom operand parsing table;
2489 OS << "namespace {\n";
2490 OS << " struct OperandMatchEntry {\n";
2491 OS << " " << getMinimalRequiredFeaturesType(Info)
2492 << " RequiredFeatures;\n";
2493 OS << " " << getMinimalTypeForRange(MaxMnemonicIndex)
2495 OS << " " << getMinimalTypeForRange(std::distance(
2496 Info.Classes.begin(), Info.Classes.end())) << " Class;\n";
2497 OS << " " << getMinimalTypeForRange(MaxMask)
2498 << " OperandMask;\n\n";
2499 OS << " StringRef getMnemonic() const {\n";
2500 OS << " return StringRef(MnemonicTable + Mnemonic + 1,\n";
2501 OS << " MnemonicTable[Mnemonic]);\n";
2505 OS << " // Predicate for searching for an opcode.\n";
2506 OS << " struct LessOpcodeOperand {\n";
2507 OS << " bool operator()(const OperandMatchEntry &LHS, StringRef RHS) {\n";
2508 OS << " return LHS.getMnemonic() < RHS;\n";
2510 OS << " bool operator()(StringRef LHS, const OperandMatchEntry &RHS) {\n";
2511 OS << " return LHS < RHS.getMnemonic();\n";
2513 OS << " bool operator()(const OperandMatchEntry &LHS,";
2514 OS << " const OperandMatchEntry &RHS) {\n";
2515 OS << " return LHS.getMnemonic() < RHS.getMnemonic();\n";
2519 OS << "} // end anonymous namespace.\n\n";
2521 OS << "static const OperandMatchEntry OperandMatchTable["
2522 << Info.OperandMatchInfo.size() << "] = {\n";
2524 OS << " /* Operand List Mask, Mnemonic, Operand Class, Features */\n";
2525 for (const OperandMatchEntry &OMI : Info.OperandMatchInfo) {
2526 const MatchableInfo &II = *OMI.MI;
2530 // Write the required features mask.
2531 if (!II.RequiredFeatures.empty()) {
2532 for (unsigned i = 0, e = II.RequiredFeatures.size(); i != e; ++i) {
2534 OS << II.RequiredFeatures[i]->getEnumName();
2539 // Store a pascal-style length byte in the mnemonic.
2540 std::string LenMnemonic = char(II.Mnemonic.size()) + II.Mnemonic.str();
2541 OS << ", " << StringTable.GetOrAddStringOffset(LenMnemonic, false)
2542 << " /* " << II.Mnemonic << " */, ";
2546 OS << ", " << OMI.OperandMask;
2548 bool printComma = false;
2549 for (int i = 0, e = 31; i !=e; ++i)
2550 if (OMI.OperandMask & (1 << i)) {
2562 // Emit the operand class switch to call the correct custom parser for
2563 // the found operand class.
2564 OS << Target.getName() << ClassName << "::OperandMatchResultTy "
2565 << Target.getName() << ClassName << "::\n"
2566 << "tryCustomParseOperand(OperandVector"
2567 << " &Operands,\n unsigned MCK) {\n\n"
2568 << " switch(MCK) {\n";
2570 for (const auto &CI : Info.Classes) {
2571 if (CI.ParserMethod.empty())
2573 OS << " case " << CI.Name << ":\n"
2574 << " return " << CI.ParserMethod << "(Operands);\n";
2577 OS << " default:\n";
2578 OS << " return MatchOperand_NoMatch;\n";
2580 OS << " return MatchOperand_NoMatch;\n";
2583 // Emit the static custom operand parser. This code is very similar with
2584 // the other matcher. Also use MatchResultTy here just in case we go for
2585 // a better error handling.
2586 OS << Target.getName() << ClassName << "::OperandMatchResultTy "
2587 << Target.getName() << ClassName << "::\n"
2588 << "MatchOperandParserImpl(OperandVector"
2589 << " &Operands,\n StringRef Mnemonic) {\n";
2591 // Emit code to get the available features.
2592 OS << " // Get the current feature set.\n";
2593 OS << " uint64_t AvailableFeatures = getAvailableFeatures();\n\n";
2595 OS << " // Get the next operand index.\n";
2596 OS << " unsigned NextOpNum = Operands.size()"
2597 << (HasMnemonicFirst ? " - 1" : "") << ";\n";
2599 // Emit code to search the table.
2600 OS << " // Search the table.\n";
2601 if (HasMnemonicFirst) {
2602 OS << " auto MnemonicRange =\n";
2603 OS << " std::equal_range(std::begin(OperandMatchTable), "
2604 "std::end(OperandMatchTable),\n";
2605 OS << " Mnemonic, LessOpcodeOperand());\n\n";
2607 OS << " auto MnemonicRange = std::make_pair(std::begin(OperandMatchTable),"
2608 " std::end(OperandMatchTable));\n";
2609 OS << " if (!Mnemonic.empty())\n";
2610 OS << " MnemonicRange =\n";
2611 OS << " std::equal_range(std::begin(OperandMatchTable), "
2612 "std::end(OperandMatchTable),\n";
2613 OS << " Mnemonic, LessOpcodeOperand());\n\n";
2616 OS << " if (MnemonicRange.first == MnemonicRange.second)\n";
2617 OS << " return MatchOperand_NoMatch;\n\n";
2619 OS << " for (const OperandMatchEntry *it = MnemonicRange.first,\n"
2620 << " *ie = MnemonicRange.second; it != ie; ++it) {\n";
2622 OS << " // equal_range guarantees that instruction mnemonic matches.\n";
2623 OS << " assert(Mnemonic == it->getMnemonic());\n\n";
2625 // Emit check that the required features are available.
2626 OS << " // check if the available features match\n";
2627 OS << " if ((AvailableFeatures & it->RequiredFeatures) "
2628 << "!= it->RequiredFeatures) {\n";
2629 OS << " continue;\n";
2632 // Emit check to ensure the operand number matches.
2633 OS << " // check if the operand in question has a custom parser.\n";
2634 OS << " if (!(it->OperandMask & (1 << NextOpNum)))\n";
2635 OS << " continue;\n\n";
2637 // Emit call to the custom parser method
2638 OS << " // call custom parse method to handle the operand\n";
2639 OS << " OperandMatchResultTy Result = ";
2640 OS << "tryCustomParseOperand(Operands, it->Class);\n";
2641 OS << " if (Result != MatchOperand_NoMatch)\n";
2642 OS << " return Result;\n";
2645 OS << " // Okay, we had no match.\n";
2646 OS << " return MatchOperand_NoMatch;\n";
2650 void AsmMatcherEmitter::run(raw_ostream &OS) {
2651 CodeGenTarget Target(Records);
2652 Record *AsmParser = Target.getAsmParser();
2653 std::string ClassName = AsmParser->getValueAsString("AsmParserClassName");
2655 // Compute the information on the instructions to match.
2656 AsmMatcherInfo Info(AsmParser, Target, Records);
2659 // Sort the instruction table using the partial order on classes. We use
2660 // stable_sort to ensure that ambiguous instructions are still
2661 // deterministically ordered.
2662 std::stable_sort(Info.Matchables.begin(), Info.Matchables.end(),
2663 [](const std::unique_ptr<MatchableInfo> &a,
2664 const std::unique_ptr<MatchableInfo> &b){
2667 DEBUG_WITH_TYPE("instruction_info", {
2668 for (const auto &MI : Info.Matchables)
2672 // Check for ambiguous matchables.
2673 DEBUG_WITH_TYPE("ambiguous_instrs", {
2674 unsigned NumAmbiguous = 0;
2675 for (auto I = Info.Matchables.begin(), E = Info.Matchables.end(); I != E;
2677 for (auto J = std::next(I); J != E; ++J) {
2678 const MatchableInfo &A = **I;
2679 const MatchableInfo &B = **J;
2681 if (A.couldMatchAmbiguouslyWith(B)) {
2682 errs() << "warning: ambiguous matchables:\n";
2684 errs() << "\nis incomparable with:\n";
2692 errs() << "warning: " << NumAmbiguous
2693 << " ambiguous matchables!\n";
2696 // Compute the information on the custom operand parsing.
2697 Info.buildOperandMatchInfo();
2699 bool HasMnemonicFirst = AsmParser->getValueAsBit("HasMnemonicFirst");
2701 // Write the output.
2703 // Information for the class declaration.
2704 OS << "\n#ifdef GET_ASSEMBLER_HEADER\n";
2705 OS << "#undef GET_ASSEMBLER_HEADER\n";
2706 OS << " // This should be included into the middle of the declaration of\n";
2707 OS << " // your subclasses implementation of MCTargetAsmParser.\n";
2708 OS << " uint64_t ComputeAvailableFeatures(const FeatureBitset& FB) const;\n";
2709 OS << " void convertToMCInst(unsigned Kind, MCInst &Inst, "
2710 << "unsigned Opcode,\n"
2711 << " const OperandVector "
2713 OS << " void convertToMapAndConstraints(unsigned Kind,\n ";
2714 OS << " const OperandVector &Operands) override;\n";
2715 if (HasMnemonicFirst)
2716 OS << " bool mnemonicIsValid(StringRef Mnemonic, unsigned VariantID);\n";
2717 OS << " unsigned MatchInstructionImpl(const OperandVector &Operands,\n"
2718 << " MCInst &Inst,\n"
2719 << " uint64_t &ErrorInfo,"
2720 << " bool matchingInlineAsm,\n"
2721 << " unsigned VariantID = 0);\n";
2723 if (!Info.OperandMatchInfo.empty()) {
2724 OS << "\n enum OperandMatchResultTy {\n";
2725 OS << " MatchOperand_Success, // operand matched successfully\n";
2726 OS << " MatchOperand_NoMatch, // operand did not match\n";
2727 OS << " MatchOperand_ParseFail // operand matched but had errors\n";
2729 OS << " OperandMatchResultTy MatchOperandParserImpl(\n";
2730 OS << " OperandVector &Operands,\n";
2731 OS << " StringRef Mnemonic);\n";
2733 OS << " OperandMatchResultTy tryCustomParseOperand(\n";
2734 OS << " OperandVector &Operands,\n";
2735 OS << " unsigned MCK);\n\n";
2738 OS << "#endif // GET_ASSEMBLER_HEADER_INFO\n\n";
2740 // Emit the operand match diagnostic enum names.
2741 OS << "\n#ifdef GET_OPERAND_DIAGNOSTIC_TYPES\n";
2742 OS << "#undef GET_OPERAND_DIAGNOSTIC_TYPES\n\n";
2743 emitOperandDiagnosticTypes(Info, OS);
2744 OS << "#endif // GET_OPERAND_DIAGNOSTIC_TYPES\n\n";
2747 OS << "\n#ifdef GET_REGISTER_MATCHER\n";
2748 OS << "#undef GET_REGISTER_MATCHER\n\n";
2750 // Emit the subtarget feature enumeration.
2751 emitSubtargetFeatureFlagEnumeration(Info, OS);
2753 // Emit the function to match a register name to number.
2754 // This should be omitted for Mips target
2755 if (AsmParser->getValueAsBit("ShouldEmitMatchRegisterName"))
2756 emitMatchRegisterName(Target, AsmParser, OS);
2758 OS << "#endif // GET_REGISTER_MATCHER\n\n";
2760 OS << "\n#ifdef GET_SUBTARGET_FEATURE_NAME\n";
2761 OS << "#undef GET_SUBTARGET_FEATURE_NAME\n\n";
2763 // Generate the helper function to get the names for subtarget features.
2764 emitGetSubtargetFeatureName(Info, OS);
2766 OS << "#endif // GET_SUBTARGET_FEATURE_NAME\n\n";
2768 OS << "\n#ifdef GET_MATCHER_IMPLEMENTATION\n";
2769 OS << "#undef GET_MATCHER_IMPLEMENTATION\n\n";
2771 // Generate the function that remaps for mnemonic aliases.
2772 bool HasMnemonicAliases = emitMnemonicAliases(OS, Info, Target);
2774 // Generate the convertToMCInst function to convert operands into an MCInst.
2775 // Also, generate the convertToMapAndConstraints function for MS-style inline
2776 // assembly. The latter doesn't actually generate a MCInst.
2777 emitConvertFuncs(Target, ClassName, Info.Matchables, HasMnemonicFirst, OS);
2779 // Emit the enumeration for classes which participate in matching.
2780 emitMatchClassEnumeration(Target, Info.Classes, OS);
2782 // Emit the routine to match token strings to their match class.
2783 emitMatchTokenString(Target, Info.Classes, OS);
2785 // Emit the subclass predicate routine.
2786 emitIsSubclass(Target, Info.Classes, OS);
2788 // Emit the routine to validate an operand against a match class.
2789 emitValidateOperandClass(Info, OS);
2791 // Emit the available features compute function.
2792 emitComputeAvailableFeatures(Info, OS);
2795 StringToOffsetTable StringTable;
2797 size_t MaxNumOperands = 0;
2798 unsigned MaxMnemonicIndex = 0;
2799 bool HasDeprecation = false;
2800 for (const auto &MI : Info.Matchables) {
2801 MaxNumOperands = std::max(MaxNumOperands, MI->AsmOperands.size());
2802 HasDeprecation |= MI->HasDeprecation;
2804 // Store a pascal-style length byte in the mnemonic.
2805 std::string LenMnemonic = char(MI->Mnemonic.size()) + MI->Mnemonic.str();
2806 MaxMnemonicIndex = std::max(MaxMnemonicIndex,
2807 StringTable.GetOrAddStringOffset(LenMnemonic, false));
2810 OS << "static const char *const MnemonicTable =\n";
2811 StringTable.EmitString(OS);
2814 // Emit the static match table; unused classes get initalized to 0 which is
2815 // guaranteed to be InvalidMatchClass.
2817 // FIXME: We can reduce the size of this table very easily. First, we change
2818 // it so that store the kinds in separate bit-fields for each index, which
2819 // only needs to be the max width used for classes at that index (we also need
2820 // to reject based on this during classification). If we then make sure to
2821 // order the match kinds appropriately (putting mnemonics last), then we
2822 // should only end up using a few bits for each class, especially the ones
2823 // following the mnemonic.
2824 OS << "namespace {\n";
2825 OS << " struct MatchEntry {\n";
2826 OS << " " << getMinimalTypeForRange(MaxMnemonicIndex)
2828 OS << " uint16_t Opcode;\n";
2829 OS << " " << getMinimalTypeForRange(Info.Matchables.size())
2831 OS << " " << getMinimalRequiredFeaturesType(Info)
2832 << " RequiredFeatures;\n";
2833 OS << " " << getMinimalTypeForRange(
2834 std::distance(Info.Classes.begin(), Info.Classes.end()))
2835 << " Classes[" << MaxNumOperands << "];\n";
2836 OS << " StringRef getMnemonic() const {\n";
2837 OS << " return StringRef(MnemonicTable + Mnemonic + 1,\n";
2838 OS << " MnemonicTable[Mnemonic]);\n";
2842 OS << " // Predicate for searching for an opcode.\n";
2843 OS << " struct LessOpcode {\n";
2844 OS << " bool operator()(const MatchEntry &LHS, StringRef RHS) {\n";
2845 OS << " return LHS.getMnemonic() < RHS;\n";
2847 OS << " bool operator()(StringRef LHS, const MatchEntry &RHS) {\n";
2848 OS << " return LHS < RHS.getMnemonic();\n";
2850 OS << " bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) {\n";
2851 OS << " return LHS.getMnemonic() < RHS.getMnemonic();\n";
2855 OS << "} // end anonymous namespace.\n\n";
2857 unsigned VariantCount = Target.getAsmParserVariantCount();
2858 for (unsigned VC = 0; VC != VariantCount; ++VC) {
2859 Record *AsmVariant = Target.getAsmParserVariant(VC);
2860 int AsmVariantNo = AsmVariant->getValueAsInt("Variant");
2862 OS << "static const MatchEntry MatchTable" << VC << "[] = {\n";
2864 for (const auto &MI : Info.Matchables) {
2865 if (MI->AsmVariantID != AsmVariantNo)
2868 // Store a pascal-style length byte in the mnemonic.
2869 std::string LenMnemonic = char(MI->Mnemonic.size()) + MI->Mnemonic.str();
2870 OS << " { " << StringTable.GetOrAddStringOffset(LenMnemonic, false)
2871 << " /* " << MI->Mnemonic << " */, "
2872 << Target.getName() << "::"
2873 << MI->getResultInst()->TheDef->getName() << ", "
2874 << MI->ConversionFnKind << ", ";
2876 // Write the required features mask.
2877 if (!MI->RequiredFeatures.empty()) {
2878 for (unsigned i = 0, e = MI->RequiredFeatures.size(); i != e; ++i) {
2880 OS << MI->RequiredFeatures[i]->getEnumName();
2886 for (unsigned i = 0, e = MI->AsmOperands.size(); i != e; ++i) {
2887 const MatchableInfo::AsmOperand &Op = MI->AsmOperands[i];
2890 OS << Op.Class->Name;
2898 // A method to determine if a mnemonic is in the list.
2899 if (HasMnemonicFirst) {
2900 OS << "bool " << Target.getName() << ClassName << "::\n"
2901 << "mnemonicIsValid(StringRef Mnemonic, unsigned VariantID) {\n";
2902 OS << " // Find the appropriate table for this asm variant.\n";
2903 OS << " const MatchEntry *Start, *End;\n";
2904 OS << " switch (VariantID) {\n";
2905 OS << " default: llvm_unreachable(\"invalid variant!\");\n";
2906 for (unsigned VC = 0; VC != VariantCount; ++VC) {
2907 Record *AsmVariant = Target.getAsmParserVariant(VC);
2908 int AsmVariantNo = AsmVariant->getValueAsInt("Variant");
2909 OS << " case " << AsmVariantNo << ": Start = std::begin(MatchTable" << VC
2910 << "); End = std::end(MatchTable" << VC << "); break;\n";
2913 OS << " // Search the table.\n";
2914 OS << " auto MnemonicRange = ";
2915 OS << "std::equal_range(Start, End, Mnemonic, LessOpcode());\n";
2916 OS << " return MnemonicRange.first != MnemonicRange.second;\n";
2920 // Finally, build the match function.
2921 OS << "unsigned " << Target.getName() << ClassName << "::\n"
2922 << "MatchInstructionImpl(const OperandVector &Operands,\n";
2923 OS << " MCInst &Inst, uint64_t &ErrorInfo,\n"
2924 << " bool matchingInlineAsm, unsigned VariantID) {\n";
2926 OS << " // Eliminate obvious mismatches.\n";
2927 OS << " if (Operands.size() > "
2928 << (MaxNumOperands + HasMnemonicFirst) << ") {\n";
2929 OS << " ErrorInfo = "
2930 << (MaxNumOperands + HasMnemonicFirst) << ";\n";
2931 OS << " return Match_InvalidOperand;\n";
2934 // Emit code to get the available features.
2935 OS << " // Get the current feature set.\n";
2936 OS << " uint64_t AvailableFeatures = getAvailableFeatures();\n\n";
2938 OS << " // Get the instruction mnemonic, which is the first token.\n";
2939 if (HasMnemonicFirst) {
2940 OS << " StringRef Mnemonic = ((" << Target.getName()
2941 << "Operand&)*Operands[0]).getToken();\n\n";
2943 OS << " StringRef Mnemonic;\n";
2944 OS << " if (Operands[0]->isToken())\n";
2945 OS << " Mnemonic = ((" << Target.getName()
2946 << "Operand&)*Operands[0]).getToken();\n\n";
2949 if (HasMnemonicAliases) {
2950 OS << " // Process all MnemonicAliases to remap the mnemonic.\n";
2951 OS << " applyMnemonicAliases(Mnemonic, AvailableFeatures, VariantID);\n\n";
2954 // Emit code to compute the class list for this operand vector.
2955 OS << " // Some state to try to produce better error messages.\n";
2956 OS << " bool HadMatchOtherThanFeatures = false;\n";
2957 OS << " bool HadMatchOtherThanPredicate = false;\n";
2958 OS << " unsigned RetCode = Match_InvalidOperand;\n";
2959 OS << " uint64_t MissingFeatures = ~0ULL;\n";
2960 OS << " // Set ErrorInfo to the operand that mismatches if it is\n";
2961 OS << " // wrong for all instances of the instruction.\n";
2962 OS << " ErrorInfo = ~0ULL;\n";
2964 // Emit code to search the table.
2965 OS << " // Find the appropriate table for this asm variant.\n";
2966 OS << " const MatchEntry *Start, *End;\n";
2967 OS << " switch (VariantID) {\n";
2968 OS << " default: llvm_unreachable(\"invalid variant!\");\n";
2969 for (unsigned VC = 0; VC != VariantCount; ++VC) {
2970 Record *AsmVariant = Target.getAsmParserVariant(VC);
2971 int AsmVariantNo = AsmVariant->getValueAsInt("Variant");
2972 OS << " case " << AsmVariantNo << ": Start = std::begin(MatchTable" << VC
2973 << "); End = std::end(MatchTable" << VC << "); break;\n";
2977 OS << " // Search the table.\n";
2978 if (HasMnemonicFirst) {
2979 OS << " auto MnemonicRange = "
2980 "std::equal_range(Start, End, Mnemonic, LessOpcode());\n\n";
2982 OS << " auto MnemonicRange = std::make_pair(Start, End);\n";
2983 OS << " unsigned SIndex = Mnemonic.empty() ? 0 : 1;\n";
2984 OS << " if (!Mnemonic.empty())\n";
2985 OS << " MnemonicRange = "
2986 "std::equal_range(Start, End, Mnemonic.lower(), LessOpcode());\n\n";
2989 OS << " // Return a more specific error code if no mnemonics match.\n";
2990 OS << " if (MnemonicRange.first == MnemonicRange.second)\n";
2991 OS << " return Match_MnemonicFail;\n\n";
2993 OS << " for (const MatchEntry *it = MnemonicRange.first, "
2994 << "*ie = MnemonicRange.second;\n";
2995 OS << " it != ie; ++it) {\n";
2997 if (HasMnemonicFirst) {
2998 OS << " // equal_range guarantees that instruction mnemonic matches.\n";
2999 OS << " assert(Mnemonic == it->getMnemonic());\n";
3002 // Emit check that the subclasses match.
3003 OS << " bool OperandsValid = true;\n";
3004 OS << " for (unsigned i = " << (HasMnemonicFirst ? "0" : "SIndex")
3005 << "; i != " << MaxNumOperands << "; ++i) {\n";
3006 OS << " auto Formal = static_cast<MatchClassKind>(it->Classes[i]);\n";
3007 OS << " if (i" << (HasMnemonicFirst ? "+1" : "")
3008 << " >= Operands.size()) {\n";
3009 OS << " OperandsValid = (Formal == " <<"InvalidMatchClass);\n";
3010 OS << " if (!OperandsValid) ErrorInfo = i"
3011 << (HasMnemonicFirst ? "+1" : "") << ";\n";
3014 OS << " MCParsedAsmOperand &Actual = *Operands[i"
3015 << (HasMnemonicFirst ? "+1" : "") << "];\n";
3016 OS << " unsigned Diag = validateOperandClass(Actual, Formal);\n";
3017 OS << " if (Diag == Match_Success)\n";
3018 OS << " continue;\n";
3019 OS << " // If the generic handler indicates an invalid operand\n";
3020 OS << " // failure, check for a special case.\n";
3021 OS << " if (Diag == Match_InvalidOperand) {\n";
3022 OS << " Diag = validateTargetOperandClass(Actual, Formal);\n";
3023 OS << " if (Diag == Match_Success)\n";
3024 OS << " continue;\n";
3026 OS << " // If this operand is broken for all of the instances of this\n";
3027 OS << " // mnemonic, keep track of it so we can report loc info.\n";
3028 OS << " // If we already had a match that only failed due to a\n";
3029 OS << " // target predicate, that diagnostic is preferred.\n";
3030 OS << " if (!HadMatchOtherThanPredicate &&\n";
3031 OS << " (it == MnemonicRange.first || ErrorInfo <= i"
3032 << (HasMnemonicFirst ? "+1" : "") << ")) {\n";
3033 OS << " ErrorInfo = i" << (HasMnemonicFirst ? "+1" : "") << ";\n";
3034 OS << " // InvalidOperand is the default. Prefer specificity.\n";
3035 OS << " if (Diag != Match_InvalidOperand)\n";
3036 OS << " RetCode = Diag;\n";
3038 OS << " // Otherwise, just reject this instance of the mnemonic.\n";
3039 OS << " OperandsValid = false;\n";
3043 OS << " if (!OperandsValid) continue;\n";
3045 // Emit check that the required features are available.
3046 OS << " if ((AvailableFeatures & it->RequiredFeatures) "
3047 << "!= it->RequiredFeatures) {\n";
3048 OS << " HadMatchOtherThanFeatures = true;\n";
3049 OS << " uint64_t NewMissingFeatures = it->RequiredFeatures & "
3050 "~AvailableFeatures;\n";
3051 OS << " if (countPopulation(NewMissingFeatures) <=\n"
3052 " countPopulation(MissingFeatures))\n";
3053 OS << " MissingFeatures = NewMissingFeatures;\n";
3054 OS << " continue;\n";
3057 OS << " Inst.clear();\n\n";
3058 OS << " if (matchingInlineAsm) {\n";
3059 OS << " Inst.setOpcode(it->Opcode);\n";
3060 OS << " convertToMapAndConstraints(it->ConvertFn, Operands);\n";
3061 OS << " return Match_Success;\n";
3063 OS << " // We have selected a definite instruction, convert the parsed\n"
3064 << " // operands into the appropriate MCInst.\n";
3065 OS << " convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands);\n";
3068 // Verify the instruction with the target-specific match predicate function.
3069 OS << " // We have a potential match. Check the target predicate to\n"
3070 << " // handle any context sensitive constraints.\n"
3071 << " unsigned MatchResult;\n"
3072 << " if ((MatchResult = checkTargetMatchPredicate(Inst)) !="
3073 << " Match_Success) {\n"
3074 << " Inst.clear();\n"
3075 << " RetCode = MatchResult;\n"
3076 << " HadMatchOtherThanPredicate = true;\n"
3080 // Call the post-processing function, if used.
3081 std::string InsnCleanupFn =
3082 AsmParser->getValueAsString("AsmParserInstCleanup");
3083 if (!InsnCleanupFn.empty())
3084 OS << " " << InsnCleanupFn << "(Inst);\n";
3086 if (HasDeprecation) {
3087 OS << " std::string Info;\n";
3088 OS << " if (MII.get(Inst.getOpcode()).getDeprecatedInfo(Inst, getSTI(), Info)) {\n";
3089 OS << " SMLoc Loc = ((" << Target.getName()
3090 << "Operand&)*Operands[0]).getStartLoc();\n";
3091 OS << " getParser().Warning(Loc, Info, None);\n";
3095 OS << " return Match_Success;\n";
3098 OS << " // Okay, we had no match. Try to return a useful error code.\n";
3099 OS << " if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures)\n";
3100 OS << " return RetCode;\n\n";
3101 OS << " // Missing feature matches return which features were missing\n";
3102 OS << " ErrorInfo = MissingFeatures;\n";
3103 OS << " return Match_MissingFeature;\n";
3106 if (!Info.OperandMatchInfo.empty())
3107 emitCustomOperandParsing(OS, Target, Info, ClassName, StringTable,
3108 MaxMnemonicIndex, HasMnemonicFirst);
3110 OS << "#endif // GET_MATCHER_IMPLEMENTATION\n\n";
3115 void EmitAsmMatcher(RecordKeeper &RK, raw_ostream &OS) {
3116 emitSourceFileHeader("Assembly Matcher Source Fragment", OS);
3117 AsmMatcherEmitter(RK).run(OS);
3120 } // End llvm namespace