test/MC/ARM/basic-thumb-instructions.s

   1 @ RUN: llvm-mc -triple=thumbv6-apple-darwin -show-encoding < %s | FileCheck %s
   2   .syntax unified
   3   .globl _func
   4
   5 @ Check that the assembler can handle the documented syntax from the ARM ARM.
   6 @ For complex constructs like shifter operands, check more thoroughly for them
   7 @ once then spot check that following instructions accept the form generally.
   8 @ This gives us good coverage while keeping the overall size of the test
   9 @ more reasonable.
  10
  11
  12 @ FIXME: Some 3-operand instructions have a 2-operand assembly syntax.
  13
  14 _func:
  15 @ CHECK: _func
  16
  17 @------------------------------------------------------------------------------
  18 @ ADC (register)
  19 @------------------------------------------------------------------------------
  20         adcs r4, r6
  21
  22 @ CHECK: adcs   r4, r6                  @ encoding: [0x74,0x41]
  23
  24
  25 @------------------------------------------------------------------------------
  26 @ ADD (immediate)
  27 @------------------------------------------------------------------------------
  28         adds r1, r2, #3
  29         adds r2, #3
  30         adds r2, #8
  31
  32 @ CHECK: adds   r1, r2, #3              @ encoding: [0xd1,0x1c]
  33 @ CHECK: adds   r2, r2, #3              @ encoding: [0xd2,0x1c]
  34 @ CHECK: adds   r2, #8                  @ encoding: [0x08,0x32]
  35
  36
  37 @------------------------------------------------------------------------------
  38 @ ADD (register)
  39 @------------------------------------------------------------------------------
  40         adds r1, r2, r3
  41         add r2, r8
  42
  43 @ CHECK: adds   r1, r2, r3              @ encoding: [0xd1,0x18]
  44 @ CHECK: add    r2, r8                  @ encoding: [0x42,0x44]
  45
  46
  47 @------------------------------------------------------------------------------
  48 @ ADD (SP plus immediate)
  49 @------------------------------------------------------------------------------
  50         add sp, #4
  51         add sp, #508
  52         add sp, sp, #4
  53         add r2, sp, #8
  54         add r2, sp, #1020
  55
  56 @ CHECK: add    sp, #4                  @ encoding: [0x01,0xb0]
  57 @ CHECK: add    sp, #508                @ encoding: [0x7f,0xb0]
  58 @ CHECK: add    sp, #4                  @ encoding: [0x01,0xb0]
  59 @ CHECK: add    r2, sp, #8              @ encoding: [0x02,0xaa]
  60 @ CHECK: add    r2, sp, #1020           @ encoding: [0xff,0xaa]
  61
  62
  63 @------------------------------------------------------------------------------
  64 @ ADD (SP plus register)
  65 @------------------------------------------------------------------------------
  66         add sp, r3
  67         add r2, sp, r2
  68
  69 @ CHECK: add    sp, r3                  @ encoding: [0x9d,0x44]
  70 @ CHECK: add    r2, sp, r2              @ encoding: [0x6a,0x44]
  71
  72
  73 @------------------------------------------------------------------------------
  74 @ ADR
  75 @------------------------------------------------------------------------------
  76         adr r2, _baz
  77         adr     r2, #3
  78
  79 @ CHECK: adr    r2, _baz                @ encoding: [A,0xa2]
  80             @   fixup A - offset: 0, value: _baz, kind: fixup_thumb_adr_pcrel_10
  81 @ CHECK: adr    r2, #3                  @ encoding: [0x03,0xa2]
  82
  83 @------------------------------------------------------------------------------
  84 @ ASR (immediate)
  85 @------------------------------------------------------------------------------
  86         asrs r2, r3, #32
  87         asrs r2, r3, #5
  88         asrs r2, r3, #1
  89
  90 @ CHECK: asrs   r2, r3, #32             @ encoding: [0x1a,0x10]
  91 @ CHECK: asrs   r2, r3, #5              @ encoding: [0x5a,0x11]
  92 @ CHECK: asrs   r2, r3, #1              @ encoding: [0x5a,0x10]
  93
  94
  95 @------------------------------------------------------------------------------
  96 @ ASR (register)
  97 @------------------------------------------------------------------------------
  98         asrs r5, r2
  99
 100 @ CHECK: asrs   r5, r2                  @ encoding: [0x15,0x41]
 101
 102
 103 @------------------------------------------------------------------------------
 104 @ B
 105 @------------------------------------------------------------------------------
 106         b _baz
 107         beq _bar
 108         b       #1838
 109         b       #-420
 110
 111 @ CHECK: b      _baz                    @ encoding: [A,0xe0'A']
 112              @   fixup A - offset: 0, value: _baz, kind: fixup_arm_thumb_br
 113 @ CHECK: beq    _bar                    @ encoding: [A,0xd0]
 114              @   fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_bcc
 115 @ CHECK: b       #1838                   @ encoding: [0x97,0xe3]
 116 @ CHECK: b       #-420                   @ encoding: [0x2e,0xe7]
 117
 118 @------------------------------------------------------------------------------
 119 @ BICS
 120 @------------------------------------------------------------------------------
 121         bics r1, r6
 122
 123 @ CHECK: bics   r1, r6                  @ encoding: [0xb1,0x43]
 124
 125
 126 @------------------------------------------------------------------------------
 127 @ BKPT
 128 @------------------------------------------------------------------------------
 129         bkpt #0
 130         bkpt #255
 131
 132 @ CHECK: bkpt   #0                      @ encoding: [0x00,0xbe]
 133 @ CHECK: bkpt   #255                    @ encoding: [0xff,0xbe]
 134
 135
 136 @------------------------------------------------------------------------------
 137 @ BL/BLX (immediate)
 138 @------------------------------------------------------------------------------
 139         bl _bar
 140         blx _baz
 141
 142 @ CHECK: bl     _bar                    @ encoding: [A,0xf0'A',A,0xf8'A']
 143              @   fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_bl
 144 @ CHECK: blx    _baz                    @ encoding: [A,0xf0'A',A,0xe8'A']
 145              @   fixup A - offset: 0, value: _baz, kind: fixup_arm_thumb_blx
 146
 147
 148 @------------------------------------------------------------------------------
 149 @ BLX (register)
 150 @------------------------------------------------------------------------------
 151         blx r4
 152
 153 @ CHECK: blx    r4                      @ encoding: [0xa0,0x47]
 154
 155
 156 @------------------------------------------------------------------------------
 157 @ BX
 158 @------------------------------------------------------------------------------
 159         bx r2
 160
 161 @ CHECK: bx     r2                      @ encoding: [0x10,0x47]
 162
 163
 164 @------------------------------------------------------------------------------
 165 @ CMN
 166 @------------------------------------------------------------------------------
 167
 168         cmn r5, r1
 169
 170 @ CHECK: cmn    r5, r1                  @ encoding: [0xcd,0x42]
 171
 172
 173 @------------------------------------------------------------------------------
 174 @ CMP
 175 @------------------------------------------------------------------------------
 176         cmp r6, #32
 177         cmp r3, r4
 178         cmp r8, r1
 179
 180 @ CHECK: cmp    r6, #32                 @ encoding: [0x20,0x2e]
 181 @ CHECK: cmp    r3, r4                  @ encoding: [0xa3,0x42]
 182 @ CHECK: cmp    r8, r1                  @ encoding: [0x88,0x45]
 183
 184 @------------------------------------------------------------------------------
 185 @ EOR
 186 @------------------------------------------------------------------------------
 187         eors r4, r5
 188
 189 @ CHECK: eors   r4, r5                  @ encoding: [0x6c,0x40]
 190
 191
 192 @------------------------------------------------------------------------------
 193 @ LDM
 194 @------------------------------------------------------------------------------
 195         ldm r3, {r0, r1, r2, r3, r4, r5, r6, r7}
 196         ldm r2!, {r1, r3, r4, r5, r7}
 197         ldm r1, {r1}
 198
 199 @ CHECK: ldm    r3, {r0, r1, r2, r3, r4, r5, r6, r7} @ encoding: [0xff,0xcb]
 200 @ CHECK: ldm    r2!, {r1, r3, r4, r5, r7} @ encoding: [0xba,0xca]
 201 @ CHECK: ldm    r1, {r1}                @ encoding: [0x02,0xc9]
 202
 203
 204 @------------------------------------------------------------------------------
 205 @ LDR (immediate)
 206 @------------------------------------------------------------------------------
 207         ldr r1, [r5]
 208         ldr r2, [r6, #32]
 209         ldr r3, [r7, #124]
 210         ldr r1, [sp]
 211         ldr r2, [sp, #24]
 212         ldr r3, [sp, #1020]
 213
 214
 215 @ CHECK: ldr    r1, [r5]                @ encoding: [0x29,0x68]
 216 @ CHECK: ldr    r2, [r6, #32]           @ encoding: [0x32,0x6a]
 217 @ CHECK: ldr    r3, [r7, #124]          @ encoding: [0xfb,0x6f]
 218 @ CHECK: ldr    r1, [sp]                @ encoding: [0x00,0x99]
 219 @ CHECK: ldr    r2, [sp, #24]           @ encoding: [0x06,0x9a]
 220 @ CHECK: ldr    r3, [sp, #1020]         @ encoding: [0xff,0x9b]
 221
 222
 223 @------------------------------------------------------------------------------
 224 @ LDR (literal)
 225 @------------------------------------------------------------------------------
 226         ldr r1, _foo
 227
 228 @ CHECK: ldr    r1, _foo                @ encoding: [A,0x49]
 229              @   fixup A - offset: 0, value: _foo, kind: fixup_arm_thumb_cp
 230
 231
 232 @------------------------------------------------------------------------------
 233 @ LDR (register)
 234 @------------------------------------------------------------------------------
 235         ldr r1, [r2, r3]
 236
 237 @ CHECK: ldr    r1, [r2, r3]            @ encoding: [0xd1,0x58]
 238
 239
 240 @------------------------------------------------------------------------------
 241 @ LDRB (immediate)
 242 @------------------------------------------------------------------------------
 243         ldrb r4, [r3]
 244         ldrb r5, [r6, #0]
 245         ldrb r6, [r7, #31]
 246
 247 @ CHECK: ldrb   r4, [r3]                @ encoding: [0x1c,0x78]
 248 @ CHECK: ldrb   r5, [r6]                @ encoding: [0x35,0x78]
 249 @ CHECK: ldrb   r6, [r7, #31]           @ encoding: [0xfe,0x7f]
 250
 251
 252 @------------------------------------------------------------------------------
 253 @ LDRB (register)
 254 @------------------------------------------------------------------------------
 255         ldrb r6, [r4, r5]
 256
 257 @ CHECK: ldrb   r6, [r4, r5]            @ encoding: [0x66,0x5d]
 258
 259
 260 @------------------------------------------------------------------------------
 261 @ LDRH (immediate)
 262 @------------------------------------------------------------------------------
 263         ldrh r3, [r3]
 264         ldrh r4, [r6, #2]
 265         ldrh r5, [r7, #62]
 266
 267 @ CHECK: ldrh   r3, [r3]                @ encoding: [0x1b,0x88]
 268 @ CHECK: ldrh   r4, [r6, #2]            @ encoding: [0x74,0x88]
 269 @ CHECK: ldrh   r5, [r7, #62]           @ encoding: [0xfd,0x8f]
 270
 271
 272 @------------------------------------------------------------------------------
 273 @ LDRH (register)
 274 @------------------------------------------------------------------------------
 275         ldrh r6, [r2, r6]
 276
 277 @ CHECK: ldrh   r6, [r2, r6]            @ encoding: [0x96,0x5b]
 278
 279
 280 @------------------------------------------------------------------------------
 281 @ LDRSB/LDRSH
 282 @------------------------------------------------------------------------------
 283         ldrsb r6, [r2, r6]
 284         ldrsh r3, [r7, r1]
 285
 286 @ CHECK: ldrsb  r6, [r2, r6]            @ encoding: [0x96,0x57]
 287 @ CHECK: ldrsh  r3, [r7, r1]            @ encoding: [0x7b,0x5e]
 288
 289
 290 @------------------------------------------------------------------------------
 291 @ LSL (immediate)
 292 @------------------------------------------------------------------------------
 293         lsls r4, r5, #0
 294         lsls r4, r5, #4
 295
 296 @ CHECK: lsls   r4, r5, #0              @ encoding: [0x2c,0x00]
 297 @ CHECK: lsls   r4, r5, #4              @ encoding: [0x2c,0x01]
 298
 299
 300 @------------------------------------------------------------------------------
 301 @ LSL (register)
 302 @------------------------------------------------------------------------------
 303         lsls r2, r6
 304
 305 @ CHECK: lsls   r2, r6                  @ encoding: [0xb2,0x40]
 306
 307
 308 @------------------------------------------------------------------------------
 309 @ LSR (immediate)
 310 @------------------------------------------------------------------------------
 311         lsrs r1, r3, #1
 312         lsrs r1, r3, #32
 313
 314 @ CHECK: lsrs   r1, r3, #1              @ encoding: [0x59,0x08]
 315 @ CHECK: lsrs   r1, r3, #32             @ encoding: [0x19,0x08]
 316
 317
 318 @------------------------------------------------------------------------------
 319 @ LSR (register)
 320 @------------------------------------------------------------------------------
 321         lsrs r2, r6
 322
 323 @ CHECK: lsrs   r2, r6                  @ encoding: [0xf2,0x40]
 324
 325
 326 @------------------------------------------------------------------------------
 327 @ MOV (immediate)
 328 @------------------------------------------------------------------------------
 329         movs r2, #0
 330         movs r2, #255
 331         movs r2, #23
 332
 333 @ CHECK: movs   r2, #0                  @ encoding: [0x00,0x22]
 334 @ CHECK: movs   r2, #255                @ encoding: [0xff,0x22]
 335 @ CHECK: movs   r2, #23                 @ encoding: [0x17,0x22]
 336
 337
 338 @------------------------------------------------------------------------------
 339 @ MOV (register)
 340 @------------------------------------------------------------------------------
 341         mov r3, r4
 342         movs r1, r3
 343
 344 @ CHECK: mov    r3, r4                  @ encoding: [0x23,0x46]
 345 @ CHECK: movs   r1, r3                  @ encoding: [0x19,0x00]
 346
 347
 348 @------------------------------------------------------------------------------
 349 @ MUL
 350 @------------------------------------------------------------------------------
 351         muls r1, r2, r1
 352         muls r3, r4
 353
 354 @ CHECK: muls   r1, r2, r1              @ encoding: [0x51,0x43]
 355 @ CHECK: muls   r3, r4, r3              @ encoding: [0x63,0x43]
 356
 357
 358 @------------------------------------------------------------------------------
 359 @ MVN
 360 @------------------------------------------------------------------------------
 361         mvns r6, r3
 362
 363 @ CHECK: mvns   r6, r3                  @ encoding: [0xde,0x43]
 364
 365
 366 @------------------------------------------------------------------------------
 367 @ NEG
 368 @------------------------------------------------------------------------------
 369         negs r3, r4
 370
 371 @ CHECK: rsbs   r3, r4, #0              @ encoding: [0x63,0x42]
 372
 373
 374 @------------------------------------------------------------------------------
 375 @ NOP
 376 @------------------------------------------------------------------------------
 377         nop
 378
 379 @ CHECK: nop                            @ encoding: [0xc0,0x46]
 380
 381
 382 @------------------------------------------------------------------------------
 383 @ ORR
 384 @------------------------------------------------------------------------------
 385         orrs  r3, r4
 386
 387 @ CHECK-ERRORS:         orrs    r3, r4                  @ encoding: [0x23,0x43]
 388
 389
 390 @------------------------------------------------------------------------------
 391 @ POP
 392 @------------------------------------------------------------------------------
 393         pop {r2, r3, r6}
 394
 395 @ CHECK: pop    {r2, r3, r6}            @ encoding: [0x4c,0xbc]
 396
 397
 398 @------------------------------------------------------------------------------
 399 @ PUSH
 400 @------------------------------------------------------------------------------
 401         push {r1, r2, r7}
 402
 403 @ CHECK: push   {r1, r2, r7}            @ encoding: [0x86,0xb4]
 404
 405
 406 @------------------------------------------------------------------------------
 407 @ REV/REV16/REVSH
 408 @------------------------------------------------------------------------------
 409         rev r6, r3
 410         rev16 r7, r2
 411         revsh r5, r1
 412
 413 @ CHECK: rev    r6, r3                  @ encoding: [0x1e,0xba]
 414 @ CHECK: rev16  r7, r2                  @ encoding: [0x57,0xba]
 415 @ CHECK: revsh  r5, r1                  @ encoding: [0xcd,0xba]
 416
 417
 418 @------------------------------------------------------------------------------
 419 @ ROR
 420 @------------------------------------------------------------------------------
 421         rors r2, r7
 422
 423 @ CHECK: rors   r2, r7                  @ encoding: [0xfa,0x41]
 424
 425
 426 @------------------------------------------------------------------------------
 427 @ RSB
 428 @------------------------------------------------------------------------------
 429         rsbs r1, r3, #0
 430
 431 @ CHECK: rsbs   r1, r3, #0              @ encoding: [0x59,0x42]
 432
 433
 434 @------------------------------------------------------------------------------
 435 @ SBC
 436 @------------------------------------------------------------------------------
 437         sbcs r4, r3
 438
 439 @ CHECK: sbcs   r4, r3                  @ encoding: [0x9c,0x41]
 440
 441
 442 @------------------------------------------------------------------------------
 443 @ SETEND
 444 @------------------------------------------------------------------------------
 445         setend be
 446         setend le
 447
 448 @ CHECK: setend be                      @ encoding: [0x58,0xb6]
 449 @ CHECK: setend le                      @ encoding: [0x50,0xb6]
 450
 451
 452 @------------------------------------------------------------------------------
 453 @ STM
 454 @------------------------------------------------------------------------------
 455         stm r1!, {r2, r6}
 456         stm r1!, {r1, r2, r3, r7}
 457
 458 @ CHECK: stm    r1!, {r2, r6}           @ encoding: [0x44,0xc1]
 459 @ CHECK: stm    r1!, {r1, r2, r3, r7}   @ encoding: [0x8e,0xc1]
 460
 461
 462 @------------------------------------------------------------------------------
 463 @ STR (immediate)
 464 @------------------------------------------------------------------------------
 465         str r2, [r7]
 466         str r2, [r7, #0]
 467         str r5, [r1, #4]
 468         str r3, [r7, #124]
 469         str r2, [sp]
 470         str r3, [sp, #0]
 471         str r4, [sp, #20]
 472         str r5, [sp, #1020]
 473
 474 @ CHECK: str    r2, [r7]                @ encoding: [0x3a,0x60]
 475 @ CHECK: str    r2, [r7]                @ encoding: [0x3a,0x60]
 476 @ CHECK: str    r5, [r1, #4]            @ encoding: [0x4d,0x60]
 477 @ CHECK: str    r3, [r7, #124]          @ encoding: [0xfb,0x67]
 478 @ CHECK: str    r2, [sp]                @ encoding: [0x00,0x92]
 479 @ CHECK: str    r3, [sp]                @ encoding: [0x00,0x93]
 480 @ CHECK: str    r4, [sp, #20]           @ encoding: [0x05,0x94]
 481 @ CHECK: str    r5, [sp, #1020]         @ encoding: [0xff,0x95]
 482
 483
 484 @------------------------------------------------------------------------------
 485 @ STR (register)
 486 @------------------------------------------------------------------------------
 487         str r2, [r7, r3]
 488
 489 @ CHECK: str    r2, [r7, r3]            @ encoding: [0xfa,0x50]
 490
 491
 492 @------------------------------------------------------------------------------
 493 @ STRB (immediate)
 494 @------------------------------------------------------------------------------
 495         strb r4, [r3]
 496         strb r5, [r6, #0]
 497         strb r6, [r7, #31]
 498
 499 @ CHECK: strb   r4, [r3]                @ encoding: [0x1c,0x70]
 500 @ CHECK: strb   r5, [r6]                @ encoding: [0x35,0x70]
 501 @ CHECK: strb   r6, [r7, #31]           @ encoding: [0xfe,0x77]
 502
 503
 504 @------------------------------------------------------------------------------
 505 @ STRB (register)
 506 @------------------------------------------------------------------------------
 507         strb r6, [r4, r5]
 508
 509 @ CHECK: strb   r6, [r4, r5]            @ encoding: [0x66,0x55]
 510
 511
 512 @------------------------------------------------------------------------------
 513 @ STRH (immediate)
 514 @------------------------------------------------------------------------------
 515         strh r3, [r3]
 516         strh r4, [r6, #2]
 517         strh r5, [r7, #62]
 518
 519 @ CHECK: strh   r3, [r3]                @ encoding: [0x1b,0x80]
 520 @ CHECK: strh   r4, [r6, #2]            @ encoding: [0x74,0x80]
 521 @ CHECK: strh   r5, [r7, #62]           @ encoding: [0xfd,0x87]
 522
 523
 524 @------------------------------------------------------------------------------
 525 @ STRH (register)
 526 @------------------------------------------------------------------------------
 527         strh r6, [r2, r6]
 528
 529 @ CHECK: strh   r6, [r2, r6]            @ encoding: [0x96,0x53]
 530
 531
 532 @------------------------------------------------------------------------------
 533 @ SUB (immediate)
 534 @------------------------------------------------------------------------------
 535         subs r1, r2, #3
 536         subs r2, #3
 537         subs r2, #8
 538
 539 @ CHECK: subs   r1, r2, #3              @ encoding: [0xd1,0x1e]
 540 @ CHECK: subs   r2, #3                  @ encoding: [0x03,0x3a]
 541 @ CHECK: subs   r2, #8                  @ encoding: [0x08,0x3a]
 542
 543
 544 @------------------------------------------------------------------------------
 545 @ SUB (SP minus immediate)
 546 @------------------------------------------------------------------------------
 547         sub sp, #12
 548         sub sp, sp, #508
 549
 550 @ CHECK: sub    sp, #12                 @ encoding: [0x83,0xb0]
 551 @ CHECK: sub    sp, #508                @ encoding: [0xff,0xb0]
 552
 553
 554 @------------------------------------------------------------------------------
 555 @ SUB (register)
 556 @------------------------------------------------------------------------------
 557         subs r1, r2, r3
 558
 559 @ CHECK: subs   r1, r2, r3              @ encoding: [0xd1,0x1a]
 560
 561
 562 @------------------------------------------------------------------------------
 563 @ SVC
 564 @------------------------------------------------------------------------------
 565         svc #0
 566         svc #255
 567
 568 @ CHECK: svc    #0                      @ encoding: [0x00,0xdf]
 569 @ CHECK: svc    #255                    @ encoding: [0xff,0xdf]
 570
 571
 572 @------------------------------------------------------------------------------
 573 @ SXTB/SXTH
 574 @------------------------------------------------------------------------------
 575         sxtb r3, r5
 576         sxth r3, r5
 577
 578 @ CHECK: sxtb   r3, r5                  @ encoding: [0x6b,0xb2]
 579 @ CHECK: sxth   r3, r5                  @ encoding: [0x2b,0xb2]
 580
 581
 582 @------------------------------------------------------------------------------
 583 @ TST
 584 @------------------------------------------------------------------------------
 585         tst r6, r1
 586
 587 @ CHECK: tst    r6, r1                  @ encoding: [0x0e,0x42]
 588
 589
 590 @------------------------------------------------------------------------------
 591 @ UXTB/UXTH
 592 @------------------------------------------------------------------------------
 593         uxtb  r7, r2
 594         uxth  r1, r4
 595
 596 @ CHECK: uxtb   r7, r2                  @ encoding: [0xd7,0xb2]
 597 @ CHECK: uxth   r1, r4                  @ encoding: [0xa1,0xb2]
 598
 599
 600 @------------------------------------------------------------------------------
 601 @ WFE/WFI/YIELD
 602 @------------------------------------------------------------------------------
 603         wfe
 604         wfi
 605         yield
 606
 607 @ CHECK: wfe                             @ encoding: [0x20,0xbf]
 608 @ CHECK: wfi                             @ encoding: [0x30,0xbf]
 609 @ CHECK: yield                           @ encoding: [0x10,0xbf]