1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.1 | FileCheck %s --check-prefix=SSE
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=AVX
4 declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>)
6 define i1 @PR25554(<2 x i64> %v0, <2 x i64> %v1) {
9 ; SSE-NEXT: movl $1, %eax
10 ; SSE-NEXT: movd %rax, %xmm2
11 ; SSE-NEXT: ptest %xmm2, %xmm0
13 ; SSE-NEXT: movzbl %cl, %ecx
14 ; SSE-NEXT: movd %rax, %xmm0
15 ; SSE-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
16 ; SSE-NEXT: ptest %xmm0, %xmm1
18 ; SSE-NEXT: movzbl %al, %eax
19 ; SSE-NEXT: orl %ecx, %eax
25 ; AVX-NEXT: movl $1, %eax
26 ; AVX-NEXT: vmovq %rax, %xmm2
27 ; AVX-NEXT: vptest %xmm2, %xmm0
29 ; AVX-NEXT: movzbl %cl, %ecx
30 ; AVX-NEXT: vmovq %rax, %xmm0
31 ; AVX-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
32 ; AVX-NEXT: vptest %xmm0, %xmm1
34 ; AVX-NEXT: movzbl %al, %eax
35 ; AVX-NEXT: orl %ecx, %eax
39 %c1 = tail call i32 @llvm.x86.sse41.ptestz(<2 x i64> %v0, <2 x i64> <i64 1, i64 0>)
40 %b1 = icmp eq i32 %c1, 0
41 %c2 = tail call i32 @llvm.x86.sse41.ptestz(<2 x i64> %v1, <2 x i64> <i64 0, i64 1>)
42 %b2 = icmp eq i32 %c2, 0
43 %and = and i1 %b1, %b2