1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse3 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE3
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+ssse3 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSSE3
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse4.1 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
6 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx2 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
8 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
9 target triple = "x86_64-unknown-unknown"
11 define <4 x i32> @shuffle_v4i32_0001(<4 x i32> %a, <4 x i32> %b) {
12 ; SSE-LABEL: shuffle_v4i32_0001:
14 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,1]
17 ; AVX-LABEL: shuffle_v4i32_0001:
19 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,1]
21 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
22 ret <4 x i32> %shuffle
24 define <4 x i32> @shuffle_v4i32_0020(<4 x i32> %a, <4 x i32> %b) {
25 ; SSE-LABEL: shuffle_v4i32_0020:
27 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,2,0]
30 ; AVX-LABEL: shuffle_v4i32_0020:
32 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,2,0]
34 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 0>
35 ret <4 x i32> %shuffle
37 define <4 x i32> @shuffle_v4i32_0112(<4 x i32> %a, <4 x i32> %b) {
38 ; SSE-LABEL: shuffle_v4i32_0112:
40 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,2]
43 ; AVX-LABEL: shuffle_v4i32_0112:
45 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,1,2]
47 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 1, i32 2>
48 ret <4 x i32> %shuffle
50 define <4 x i32> @shuffle_v4i32_0300(<4 x i32> %a, <4 x i32> %b) {
51 ; SSE-LABEL: shuffle_v4i32_0300:
53 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,3,0,0]
56 ; AVX-LABEL: shuffle_v4i32_0300:
58 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,3,0,0]
60 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 3, i32 0, i32 0>
61 ret <4 x i32> %shuffle
63 define <4 x i32> @shuffle_v4i32_1000(<4 x i32> %a, <4 x i32> %b) {
64 ; SSE-LABEL: shuffle_v4i32_1000:
66 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,0,0]
69 ; AVX-LABEL: shuffle_v4i32_1000:
71 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,0,0,0]
73 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 0, i32 0, i32 0>
74 ret <4 x i32> %shuffle
76 define <4 x i32> @shuffle_v4i32_2200(<4 x i32> %a, <4 x i32> %b) {
77 ; SSE-LABEL: shuffle_v4i32_2200:
79 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,2,0,0]
82 ; AVX-LABEL: shuffle_v4i32_2200:
84 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,2,0,0]
86 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 2, i32 0, i32 0>
87 ret <4 x i32> %shuffle
89 define <4 x i32> @shuffle_v4i32_3330(<4 x i32> %a, <4 x i32> %b) {
90 ; SSE-LABEL: shuffle_v4i32_3330:
92 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,3,3,0]
95 ; AVX-LABEL: shuffle_v4i32_3330:
97 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[3,3,3,0]
99 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 3, i32 3, i32 0>
100 ret <4 x i32> %shuffle
102 define <4 x i32> @shuffle_v4i32_3210(<4 x i32> %a, <4 x i32> %b) {
103 ; SSE-LABEL: shuffle_v4i32_3210:
105 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,2,1,0]
108 ; AVX-LABEL: shuffle_v4i32_3210:
110 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[3,2,1,0]
112 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
113 ret <4 x i32> %shuffle
116 define <4 x i32> @shuffle_v4i32_2121(<4 x i32> %a, <4 x i32> %b) {
117 ; SSE-LABEL: shuffle_v4i32_2121:
119 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,1,2,1]
122 ; AVX-LABEL: shuffle_v4i32_2121:
124 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,1,2,1]
126 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 1, i32 2, i32 1>
127 ret <4 x i32> %shuffle
130 define <4 x float> @shuffle_v4f32_0001(<4 x float> %a, <4 x float> %b) {
131 ; SSE-LABEL: shuffle_v4f32_0001:
133 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,0,1]
136 ; AVX-LABEL: shuffle_v4f32_0001:
138 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,1]
140 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
141 ret <4 x float> %shuffle
143 define <4 x float> @shuffle_v4f32_0020(<4 x float> %a, <4 x float> %b) {
144 ; SSE-LABEL: shuffle_v4f32_0020:
146 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,2,0]
149 ; AVX-LABEL: shuffle_v4f32_0020:
151 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,2,0]
153 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 0>
154 ret <4 x float> %shuffle
156 define <4 x float> @shuffle_v4f32_0300(<4 x float> %a, <4 x float> %b) {
157 ; SSE-LABEL: shuffle_v4f32_0300:
159 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3,0,0]
162 ; AVX-LABEL: shuffle_v4f32_0300:
164 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,3,0,0]
166 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 3, i32 0, i32 0>
167 ret <4 x float> %shuffle
169 define <4 x float> @shuffle_v4f32_1000(<4 x float> %a, <4 x float> %b) {
170 ; SSE-LABEL: shuffle_v4f32_1000:
172 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,0,0,0]
175 ; AVX-LABEL: shuffle_v4f32_1000:
177 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,0,0,0]
179 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 0, i32 0, i32 0>
180 ret <4 x float> %shuffle
182 define <4 x float> @shuffle_v4f32_2200(<4 x float> %a, <4 x float> %b) {
183 ; SSE-LABEL: shuffle_v4f32_2200:
185 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,2,0,0]
188 ; AVX-LABEL: shuffle_v4f32_2200:
190 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,2,0,0]
192 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 2, i32 0, i32 0>
193 ret <4 x float> %shuffle
195 define <4 x float> @shuffle_v4f32_3330(<4 x float> %a, <4 x float> %b) {
196 ; SSE-LABEL: shuffle_v4f32_3330:
198 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,0]
201 ; AVX-LABEL: shuffle_v4f32_3330:
203 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,3,3,0]
205 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 3, i32 3, i32 0>
206 ret <4 x float> %shuffle
208 define <4 x float> @shuffle_v4f32_3210(<4 x float> %a, <4 x float> %b) {
209 ; SSE-LABEL: shuffle_v4f32_3210:
211 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,2,1,0]
214 ; AVX-LABEL: shuffle_v4f32_3210:
216 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,1,0]
218 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
219 ret <4 x float> %shuffle
221 define <4 x float> @shuffle_v4f32_0011(<4 x float> %a, <4 x float> %b) {
222 ; SSE-LABEL: shuffle_v4f32_0011:
224 ; SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0,0,1,1]
227 ; AVX-LABEL: shuffle_v4f32_0011:
229 ; AVX-NEXT: vunpcklps {{.*#+}} xmm0 = xmm0[0,0,1,1]
231 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 1, i32 1>
232 ret <4 x float> %shuffle
234 define <4 x float> @shuffle_v4f32_2233(<4 x float> %a, <4 x float> %b) {
235 ; SSE-LABEL: shuffle_v4f32_2233:
237 ; SSE-NEXT: unpckhps {{.*#+}} xmm0 = xmm0[2,2,3,3]
240 ; AVX-LABEL: shuffle_v4f32_2233:
242 ; AVX-NEXT: vunpckhps {{.*#+}} xmm0 = xmm0[2,2,3,3]
244 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 2, i32 3, i32 3>
245 ret <4 x float> %shuffle
247 define <4 x float> @shuffle_v4f32_0022(<4 x float> %a, <4 x float> %b) {
248 ; SSE2-LABEL: shuffle_v4f32_0022:
250 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,2,2]
253 ; SSE3-LABEL: shuffle_v4f32_0022:
255 ; SSE3-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
258 ; SSSE3-LABEL: shuffle_v4f32_0022:
260 ; SSSE3-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
263 ; SSE41-LABEL: shuffle_v4f32_0022:
265 ; SSE41-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
268 ; AVX-LABEL: shuffle_v4f32_0022:
270 ; AVX-NEXT: vmovsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
272 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 2>
273 ret <4 x float> %shuffle
275 define <4 x float> @shuffle_v4f32_1133(<4 x float> %a, <4 x float> %b) {
276 ; SSE2-LABEL: shuffle_v4f32_1133:
278 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,3,3]
281 ; SSE3-LABEL: shuffle_v4f32_1133:
283 ; SSE3-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
286 ; SSSE3-LABEL: shuffle_v4f32_1133:
288 ; SSSE3-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
291 ; SSE41-LABEL: shuffle_v4f32_1133:
293 ; SSE41-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
296 ; AVX-LABEL: shuffle_v4f32_1133:
298 ; AVX-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
300 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 1, i32 3, i32 3>
301 ret <4 x float> %shuffle
304 define <4 x i32> @shuffle_v4i32_0124(<4 x i32> %a, <4 x i32> %b) {
305 ; SSE2-LABEL: shuffle_v4i32_0124:
307 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
308 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
311 ; SSE3-LABEL: shuffle_v4i32_0124:
313 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
314 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
317 ; SSSE3-LABEL: shuffle_v4i32_0124:
319 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
320 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
323 ; SSE41-LABEL: shuffle_v4i32_0124:
325 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0]
328 ; AVX-LABEL: shuffle_v4i32_0124:
330 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0]
332 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
333 ret <4 x i32> %shuffle
335 define <4 x i32> @shuffle_v4i32_0142(<4 x i32> %a, <4 x i32> %b) {
336 ; SSE-LABEL: shuffle_v4i32_0142:
338 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
339 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
342 ; AVX-LABEL: shuffle_v4i32_0142:
344 ; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
345 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
347 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 2>
348 ret <4 x i32> %shuffle
350 define <4 x i32> @shuffle_v4i32_0412(<4 x i32> %a, <4 x i32> %b) {
351 ; SSE-LABEL: shuffle_v4i32_0412:
353 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
354 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[1,2]
355 ; SSE-NEXT: movaps %xmm1, %xmm0
358 ; AVX-LABEL: shuffle_v4i32_0412:
360 ; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
361 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm1[2,0],xmm0[1,2]
363 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 2>
364 ret <4 x i32> %shuffle
366 define <4 x i32> @shuffle_v4i32_4012(<4 x i32> %a, <4 x i32> %b) {
367 ; SSE-LABEL: shuffle_v4i32_4012:
369 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
370 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
371 ; SSE-NEXT: movaps %xmm1, %xmm0
374 ; AVX-LABEL: shuffle_v4i32_4012:
376 ; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
377 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm1[0,2],xmm0[1,2]
379 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 1, i32 2>
380 ret <4 x i32> %shuffle
382 define <4 x i32> @shuffle_v4i32_0145(<4 x i32> %a, <4 x i32> %b) {
383 ; SSE-LABEL: shuffle_v4i32_0145:
385 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
388 ; AVX-LABEL: shuffle_v4i32_0145:
390 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
392 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
393 ret <4 x i32> %shuffle
395 define <4 x i32> @shuffle_v4i32_0451(<4 x i32> %a, <4 x i32> %b) {
396 ; SSE-LABEL: shuffle_v4i32_0451:
398 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1]
399 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
402 ; AVX-LABEL: shuffle_v4i32_0451:
404 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1]
405 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
407 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 5, i32 1>
408 ret <4 x i32> %shuffle
410 define <4 x i32> @shuffle_v4i32_4501(<4 x i32> %a, <4 x i32> %b) {
411 ; SSE-LABEL: shuffle_v4i32_4501:
413 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
414 ; SSE-NEXT: movdqa %xmm1, %xmm0
417 ; AVX-LABEL: shuffle_v4i32_4501:
419 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
421 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
422 ret <4 x i32> %shuffle
424 define <4 x i32> @shuffle_v4i32_4015(<4 x i32> %a, <4 x i32> %b) {
425 ; SSE-LABEL: shuffle_v4i32_4015:
427 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1]
428 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0,1,3]
431 ; AVX-LABEL: shuffle_v4i32_4015:
433 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1]
434 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[2,0,1,3]
436 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 1, i32 5>
437 ret <4 x i32> %shuffle
440 define <4 x float> @shuffle_v4f32_4zzz(<4 x float> %a) {
441 ; SSE2-LABEL: shuffle_v4f32_4zzz:
443 ; SSE2-NEXT: xorps %xmm1, %xmm1
444 ; SSE2-NEXT: movss %xmm0, %xmm1
445 ; SSE2-NEXT: movaps %xmm1, %xmm0
448 ; SSE3-LABEL: shuffle_v4f32_4zzz:
450 ; SSE3-NEXT: xorps %xmm1, %xmm1
451 ; SSE3-NEXT: movss %xmm0, %xmm1
452 ; SSE3-NEXT: movaps %xmm1, %xmm0
455 ; SSSE3-LABEL: shuffle_v4f32_4zzz:
457 ; SSSE3-NEXT: xorps %xmm1, %xmm1
458 ; SSSE3-NEXT: movss %xmm0, %xmm1
459 ; SSSE3-NEXT: movaps %xmm1, %xmm0
462 ; SSE41-LABEL: shuffle_v4f32_4zzz:
464 ; SSE41-NEXT: xorps %xmm1, %xmm1
465 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
468 ; AVX-LABEL: shuffle_v4f32_4zzz:
470 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
471 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
473 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
474 ret <4 x float> %shuffle
477 define <4 x float> @shuffle_v4f32_z4zz(<4 x float> %a) {
478 ; SSE2-LABEL: shuffle_v4f32_z4zz:
480 ; SSE2-NEXT: xorps %xmm1, %xmm1
481 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[2,0]
482 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[3,0]
485 ; SSE3-LABEL: shuffle_v4f32_z4zz:
487 ; SSE3-NEXT: xorps %xmm1, %xmm1
488 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[2,0]
489 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[3,0]
492 ; SSSE3-LABEL: shuffle_v4f32_z4zz:
494 ; SSSE3-NEXT: xorps %xmm1, %xmm1
495 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[2,0]
496 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[3,0]
499 ; SSE41-LABEL: shuffle_v4f32_z4zz:
501 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[0],zero,zero
504 ; AVX-LABEL: shuffle_v4f32_z4zz:
506 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm0[0],zero,zero
508 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 2, i32 4, i32 3, i32 0>
509 ret <4 x float> %shuffle
512 define <4 x float> @shuffle_v4f32_zz4z(<4 x float> %a) {
513 ; SSE2-LABEL: shuffle_v4f32_zz4z:
515 ; SSE2-NEXT: xorps %xmm1, %xmm1
516 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0]
517 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,2]
518 ; SSE2-NEXT: movaps %xmm1, %xmm0
521 ; SSE3-LABEL: shuffle_v4f32_zz4z:
523 ; SSE3-NEXT: xorps %xmm1, %xmm1
524 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0]
525 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,2]
526 ; SSE3-NEXT: movaps %xmm1, %xmm0
529 ; SSSE3-LABEL: shuffle_v4f32_zz4z:
531 ; SSSE3-NEXT: xorps %xmm1, %xmm1
532 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0]
533 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,2]
534 ; SSSE3-NEXT: movaps %xmm1, %xmm0
537 ; SSE41-LABEL: shuffle_v4f32_zz4z:
539 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,zero,xmm0[0],zero
542 ; AVX-LABEL: shuffle_v4f32_zz4z:
544 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,zero,xmm0[0],zero
546 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 0, i32 4, i32 0>
547 ret <4 x float> %shuffle
550 define <4 x float> @shuffle_v4f32_zuu4(<4 x float> %a) {
551 ; SSE2-LABEL: shuffle_v4f32_zuu4:
553 ; SSE2-NEXT: xorps %xmm1, %xmm1
554 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
555 ; SSE2-NEXT: movaps %xmm1, %xmm0
558 ; SSE3-LABEL: shuffle_v4f32_zuu4:
560 ; SSE3-NEXT: xorps %xmm1, %xmm1
561 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
562 ; SSE3-NEXT: movaps %xmm1, %xmm0
565 ; SSSE3-LABEL: shuffle_v4f32_zuu4:
567 ; SSSE3-NEXT: xorps %xmm1, %xmm1
568 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
569 ; SSSE3-NEXT: movaps %xmm1, %xmm0
572 ; SSE41-LABEL: shuffle_v4f32_zuu4:
574 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,zero,zero,xmm0[0]
577 ; AVX-LABEL: shuffle_v4f32_zuu4:
579 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,zero,zero,xmm0[0]
581 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 undef, i32 undef, i32 4>
582 ret <4 x float> %shuffle
585 define <4 x float> @shuffle_v4f32_zzz7(<4 x float> %a) {
586 ; SSE2-LABEL: shuffle_v4f32_zzz7:
588 ; SSE2-NEXT: xorps %xmm1, %xmm1
589 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
590 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
591 ; SSE2-NEXT: movaps %xmm1, %xmm0
594 ; SSE3-LABEL: shuffle_v4f32_zzz7:
596 ; SSE3-NEXT: xorps %xmm1, %xmm1
597 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
598 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
599 ; SSE3-NEXT: movaps %xmm1, %xmm0
602 ; SSSE3-LABEL: shuffle_v4f32_zzz7:
604 ; SSSE3-NEXT: xorps %xmm1, %xmm1
605 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
606 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
607 ; SSSE3-NEXT: movaps %xmm1, %xmm0
610 ; SSE41-LABEL: shuffle_v4f32_zzz7:
612 ; SSE41-NEXT: xorps %xmm1, %xmm1
613 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3]
616 ; AVX-LABEL: shuffle_v4f32_zzz7:
618 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
619 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3]
621 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
622 ret <4 x float> %shuffle
625 define <4 x float> @shuffle_v4f32_z6zz(<4 x float> %a) {
626 ; SSE2-LABEL: shuffle_v4f32_z6zz:
628 ; SSE2-NEXT: xorps %xmm1, %xmm1
629 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
630 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
633 ; SSE3-LABEL: shuffle_v4f32_z6zz:
635 ; SSE3-NEXT: xorps %xmm1, %xmm1
636 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
637 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
640 ; SSSE3-LABEL: shuffle_v4f32_z6zz:
642 ; SSSE3-NEXT: xorps %xmm1, %xmm1
643 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
644 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
647 ; SSE41-LABEL: shuffle_v4f32_z6zz:
649 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
652 ; AVX-LABEL: shuffle_v4f32_z6zz:
654 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
656 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 6, i32 2, i32 3>
657 ret <4 x float> %shuffle
660 define <4 x i32> @shuffle_v4i32_4zzz(<4 x i32> %a) {
661 ; SSE2-LABEL: shuffle_v4i32_4zzz:
663 ; SSE2-NEXT: xorps %xmm1, %xmm1
664 ; SSE2-NEXT: movss %xmm0, %xmm1
665 ; SSE2-NEXT: movaps %xmm1, %xmm0
668 ; SSE3-LABEL: shuffle_v4i32_4zzz:
670 ; SSE3-NEXT: xorps %xmm1, %xmm1
671 ; SSE3-NEXT: movss %xmm0, %xmm1
672 ; SSE3-NEXT: movaps %xmm1, %xmm0
675 ; SSSE3-LABEL: shuffle_v4i32_4zzz:
677 ; SSSE3-NEXT: xorps %xmm1, %xmm1
678 ; SSSE3-NEXT: movss %xmm0, %xmm1
679 ; SSSE3-NEXT: movaps %xmm1, %xmm0
682 ; SSE41-LABEL: shuffle_v4i32_4zzz:
684 ; SSE41-NEXT: xorps %xmm1, %xmm1
685 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
688 ; AVX-LABEL: shuffle_v4i32_4zzz:
690 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
691 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
693 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
694 ret <4 x i32> %shuffle
697 define <4 x i32> @shuffle_v4i32_z4zz(<4 x i32> %a) {
698 ; SSE2-LABEL: shuffle_v4i32_z4zz:
700 ; SSE2-NEXT: xorps %xmm1, %xmm1
701 ; SSE2-NEXT: movss %xmm0, %xmm1
702 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
705 ; SSE3-LABEL: shuffle_v4i32_z4zz:
707 ; SSE3-NEXT: xorps %xmm1, %xmm1
708 ; SSE3-NEXT: movss %xmm0, %xmm1
709 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
712 ; SSSE3-LABEL: shuffle_v4i32_z4zz:
714 ; SSSE3-NEXT: xorps %xmm1, %xmm1
715 ; SSSE3-NEXT: movss %xmm0, %xmm1
716 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
719 ; SSE41-LABEL: shuffle_v4i32_z4zz:
721 ; SSE41-NEXT: xorps %xmm1, %xmm1
722 ; SSE41-NEXT: blendps {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
723 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
726 ; AVX-LABEL: shuffle_v4i32_z4zz:
728 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
729 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
730 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,0,1,1]
732 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 2, i32 4, i32 3, i32 0>
733 ret <4 x i32> %shuffle
736 define <4 x i32> @shuffle_v4i32_zz4z(<4 x i32> %a) {
737 ; SSE2-LABEL: shuffle_v4i32_zz4z:
739 ; SSE2-NEXT: xorps %xmm1, %xmm1
740 ; SSE2-NEXT: movss %xmm0, %xmm1
741 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
744 ; SSE3-LABEL: shuffle_v4i32_zz4z:
746 ; SSE3-NEXT: xorps %xmm1, %xmm1
747 ; SSE3-NEXT: movss %xmm0, %xmm1
748 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
751 ; SSSE3-LABEL: shuffle_v4i32_zz4z:
753 ; SSSE3-NEXT: xorps %xmm1, %xmm1
754 ; SSSE3-NEXT: movss %xmm0, %xmm1
755 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
758 ; SSE41-LABEL: shuffle_v4i32_zz4z:
760 ; SSE41-NEXT: xorps %xmm1, %xmm1
761 ; SSE41-NEXT: blendps {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
762 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
765 ; AVX-LABEL: shuffle_v4i32_zz4z:
767 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
768 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
769 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,0,1]
771 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 0, i32 0, i32 4, i32 0>
772 ret <4 x i32> %shuffle
775 define <4 x i32> @shuffle_v4i32_zuu4(<4 x i32> %a) {
776 ; SSE2-LABEL: shuffle_v4i32_zuu4:
778 ; SSE2-NEXT: xorps %xmm1, %xmm1
779 ; SSE2-NEXT: movss %xmm0, %xmm1
780 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,0]
783 ; SSE3-LABEL: shuffle_v4i32_zuu4:
785 ; SSE3-NEXT: xorps %xmm1, %xmm1
786 ; SSE3-NEXT: movss %xmm0, %xmm1
787 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,0]
790 ; SSSE3-LABEL: shuffle_v4i32_zuu4:
792 ; SSSE3-NEXT: xorps %xmm1, %xmm1
793 ; SSSE3-NEXT: movss %xmm0, %xmm1
794 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,0]
797 ; SSE41-LABEL: shuffle_v4i32_zuu4:
799 ; SSE41-NEXT: xorps %xmm1, %xmm1
800 ; SSE41-NEXT: blendps {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
801 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,0]
804 ; AVX-LABEL: shuffle_v4i32_zuu4:
806 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
807 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
808 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,1,0]
810 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 0, i32 undef, i32 undef, i32 4>
811 ret <4 x i32> %shuffle
814 define <4 x i32> @shuffle_v4i32_z6zz(<4 x i32> %a) {
815 ; SSE2-LABEL: shuffle_v4i32_z6zz:
817 ; SSE2-NEXT: xorps %xmm1, %xmm1
818 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
819 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
822 ; SSE3-LABEL: shuffle_v4i32_z6zz:
824 ; SSE3-NEXT: xorps %xmm1, %xmm1
825 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
826 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
829 ; SSSE3-LABEL: shuffle_v4i32_z6zz:
831 ; SSSE3-NEXT: xorps %xmm1, %xmm1
832 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
833 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
836 ; SSE41-LABEL: shuffle_v4i32_z6zz:
838 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
841 ; AVX-LABEL: shuffle_v4i32_z6zz:
843 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
845 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 0, i32 6, i32 2, i32 3>
846 ret <4 x i32> %shuffle
849 define <4 x i32> @shuffle_v4i32_7012(<4 x i32> %a, <4 x i32> %b) {
850 ; SSE2-LABEL: shuffle_v4i32_7012:
852 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[0,0]
853 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
854 ; SSE2-NEXT: movaps %xmm1, %xmm0
857 ; SSE3-LABEL: shuffle_v4i32_7012:
859 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[0,0]
860 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
861 ; SSE3-NEXT: movaps %xmm1, %xmm0
864 ; SSSE3-LABEL: shuffle_v4i32_7012:
866 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
869 ; SSE41-LABEL: shuffle_v4i32_7012:
871 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
874 ; AVX-LABEL: shuffle_v4i32_7012:
876 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
878 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 7, i32 0, i32 1, i32 2>
879 ret <4 x i32> %shuffle
882 define <4 x i32> @shuffle_v4i32_6701(<4 x i32> %a, <4 x i32> %b) {
883 ; SSE2-LABEL: shuffle_v4i32_6701:
885 ; SSE2-NEXT: shufpd {{.*#+}} xmm1 = xmm1[1],xmm0[0]
886 ; SSE2-NEXT: movapd %xmm1, %xmm0
889 ; SSE3-LABEL: shuffle_v4i32_6701:
891 ; SSE3-NEXT: shufpd {{.*#+}} xmm1 = xmm1[1],xmm0[0]
892 ; SSE3-NEXT: movapd %xmm1, %xmm0
895 ; SSSE3-LABEL: shuffle_v4i32_6701:
897 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
900 ; SSE41-LABEL: shuffle_v4i32_6701:
902 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
905 ; AVX-LABEL: shuffle_v4i32_6701:
907 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
909 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
910 ret <4 x i32> %shuffle
913 define <4 x i32> @shuffle_v4i32_5670(<4 x i32> %a, <4 x i32> %b) {
914 ; SSE2-LABEL: shuffle_v4i32_5670:
916 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
917 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,2],xmm0[2,0]
918 ; SSE2-NEXT: movaps %xmm1, %xmm0
921 ; SSE3-LABEL: shuffle_v4i32_5670:
923 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
924 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,2],xmm0[2,0]
925 ; SSE3-NEXT: movaps %xmm1, %xmm0
928 ; SSSE3-LABEL: shuffle_v4i32_5670:
930 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
933 ; SSE41-LABEL: shuffle_v4i32_5670:
935 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
938 ; AVX-LABEL: shuffle_v4i32_5670:
940 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
942 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 5, i32 6, i32 7, i32 0>
943 ret <4 x i32> %shuffle
946 define <4 x i32> @shuffle_v4i32_1234(<4 x i32> %a, <4 x i32> %b) {
947 ; SSE2-LABEL: shuffle_v4i32_1234:
949 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]
950 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,2],xmm1[2,0]
953 ; SSE3-LABEL: shuffle_v4i32_1234:
955 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]
956 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,2],xmm1[2,0]
959 ; SSSE3-LABEL: shuffle_v4i32_1234:
961 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
962 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
965 ; SSE41-LABEL: shuffle_v4i32_1234:
967 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
968 ; SSE41-NEXT: movdqa %xmm1, %xmm0
971 ; AVX-LABEL: shuffle_v4i32_1234:
973 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
975 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 2, i32 3, i32 4>
976 ret <4 x i32> %shuffle
979 define <4 x i32> @shuffle_v4i32_2345(<4 x i32> %a, <4 x i32> %b) {
980 ; SSE2-LABEL: shuffle_v4i32_2345:
982 ; SSE2-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1],xmm1[0]
985 ; SSE3-LABEL: shuffle_v4i32_2345:
987 ; SSE3-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1],xmm1[0]
990 ; SSSE3-LABEL: shuffle_v4i32_2345:
992 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
993 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
996 ; SSE41-LABEL: shuffle_v4i32_2345:
998 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
999 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1002 ; AVX-LABEL: shuffle_v4i32_2345:
1004 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
1006 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 3, i32 4, i32 5>
1007 ret <4 x i32> %shuffle
1010 define <4 x i32> @shuffle_v4i32_3456(<4 x i32> %a, <4 x i32> %b) {
1011 ; SSE2-LABEL: shuffle_v4i32_3456:
1013 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[0,0]
1014 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[1,2]
1017 ; SSE3-LABEL: shuffle_v4i32_3456:
1019 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[0,0]
1020 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[1,2]
1023 ; SSSE3-LABEL: shuffle_v4i32_3456:
1025 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1026 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
1029 ; SSE41-LABEL: shuffle_v4i32_3456:
1031 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1032 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1035 ; AVX-LABEL: shuffle_v4i32_3456:
1037 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1039 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 4, i32 5, i32 6>
1040 ret <4 x i32> %shuffle
1043 define <4 x i32> @shuffle_v4i32_0u1u(<4 x i32> %a, <4 x i32> %b) {
1044 ; SSE2-LABEL: shuffle_v4i32_0u1u:
1046 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
1049 ; SSE3-LABEL: shuffle_v4i32_0u1u:
1051 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
1054 ; SSSE3-LABEL: shuffle_v4i32_0u1u:
1056 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
1059 ; SSE41-LABEL: shuffle_v4i32_0u1u:
1061 ; SSE41-NEXT: pmovzxdq %xmm0, %xmm0
1064 ; AVX-LABEL: shuffle_v4i32_0u1u:
1066 ; AVX-NEXT: vpmovzxdq %xmm0, %xmm0
1068 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 undef, i32 1, i32 undef>
1069 ret <4 x i32> %shuffle
1072 define <4 x i32> @shuffle_v4i32_0z1z(<4 x i32> %a) {
1073 ; SSE2-LABEL: shuffle_v4i32_0z1z:
1075 ; SSE2-NEXT: pxor %xmm1, %xmm1
1076 ; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1079 ; SSE3-LABEL: shuffle_v4i32_0z1z:
1081 ; SSE3-NEXT: pxor %xmm1, %xmm1
1082 ; SSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1085 ; SSSE3-LABEL: shuffle_v4i32_0z1z:
1087 ; SSSE3-NEXT: pxor %xmm1, %xmm1
1088 ; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1091 ; SSE41-LABEL: shuffle_v4i32_0z1z:
1093 ; SSE41-NEXT: pmovzxdq %xmm0, %xmm0
1096 ; AVX-LABEL: shuffle_v4i32_0z1z:
1098 ; AVX-NEXT: vpmovzxdq %xmm0, %xmm0
1100 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 1, i32 7>
1101 ret <4 x i32> %shuffle
1104 define <4 x i32> @insert_reg_and_zero_v4i32(i32 %a) {
1105 ; SSE-LABEL: insert_reg_and_zero_v4i32:
1107 ; SSE-NEXT: movd %edi, %xmm0
1110 ; AVX-LABEL: insert_reg_and_zero_v4i32:
1112 ; AVX-NEXT: vmovd %edi, %xmm0
1114 %v = insertelement <4 x i32> undef, i32 %a, i32 0
1115 %shuffle = shufflevector <4 x i32> %v, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1116 ret <4 x i32> %shuffle
1119 define <4 x i32> @insert_mem_and_zero_v4i32(i32* %ptr) {
1120 ; SSE-LABEL: insert_mem_and_zero_v4i32:
1122 ; SSE-NEXT: movd (%rdi), %xmm0
1125 ; AVX-LABEL: insert_mem_and_zero_v4i32:
1127 ; AVX-NEXT: vmovd (%rdi), %xmm0
1130 %v = insertelement <4 x i32> undef, i32 %a, i32 0
1131 %shuffle = shufflevector <4 x i32> %v, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1132 ret <4 x i32> %shuffle
1135 define <4 x float> @insert_reg_and_zero_v4f32(float %a) {
1136 ; SSE2-LABEL: insert_reg_and_zero_v4f32:
1138 ; SSE2-NEXT: xorps %xmm1, %xmm1
1139 ; SSE2-NEXT: movss %xmm0, %xmm1
1140 ; SSE2-NEXT: movaps %xmm1, %xmm0
1143 ; SSE3-LABEL: insert_reg_and_zero_v4f32:
1145 ; SSE3-NEXT: xorps %xmm1, %xmm1
1146 ; SSE3-NEXT: movss %xmm0, %xmm1
1147 ; SSE3-NEXT: movaps %xmm1, %xmm0
1150 ; SSSE3-LABEL: insert_reg_and_zero_v4f32:
1152 ; SSSE3-NEXT: xorps %xmm1, %xmm1
1153 ; SSSE3-NEXT: movss %xmm0, %xmm1
1154 ; SSSE3-NEXT: movaps %xmm1, %xmm0
1157 ; SSE41-LABEL: insert_reg_and_zero_v4f32:
1159 ; SSE41-NEXT: xorps %xmm1, %xmm1
1160 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
1163 ; AVX-LABEL: insert_reg_and_zero_v4f32:
1165 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
1166 ; AVX-NEXT: vmovss %xmm0, %xmm1, %xmm0
1168 %v = insertelement <4 x float> undef, float %a, i32 0
1169 %shuffle = shufflevector <4 x float> %v, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1170 ret <4 x float> %shuffle
1173 define <4 x float> @insert_mem_and_zero_v4f32(float* %ptr) {
1174 ; SSE-LABEL: insert_mem_and_zero_v4f32:
1176 ; SSE-NEXT: movss (%rdi), %xmm0
1179 ; AVX-LABEL: insert_mem_and_zero_v4f32:
1181 ; AVX-NEXT: vmovss (%rdi), %xmm0
1183 %a = load float* %ptr
1184 %v = insertelement <4 x float> undef, float %a, i32 0
1185 %shuffle = shufflevector <4 x float> %v, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1186 ret <4 x float> %shuffle
1189 define <4 x i32> @insert_reg_lo_v4i32(i64 %a, <4 x i32> %b) {
1190 ; SSE2-LABEL: insert_reg_lo_v4i32:
1192 ; SSE2-NEXT: movd %rdi, %xmm1
1193 ; SSE2-NEXT: movsd %xmm1, %xmm0
1196 ; SSE3-LABEL: insert_reg_lo_v4i32:
1198 ; SSE3-NEXT: movd %rdi, %xmm1
1199 ; SSE3-NEXT: movsd %xmm1, %xmm0
1202 ; SSSE3-LABEL: insert_reg_lo_v4i32:
1204 ; SSSE3-NEXT: movd %rdi, %xmm1
1205 ; SSSE3-NEXT: movsd %xmm1, %xmm0
1208 ; SSE41-LABEL: insert_reg_lo_v4i32:
1210 ; SSE41-NEXT: movd %rdi, %xmm1
1211 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1214 ; AVX1-LABEL: insert_reg_lo_v4i32:
1216 ; AVX1-NEXT: vmovq %rdi, %xmm1
1217 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1220 ; AVX2-LABEL: insert_reg_lo_v4i32:
1222 ; AVX2-NEXT: vmovq %rdi, %xmm1
1223 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
1225 %a.cast = bitcast i64 %a to <2 x i32>
1226 %v = shufflevector <2 x i32> %a.cast, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1227 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1228 ret <4 x i32> %shuffle
1231 define <4 x i32> @insert_mem_lo_v4i32(<2 x i32>* %ptr, <4 x i32> %b) {
1232 ; SSE2-LABEL: insert_mem_lo_v4i32:
1234 ; SSE2-NEXT: movlpd (%rdi), %xmm0
1237 ; SSE3-LABEL: insert_mem_lo_v4i32:
1239 ; SSE3-NEXT: movlpd (%rdi), %xmm0
1242 ; SSSE3-LABEL: insert_mem_lo_v4i32:
1244 ; SSSE3-NEXT: movlpd (%rdi), %xmm0
1247 ; SSE41-LABEL: insert_mem_lo_v4i32:
1249 ; SSE41-NEXT: movq (%rdi), %xmm1
1250 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1253 ; AVX1-LABEL: insert_mem_lo_v4i32:
1255 ; AVX1-NEXT: vmovq (%rdi), %xmm1
1256 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1259 ; AVX2-LABEL: insert_mem_lo_v4i32:
1261 ; AVX2-NEXT: vmovq (%rdi), %xmm1
1262 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
1264 %a = load <2 x i32>* %ptr
1265 %v = shufflevector <2 x i32> %a, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1266 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1267 ret <4 x i32> %shuffle
1270 define <4 x i32> @insert_reg_hi_v4i32(i64 %a, <4 x i32> %b) {
1271 ; SSE-LABEL: insert_reg_hi_v4i32:
1273 ; SSE-NEXT: movd %rdi, %xmm1
1274 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1277 ; AVX-LABEL: insert_reg_hi_v4i32:
1279 ; AVX-NEXT: vmovq %rdi, %xmm1
1280 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1282 %a.cast = bitcast i64 %a to <2 x i32>
1283 %v = shufflevector <2 x i32> %a.cast, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1284 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1285 ret <4 x i32> %shuffle
1288 define <4 x i32> @insert_mem_hi_v4i32(<2 x i32>* %ptr, <4 x i32> %b) {
1289 ; SSE-LABEL: insert_mem_hi_v4i32:
1291 ; SSE-NEXT: movq (%rdi), %xmm1
1292 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1295 ; AVX-LABEL: insert_mem_hi_v4i32:
1297 ; AVX-NEXT: vmovq (%rdi), %xmm1
1298 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1300 %a = load <2 x i32>* %ptr
1301 %v = shufflevector <2 x i32> %a, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1302 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1303 ret <4 x i32> %shuffle
1306 define <4 x float> @insert_reg_lo_v4f32(double %a, <4 x float> %b) {
1307 ; SSE-LABEL: insert_reg_lo_v4f32:
1309 ; SSE-NEXT: movsd %xmm0, %xmm1
1310 ; SSE-NEXT: movaps %xmm1, %xmm0
1313 ; AVX-LABEL: insert_reg_lo_v4f32:
1315 ; AVX-NEXT: vmovsd %xmm0, %xmm1, %xmm0
1317 %a.cast = bitcast double %a to <2 x float>
1318 %v = shufflevector <2 x float> %a.cast, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1319 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1320 ret <4 x float> %shuffle
1323 define <4 x float> @insert_mem_lo_v4f32(<2 x float>* %ptr, <4 x float> %b) {
1324 ; SSE-LABEL: insert_mem_lo_v4f32:
1326 ; SSE-NEXT: movlpd (%rdi), %xmm0
1329 ; AVX-LABEL: insert_mem_lo_v4f32:
1331 ; AVX-NEXT: vmovlpd (%rdi), %xmm0, %xmm0
1333 %a = load <2 x float>* %ptr
1334 %v = shufflevector <2 x float> %a, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1335 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1336 ret <4 x float> %shuffle
1339 define <4 x float> @insert_reg_hi_v4f32(double %a, <4 x float> %b) {
1340 ; SSE-LABEL: insert_reg_hi_v4f32:
1342 ; SSE-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0],xmm0[0]
1343 ; SSE-NEXT: movapd %xmm1, %xmm0
1346 ; AVX-LABEL: insert_reg_hi_v4f32:
1348 ; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
1350 %a.cast = bitcast double %a to <2 x float>
1351 %v = shufflevector <2 x float> %a.cast, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1352 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1353 ret <4 x float> %shuffle
1356 define <4 x float> @insert_mem_hi_v4f32(<2 x float>* %ptr, <4 x float> %b) {
1357 ; SSE-LABEL: insert_mem_hi_v4f32:
1359 ; SSE-NEXT: movhpd (%rdi), %xmm0
1362 ; AVX-LABEL: insert_mem_hi_v4f32:
1364 ; AVX-NEXT: vmovhpd (%rdi), %xmm0, %xmm0
1366 %a = load <2 x float>* %ptr
1367 %v = shufflevector <2 x float> %a, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1368 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1369 ret <4 x float> %shuffle
1372 define <4 x float> @shuffle_mem_v4f32_3210(<4 x float>* %ptr) {
1373 ; SSE-LABEL: shuffle_mem_v4f32_3210:
1375 ; SSE-NEXT: movaps (%rdi), %xmm0
1376 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,2,1,0]
1379 ; AVX-LABEL: shuffle_mem_v4f32_3210:
1381 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = mem[3,2,1,0]
1383 %a = load <4 x float>* %ptr
1384 %shuffle = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
1385 ret <4 x float> %shuffle