1 ; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=sse4.1 -mcpu=penryn | FileCheck %s --check-prefix=X32
2 ; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=sse4.1 -mcpu=penryn | FileCheck %s --check-prefix=X64
4 @g16 = external global i16
6 define <4 x i32> @pinsrd_1(i32 %s, <4 x i32> %tmp) nounwind {
9 ; X32-NEXT: pinsrd $1, {{[0-9]+}}(%esp), %xmm0
12 ; X64-LABEL: pinsrd_1:
14 ; X64-NEXT: pinsrd $1, %edi, %xmm0
16 %tmp1 = insertelement <4 x i32> %tmp, i32 %s, i32 1
20 define <16 x i8> @pinsrb_1(i8 %s, <16 x i8> %tmp) nounwind {
21 ; X32-LABEL: pinsrb_1:
23 ; X32-NEXT: pinsrb $1, {{[0-9]+}}(%esp), %xmm0
26 ; X64-LABEL: pinsrb_1:
28 ; X64-NEXT: pinsrb $1, %edi, %xmm0
30 %tmp1 = insertelement <16 x i8> %tmp, i8 %s, i32 1
34 define <2 x i64> @pmovsxbd_1(i32* %p) nounwind {
35 ; X32-LABEL: pmovsxbd_1:
36 ; X32: ## BB#0: ## %entry
37 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
38 ; X32-NEXT: pmovsxbd (%eax), %xmm0
41 ; X64-LABEL: pmovsxbd_1:
42 ; X64: ## BB#0: ## %entry
43 ; X64-NEXT: pmovsxbd (%rdi), %xmm0
46 %0 = load i32* %p, align 4
47 %1 = insertelement <4 x i32> undef, i32 %0, i32 0
48 %2 = insertelement <4 x i32> %1, i32 0, i32 1
49 %3 = insertelement <4 x i32> %2, i32 0, i32 2
50 %4 = insertelement <4 x i32> %3, i32 0, i32 3
51 %5 = bitcast <4 x i32> %4 to <16 x i8>
52 %6 = tail call <4 x i32> @llvm.x86.sse41.pmovsxbd(<16 x i8> %5) nounwind readnone
53 %7 = bitcast <4 x i32> %6 to <2 x i64>
57 define <2 x i64> @pmovsxwd_1(i64* %p) nounwind readonly {
58 ; X32-LABEL: pmovsxwd_1:
59 ; X32: ## BB#0: ## %entry
60 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
61 ; X32-NEXT: pmovsxwd (%eax), %xmm0
64 ; X64-LABEL: pmovsxwd_1:
65 ; X64: ## BB#0: ## %entry
66 ; X64-NEXT: pmovsxwd (%rdi), %xmm0
69 %0 = load i64* %p ; <i64> [#uses=1]
70 %tmp2 = insertelement <2 x i64> zeroinitializer, i64 %0, i32 0 ; <<2 x i64>> [#uses=1]
71 %1 = bitcast <2 x i64> %tmp2 to <8 x i16> ; <<8 x i16>> [#uses=1]
72 %2 = tail call <4 x i32> @llvm.x86.sse41.pmovsxwd(<8 x i16> %1) nounwind readnone ; <<4 x i32>> [#uses=1]
73 %3 = bitcast <4 x i32> %2 to <2 x i64> ; <<2 x i64>> [#uses=1]
77 define <2 x i64> @pmovzxbq_1() nounwind {
78 ; X32-LABEL: pmovzxbq_1:
79 ; X32: ## BB#0: ## %entry
80 ; X32-NEXT: movl L_g16$non_lazy_ptr, %eax
81 ; X32-NEXT: pmovzxbq {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero
84 ; X64-LABEL: pmovzxbq_1:
85 ; X64: ## BB#0: ## %entry
86 ; X64-NEXT: movq _g16@{{.*}}(%rip), %rax
87 ; X64-NEXT: pmovzxbq {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero
90 %0 = load i16* @g16, align 2 ; <i16> [#uses=1]
91 %1 = insertelement <8 x i16> undef, i16 %0, i32 0 ; <<8 x i16>> [#uses=1]
92 %2 = bitcast <8 x i16> %1 to <16 x i8> ; <<16 x i8>> [#uses=1]
93 %3 = tail call <2 x i64> @llvm.x86.sse41.pmovzxbq(<16 x i8> %2) nounwind readnone ; <<2 x i64>> [#uses=1]
97 declare <4 x i32> @llvm.x86.sse41.pmovsxbd(<16 x i8>) nounwind readnone
98 declare <4 x i32> @llvm.x86.sse41.pmovsxwd(<8 x i16>) nounwind readnone
99 declare <2 x i64> @llvm.x86.sse41.pmovzxbq(<16 x i8>) nounwind readnone
101 define i32 @extractps_1(<4 x float> %v) nounwind {
102 ; X32-LABEL: extractps_1:
104 ; X32-NEXT: extractps $3, %xmm0, %eax
107 ; X64-LABEL: extractps_1:
109 ; X64-NEXT: extractps $3, %xmm0, %eax
111 %s = extractelement <4 x float> %v, i32 3
112 %i = bitcast float %s to i32
115 define i32 @extractps_2(<4 x float> %v) nounwind {
116 ; X32-LABEL: extractps_2:
118 ; X32-NEXT: extractps $3, %xmm0, %eax
121 ; X64-LABEL: extractps_2:
123 ; X64-NEXT: extractps $3, %xmm0, %eax
125 %t = bitcast <4 x float> %v to <4 x i32>
126 %s = extractelement <4 x i32> %t, i32 3
131 ; The non-store form of extractps puts its result into a GPR.
132 ; This makes it suitable for an extract from a <4 x float> that
133 ; is bitcasted to i32, but unsuitable for much of anything else.
135 define float @ext_1(<4 x float> %v) nounwind {
138 ; X32-NEXT: pushl %eax
139 ; X32-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,1,2,3]
140 ; X32-NEXT: addss LCPI7_0, %xmm0
141 ; X32-NEXT: movss %xmm0, (%esp)
142 ; X32-NEXT: flds (%esp)
143 ; X32-NEXT: popl %eax
148 ; X64-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,1,2,3]
149 ; X64-NEXT: addss {{.*}}(%rip), %xmm0
151 %s = extractelement <4 x float> %v, i32 3
152 %t = fadd float %s, 1.0
155 define float @ext_2(<4 x float> %v) nounwind {
158 ; X32-NEXT: pushl %eax
159 ; X32-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,1,2,3]
160 ; X32-NEXT: movss %xmm0, (%esp)
161 ; X32-NEXT: flds (%esp)
162 ; X32-NEXT: popl %eax
167 ; X64-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,1,2,3]
169 %s = extractelement <4 x float> %v, i32 3
172 define i32 @ext_3(<4 x i32> %v) nounwind {
175 ; X32-NEXT: pextrd $3, %xmm0, %eax
180 ; X64-NEXT: pextrd $3, %xmm0, %eax
182 %i = extractelement <4 x i32> %v, i32 3
186 define <4 x float> @insertps_1(<4 x float> %t1, <4 x float> %t2) nounwind {
187 ; X32-LABEL: insertps_1:
189 ; X32-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[1,2,3]
192 ; X64-LABEL: insertps_1:
194 ; X64-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[1,2,3]
196 %tmp1 = call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %t1, <4 x float> %t2, i32 1) nounwind readnone
197 ret <4 x float> %tmp1
200 declare <4 x float> @llvm.x86.sse41.insertps(<4 x float>, <4 x float>, i32) nounwind readnone
202 define <4 x float> @insertps_2(<4 x float> %t1, float %t2) nounwind {
203 ; X32-LABEL: insertps_2:
205 ; X32-NEXT: insertps {{.*#+}} xmm0 = mem[0],xmm0[1,2,3]
208 ; X64-LABEL: insertps_2:
210 ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
212 %tmp1 = insertelement <4 x float> %t1, float %t2, i32 0
213 ret <4 x float> %tmp1
215 define <4 x float> @insertps_3(<4 x float> %t1, <4 x float> %t2) nounwind {
216 ; X32-LABEL: insertps_3:
218 ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
221 ; X64-LABEL: insertps_3:
223 ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
225 %tmp2 = extractelement <4 x float> %t2, i32 0
226 %tmp1 = insertelement <4 x float> %t1, float %tmp2, i32 0
227 ret <4 x float> %tmp1
230 define i32 @ptestz_1(<2 x i64> %t1, <2 x i64> %t2) nounwind {
231 ; X32-LABEL: ptestz_1:
233 ; X32-NEXT: ptest %xmm1, %xmm0
235 ; X32-NEXT: movzbl %al, %eax
238 ; X64-LABEL: ptestz_1:
240 ; X64-NEXT: ptest %xmm1, %xmm0
242 ; X64-NEXT: movzbl %al, %eax
244 %tmp1 = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %t1, <2 x i64> %t2) nounwind readnone
248 define i32 @ptestz_2(<2 x i64> %t1, <2 x i64> %t2) nounwind {
249 ; X32-LABEL: ptestz_2:
251 ; X32-NEXT: ptest %xmm1, %xmm0
252 ; X32-NEXT: sbbl %eax, %eax
253 ; X32-NEXT: andl $1, %eax
256 ; X64-LABEL: ptestz_2:
258 ; X64-NEXT: ptest %xmm1, %xmm0
259 ; X64-NEXT: sbbl %eax, %eax
260 ; X64-NEXT: andl $1, %eax
262 %tmp1 = call i32 @llvm.x86.sse41.ptestc(<2 x i64> %t1, <2 x i64> %t2) nounwind readnone
266 define i32 @ptestz_3(<2 x i64> %t1, <2 x i64> %t2) nounwind {
267 ; X32-LABEL: ptestz_3:
269 ; X32-NEXT: ptest %xmm1, %xmm0
271 ; X32-NEXT: movzbl %al, %eax
274 ; X64-LABEL: ptestz_3:
276 ; X64-NEXT: ptest %xmm1, %xmm0
278 ; X64-NEXT: movzbl %al, %eax
280 %tmp1 = call i32 @llvm.x86.sse41.ptestnzc(<2 x i64> %t1, <2 x i64> %t2) nounwind readnone
285 declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) nounwind readnone
286 declare i32 @llvm.x86.sse41.ptestc(<2 x i64>, <2 x i64>) nounwind readnone
287 declare i32 @llvm.x86.sse41.ptestnzc(<2 x i64>, <2 x i64>) nounwind readnone
289 ; This used to compile to insertps $0 + insertps $16. insertps $0 is always
291 define <2 x float> @buildvector(<2 x float> %A, <2 x float> %B) nounwind {
292 ; X32-LABEL: buildvector:
293 ; X32: ## BB#0: ## %entry
294 ; X32-NEXT: movshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]
295 ; X32-NEXT: movshdup {{.*#+}} xmm3 = xmm1[1,1,3,3]
296 ; X32-NEXT: addss %xmm1, %xmm0
297 ; X32-NEXT: addss %xmm2, %xmm3
298 ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[2,3]
301 ; X64-LABEL: buildvector:
302 ; X64: ## BB#0: ## %entry
303 ; X64-NEXT: movshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]
304 ; X64-NEXT: movshdup {{.*#+}} xmm3 = xmm1[1,1,3,3]
305 ; X64-NEXT: addss %xmm1, %xmm0
306 ; X64-NEXT: addss %xmm2, %xmm3
307 ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[2,3]
310 %tmp7 = extractelement <2 x float> %A, i32 0
311 %tmp5 = extractelement <2 x float> %A, i32 1
312 %tmp3 = extractelement <2 x float> %B, i32 0
313 %tmp1 = extractelement <2 x float> %B, i32 1
314 %add.r = fadd float %tmp7, %tmp3
315 %add.i = fadd float %tmp5, %tmp1
316 %tmp11 = insertelement <2 x float> undef, float %add.r, i32 0
317 %tmp9 = insertelement <2 x float> %tmp11, float %add.i, i32 1
318 ret <2 x float> %tmp9
321 define <4 x float> @insertps_from_shufflevector_1(<4 x float> %a, <4 x float>* nocapture readonly %pb) {
322 ; X32-LABEL: insertps_from_shufflevector_1:
323 ; X32: ## BB#0: ## %entry
324 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
325 ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
328 ; X64-LABEL: insertps_from_shufflevector_1:
329 ; X64: ## BB#0: ## %entry
330 ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
333 %0 = load <4 x float>* %pb, align 16
334 %vecinit6 = shufflevector <4 x float> %a, <4 x float> %0, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
335 ret <4 x float> %vecinit6
338 define <4 x float> @insertps_from_shufflevector_2(<4 x float> %a, <4 x float> %b) {
339 ; X32-LABEL: insertps_from_shufflevector_2:
340 ; X32: ## BB#0: ## %entry
341 ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[1],xmm0[3]
344 ; X64-LABEL: insertps_from_shufflevector_2:
345 ; X64: ## BB#0: ## %entry
346 ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[1],xmm0[3]
349 %vecinit6 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 5, i32 3>
350 ret <4 x float> %vecinit6
353 ; For loading an i32 from memory into an xmm register we use pinsrd
354 ; instead of insertps
355 define <4 x i32> @pinsrd_from_shufflevector_i32(<4 x i32> %a, <4 x i32>* nocapture readonly %pb) {
356 ; X32-LABEL: pinsrd_from_shufflevector_i32:
357 ; X32: ## BB#0: ## %entry
358 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
359 ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
362 ; X64-LABEL: pinsrd_from_shufflevector_i32:
363 ; X64: ## BB#0: ## %entry
364 ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
367 %0 = load <4 x i32>* %pb, align 16
368 %vecinit6 = shufflevector <4 x i32> %a, <4 x i32> %0, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
369 ret <4 x i32> %vecinit6
372 define <4 x i32> @insertps_from_shufflevector_i32_2(<4 x i32> %a, <4 x i32> %b) {
373 ; X32-LABEL: insertps_from_shufflevector_i32_2:
374 ; X32: ## BB#0: ## %entry
375 ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[3],xmm0[2,3]
378 ; X64-LABEL: insertps_from_shufflevector_i32_2:
379 ; X64: ## BB#0: ## %entry
380 ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[3],xmm0[2,3]
383 %vecinit6 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 7, i32 2, i32 3>
384 ret <4 x i32> %vecinit6
387 define <4 x float> @insertps_from_load_ins_elt_undef(<4 x float> %a, float* %b) {
388 ; X32-LABEL: insertps_from_load_ins_elt_undef:
390 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
391 ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[2,3]
394 ; X64-LABEL: insertps_from_load_ins_elt_undef:
396 ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[2,3]
398 %1 = load float* %b, align 4
399 %2 = insertelement <4 x float> undef, float %1, i32 0
400 %result = shufflevector <4 x float> %a, <4 x float> %2, <4 x i32> <i32 0, i32 4, i32 2, i32 3>
401 ret <4 x float> %result
404 ; TODO: Like on pinsrd_from_shufflevector_i32, remove this mov instr
405 define <4 x i32> @insertps_from_load_ins_elt_undef_i32(<4 x i32> %a, i32* %b) {
406 ; X32-LABEL: insertps_from_load_ins_elt_undef_i32:
408 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
409 ; X32-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
410 ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3]
413 ; X64-LABEL: insertps_from_load_ins_elt_undef_i32:
415 ; X64-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
416 ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3]
418 %1 = load i32* %b, align 4
419 %2 = insertelement <4 x i32> undef, i32 %1, i32 0
420 %result = shufflevector <4 x i32> %a, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 4, i32 3>
421 ret <4 x i32> %result
424 ;;;;;; Shuffles optimizable with a single insertps or blend instruction
425 define <4 x float> @shuf_XYZ0(<4 x float> %x, <4 x float> %a) {
426 ; X32-LABEL: shuf_XYZ0:
428 ; X32-NEXT: xorps %xmm1, %xmm1
429 ; X32-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
432 ; X64-LABEL: shuf_XYZ0:
434 ; X64-NEXT: xorps %xmm1, %xmm1
435 ; X64-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
437 %vecext = extractelement <4 x float> %x, i32 0
438 %vecinit = insertelement <4 x float> undef, float %vecext, i32 0
439 %vecext1 = extractelement <4 x float> %x, i32 1
440 %vecinit2 = insertelement <4 x float> %vecinit, float %vecext1, i32 1
441 %vecext3 = extractelement <4 x float> %x, i32 2
442 %vecinit4 = insertelement <4 x float> %vecinit2, float %vecext3, i32 2
443 %vecinit5 = insertelement <4 x float> %vecinit4, float 0.0, i32 3
444 ret <4 x float> %vecinit5
447 define <4 x float> @shuf_XY00(<4 x float> %x, <4 x float> %a) {
448 ; X32-LABEL: shuf_XY00:
450 ; X32-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero
453 ; X64-LABEL: shuf_XY00:
455 ; X64-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero
457 %vecext = extractelement <4 x float> %x, i32 0
458 %vecinit = insertelement <4 x float> undef, float %vecext, i32 0
459 %vecext1 = extractelement <4 x float> %x, i32 1
460 %vecinit2 = insertelement <4 x float> %vecinit, float %vecext1, i32 1
461 %vecinit3 = insertelement <4 x float> %vecinit2, float 0.0, i32 2
462 %vecinit4 = insertelement <4 x float> %vecinit3, float 0.0, i32 3
463 ret <4 x float> %vecinit4
466 define <4 x float> @shuf_XYY0(<4 x float> %x, <4 x float> %a) {
467 ; X32-LABEL: shuf_XYY0:
469 ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,1],zero
472 ; X64-LABEL: shuf_XYY0:
474 ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,1],zero
476 %vecext = extractelement <4 x float> %x, i32 0
477 %vecinit = insertelement <4 x float> undef, float %vecext, i32 0
478 %vecext1 = extractelement <4 x float> %x, i32 1
479 %vecinit2 = insertelement <4 x float> %vecinit, float %vecext1, i32 1
480 %vecinit4 = insertelement <4 x float> %vecinit2, float %vecext1, i32 2
481 %vecinit5 = insertelement <4 x float> %vecinit4, float 0.0, i32 3
482 ret <4 x float> %vecinit5
485 define <4 x float> @shuf_XYW0(<4 x float> %x, <4 x float> %a) {
486 ; X32-LABEL: shuf_XYW0:
488 ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,3],zero
491 ; X64-LABEL: shuf_XYW0:
493 ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,3],zero
495 %vecext = extractelement <4 x float> %x, i32 0
496 %vecinit = insertelement <4 x float> undef, float %vecext, i32 0
497 %vecext1 = extractelement <4 x float> %x, i32 1
498 %vecinit2 = insertelement <4 x float> %vecinit, float %vecext1, i32 1
499 %vecext2 = extractelement <4 x float> %x, i32 3
500 %vecinit3 = insertelement <4 x float> %vecinit2, float %vecext2, i32 2
501 %vecinit4 = insertelement <4 x float> %vecinit3, float 0.0, i32 3
502 ret <4 x float> %vecinit4
505 define <4 x float> @shuf_W00W(<4 x float> %x, <4 x float> %a) {
506 ; X32-LABEL: shuf_W00W:
508 ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[3],zero,zero,xmm0[3]
511 ; X64-LABEL: shuf_W00W:
513 ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[3],zero,zero,xmm0[3]
515 %vecext = extractelement <4 x float> %x, i32 3
516 %vecinit = insertelement <4 x float> undef, float %vecext, i32 0
517 %vecinit2 = insertelement <4 x float> %vecinit, float 0.0, i32 1
518 %vecinit3 = insertelement <4 x float> %vecinit2, float 0.0, i32 2
519 %vecinit4 = insertelement <4 x float> %vecinit3, float %vecext, i32 3
520 ret <4 x float> %vecinit4
523 define <4 x float> @shuf_X00A(<4 x float> %x, <4 x float> %a) {
524 ; X32-LABEL: shuf_X00A:
526 ; X32-NEXT: xorps %xmm2, %xmm2
527 ; X32-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
528 ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0]
531 ; X64-LABEL: shuf_X00A:
533 ; X64-NEXT: xorps %xmm2, %xmm2
534 ; X64-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
535 ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0]
537 %vecext = extractelement <4 x float> %x, i32 0
538 %vecinit = insertelement <4 x float> undef, float %vecext, i32 0
539 %vecinit1 = insertelement <4 x float> %vecinit, float 0.0, i32 1
540 %vecinit2 = insertelement <4 x float> %vecinit1, float 0.0, i32 2
541 %vecinit4 = shufflevector <4 x float> %vecinit2, <4 x float> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
542 ret <4 x float> %vecinit4
545 define <4 x float> @shuf_X00X(<4 x float> %x, <4 x float> %a) {
546 ; X32-LABEL: shuf_X00X:
548 ; X32-NEXT: xorps %xmm1, %xmm1
549 ; X32-NEXT: blendps {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
550 ; X32-NEXT: insertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm0[0]
551 ; X32-NEXT: movaps %xmm1, %xmm0
554 ; X64-LABEL: shuf_X00X:
556 ; X64-NEXT: xorps %xmm1, %xmm1
557 ; X64-NEXT: blendps {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
558 ; X64-NEXT: insertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm0[0]
559 ; X64-NEXT: movaps %xmm1, %xmm0
561 %vecext = extractelement <4 x float> %x, i32 0
562 %vecinit = insertelement <4 x float> undef, float %vecext, i32 0
563 %vecinit1 = insertelement <4 x float> %vecinit, float 0.0, i32 1
564 %vecinit2 = insertelement <4 x float> %vecinit1, float 0.0, i32 2
565 %vecinit4 = shufflevector <4 x float> %vecinit2, <4 x float> %x, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
566 ret <4 x float> %vecinit4
569 define <4 x float> @shuf_X0YC(<4 x float> %x, <4 x float> %a) {
570 ; X32-LABEL: shuf_X0YC:
572 ; X32-NEXT: xorps %xmm2, %xmm2
573 ; X32-NEXT: blendps {{.*#+}} xmm2 = xmm0[0],xmm2[1],xmm0[2,3]
574 ; X32-NEXT: insertps {{.*#+}} xmm2 = xmm2[0,1],xmm0[1],zero
575 ; X32-NEXT: insertps {{.*#+}} xmm2 = xmm2[0,1,2],xmm1[2]
576 ; X32-NEXT: movaps %xmm2, %xmm0
579 ; X64-LABEL: shuf_X0YC:
581 ; X64-NEXT: xorps %xmm2, %xmm2
582 ; X64-NEXT: blendps {{.*#+}} xmm2 = xmm0[0],xmm2[1],xmm0[2,3]
583 ; X64-NEXT: insertps {{.*#+}} xmm2 = xmm2[0,1],xmm0[1],zero
584 ; X64-NEXT: insertps {{.*#+}} xmm2 = xmm2[0,1,2],xmm1[2]
585 ; X64-NEXT: movaps %xmm2, %xmm0
587 %vecext = extractelement <4 x float> %x, i32 0
588 %vecinit = insertelement <4 x float> undef, float %vecext, i32 0
589 %vecinit1 = insertelement <4 x float> %vecinit, float 0.0, i32 1
590 %vecinit3 = shufflevector <4 x float> %vecinit1, <4 x float> %x, <4 x i32> <i32 0, i32 1, i32 5, i32 undef>
591 %vecinit5 = shufflevector <4 x float> %vecinit3, <4 x float> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
592 ret <4 x float> %vecinit5
595 define <4 x i32> @i32_shuf_XYZ0(<4 x i32> %x, <4 x i32> %a) {
596 ; X32-LABEL: i32_shuf_XYZ0:
598 ; X32-NEXT: pxor %xmm1, %xmm1
599 ; X32-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5],xmm1[6,7]
602 ; X64-LABEL: i32_shuf_XYZ0:
604 ; X64-NEXT: pxor %xmm1, %xmm1
605 ; X64-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5],xmm1[6,7]
607 %vecext = extractelement <4 x i32> %x, i32 0
608 %vecinit = insertelement <4 x i32> undef, i32 %vecext, i32 0
609 %vecext1 = extractelement <4 x i32> %x, i32 1
610 %vecinit2 = insertelement <4 x i32> %vecinit, i32 %vecext1, i32 1
611 %vecext3 = extractelement <4 x i32> %x, i32 2
612 %vecinit4 = insertelement <4 x i32> %vecinit2, i32 %vecext3, i32 2
613 %vecinit5 = insertelement <4 x i32> %vecinit4, i32 0, i32 3
614 ret <4 x i32> %vecinit5
617 define <4 x i32> @i32_shuf_XY00(<4 x i32> %x, <4 x i32> %a) {
618 ; X32-LABEL: i32_shuf_XY00:
620 ; X32-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero
623 ; X64-LABEL: i32_shuf_XY00:
625 ; X64-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero
627 %vecext = extractelement <4 x i32> %x, i32 0
628 %vecinit = insertelement <4 x i32> undef, i32 %vecext, i32 0
629 %vecext1 = extractelement <4 x i32> %x, i32 1
630 %vecinit2 = insertelement <4 x i32> %vecinit, i32 %vecext1, i32 1
631 %vecinit3 = insertelement <4 x i32> %vecinit2, i32 0, i32 2
632 %vecinit4 = insertelement <4 x i32> %vecinit3, i32 0, i32 3
633 ret <4 x i32> %vecinit4
636 define <4 x i32> @i32_shuf_XYY0(<4 x i32> %x, <4 x i32> %a) {
637 ; X32-LABEL: i32_shuf_XYY0:
639 ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,1],zero
642 ; X64-LABEL: i32_shuf_XYY0:
644 ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,1],zero
646 %vecext = extractelement <4 x i32> %x, i32 0
647 %vecinit = insertelement <4 x i32> undef, i32 %vecext, i32 0
648 %vecext1 = extractelement <4 x i32> %x, i32 1
649 %vecinit2 = insertelement <4 x i32> %vecinit, i32 %vecext1, i32 1
650 %vecinit4 = insertelement <4 x i32> %vecinit2, i32 %vecext1, i32 2
651 %vecinit5 = insertelement <4 x i32> %vecinit4, i32 0, i32 3
652 ret <4 x i32> %vecinit5
655 define <4 x i32> @i32_shuf_XYW0(<4 x i32> %x, <4 x i32> %a) {
656 ; X32-LABEL: i32_shuf_XYW0:
658 ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,3],zero
661 ; X64-LABEL: i32_shuf_XYW0:
663 ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,3],zero
665 %vecext = extractelement <4 x i32> %x, i32 0
666 %vecinit = insertelement <4 x i32> undef, i32 %vecext, i32 0
667 %vecext1 = extractelement <4 x i32> %x, i32 1
668 %vecinit2 = insertelement <4 x i32> %vecinit, i32 %vecext1, i32 1
669 %vecext2 = extractelement <4 x i32> %x, i32 3
670 %vecinit3 = insertelement <4 x i32> %vecinit2, i32 %vecext2, i32 2
671 %vecinit4 = insertelement <4 x i32> %vecinit3, i32 0, i32 3
672 ret <4 x i32> %vecinit4
675 define <4 x i32> @i32_shuf_W00W(<4 x i32> %x, <4 x i32> %a) {
676 ; X32-LABEL: i32_shuf_W00W:
678 ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[3],zero,zero,xmm0[3]
681 ; X64-LABEL: i32_shuf_W00W:
683 ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[3],zero,zero,xmm0[3]
685 %vecext = extractelement <4 x i32> %x, i32 3
686 %vecinit = insertelement <4 x i32> undef, i32 %vecext, i32 0
687 %vecinit2 = insertelement <4 x i32> %vecinit, i32 0, i32 1
688 %vecinit3 = insertelement <4 x i32> %vecinit2, i32 0, i32 2
689 %vecinit4 = insertelement <4 x i32> %vecinit3, i32 %vecext, i32 3
690 ret <4 x i32> %vecinit4
693 define <4 x i32> @i32_shuf_X00A(<4 x i32> %x, <4 x i32> %a) {
694 ; X32-LABEL: i32_shuf_X00A:
696 ; X32-NEXT: pxor %xmm2, %xmm2
697 ; X32-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3,4,5,6,7]
698 ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0]
701 ; X64-LABEL: i32_shuf_X00A:
703 ; X64-NEXT: pxor %xmm2, %xmm2
704 ; X64-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3,4,5,6,7]
705 ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0]
707 %vecext = extractelement <4 x i32> %x, i32 0
708 %vecinit = insertelement <4 x i32> undef, i32 %vecext, i32 0
709 %vecinit1 = insertelement <4 x i32> %vecinit, i32 0, i32 1
710 %vecinit2 = insertelement <4 x i32> %vecinit1, i32 0, i32 2
711 %vecinit4 = shufflevector <4 x i32> %vecinit2, <4 x i32> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
712 ret <4 x i32> %vecinit4
715 define <4 x i32> @i32_shuf_X00X(<4 x i32> %x, <4 x i32> %a) {
716 ; X32-LABEL: i32_shuf_X00X:
718 ; X32-NEXT: pxor %xmm1, %xmm1
719 ; X32-NEXT: pblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3,4,5,6,7]
720 ; X32-NEXT: insertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm0[0]
721 ; X32-NEXT: movaps %xmm1, %xmm0
724 ; X64-LABEL: i32_shuf_X00X:
726 ; X64-NEXT: pxor %xmm1, %xmm1
727 ; X64-NEXT: pblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3,4,5,6,7]
728 ; X64-NEXT: insertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm0[0]
729 ; X64-NEXT: movaps %xmm1, %xmm0
731 %vecext = extractelement <4 x i32> %x, i32 0
732 %vecinit = insertelement <4 x i32> undef, i32 %vecext, i32 0
733 %vecinit1 = insertelement <4 x i32> %vecinit, i32 0, i32 1
734 %vecinit2 = insertelement <4 x i32> %vecinit1, i32 0, i32 2
735 %vecinit4 = shufflevector <4 x i32> %vecinit2, <4 x i32> %x, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
736 ret <4 x i32> %vecinit4
739 define <4 x i32> @i32_shuf_X0YC(<4 x i32> %x, <4 x i32> %a) {
740 ; X32-LABEL: i32_shuf_X0YC:
742 ; X32-NEXT: pmovzxdq {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero
743 ; X32-NEXT: insertps {{.*#+}} xmm2 = xmm2[0,1],xmm0[1],zero
744 ; X32-NEXT: insertps {{.*#+}} xmm2 = xmm2[0,1,2],xmm1[2]
745 ; X32-NEXT: movaps %xmm2, %xmm0
748 ; X64-LABEL: i32_shuf_X0YC:
750 ; X64-NEXT: pmovzxdq {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero
751 ; X64-NEXT: insertps {{.*#+}} xmm2 = xmm2[0,1],xmm0[1],zero
752 ; X64-NEXT: insertps {{.*#+}} xmm2 = xmm2[0,1,2],xmm1[2]
753 ; X64-NEXT: movaps %xmm2, %xmm0
755 %vecext = extractelement <4 x i32> %x, i32 0
756 %vecinit = insertelement <4 x i32> undef, i32 %vecext, i32 0
757 %vecinit1 = insertelement <4 x i32> %vecinit, i32 0, i32 1
758 %vecinit3 = shufflevector <4 x i32> %vecinit1, <4 x i32> %x, <4 x i32> <i32 0, i32 1, i32 5, i32 undef>
759 %vecinit5 = shufflevector <4 x i32> %vecinit3, <4 x i32> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 6>
760 ret <4 x i32> %vecinit5
763 ;; Test for a bug in the first implementation of LowerBuildVectorv4x32
764 define < 4 x float> @test_insertps_no_undef(<4 x float> %x) {
765 ; X32-LABEL: test_insertps_no_undef:
767 ; X32-NEXT: xorps %xmm1, %xmm1
768 ; X32-NEXT: blendps {{.*#+}} xmm1 = xmm0[0,1,2],xmm1[3]
769 ; X32-NEXT: maxps %xmm1, %xmm0
772 ; X64-LABEL: test_insertps_no_undef:
774 ; X64-NEXT: xorps %xmm1, %xmm1
775 ; X64-NEXT: blendps {{.*#+}} xmm1 = xmm0[0,1,2],xmm1[3]
776 ; X64-NEXT: maxps %xmm1, %xmm0
778 %vecext = extractelement <4 x float> %x, i32 0
779 %vecinit = insertelement <4 x float> undef, float %vecext, i32 0
780 %vecext1 = extractelement <4 x float> %x, i32 1
781 %vecinit2 = insertelement <4 x float> %vecinit, float %vecext1, i32 1
782 %vecext3 = extractelement <4 x float> %x, i32 2
783 %vecinit4 = insertelement <4 x float> %vecinit2, float %vecext3, i32 2
784 %vecinit5 = insertelement <4 x float> %vecinit4, float 0.0, i32 3
785 %mask = fcmp olt <4 x float> %vecinit5, %x
786 %res = select <4 x i1> %mask, <4 x float> %x, <4 x float>%vecinit5
790 define <8 x i16> @blendvb_fallback(<8 x i1> %mask, <8 x i16> %x, <8 x i16> %y) {
791 ; X32-LABEL: blendvb_fallback:
793 ; X32-NEXT: psllw $15, %xmm0
794 ; X32-NEXT: psraw $15, %xmm0
795 ; X32-NEXT: pblendvb %xmm1, %xmm2
796 ; X32-NEXT: movdqa %xmm2, %xmm0
799 ; X64-LABEL: blendvb_fallback:
801 ; X64-NEXT: psllw $15, %xmm0
802 ; X64-NEXT: psraw $15, %xmm0
803 ; X64-NEXT: pblendvb %xmm1, %xmm2
804 ; X64-NEXT: movdqa %xmm2, %xmm0
806 %ret = select <8 x i1> %mask, <8 x i16> %x, <8 x i16> %y
810 ; On X32, account for the argument's move to registers
811 define <4 x float> @insertps_from_vector_load(<4 x float> %a, <4 x float>* nocapture readonly %pb) {
812 ; X32-LABEL: insertps_from_vector_load:
814 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
815 ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
818 ; X64-LABEL: insertps_from_vector_load:
820 ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
822 %1 = load <4 x float>* %pb, align 16
823 %2 = tail call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %a, <4 x float> %1, i32 48)
827 ;; Use a non-zero CountS for insertps
828 ;; Try to match a bit more of the instr, since we need the load's offset.
829 define <4 x float> @insertps_from_vector_load_offset(<4 x float> %a, <4 x float>* nocapture readonly %pb) {
830 ; X32-LABEL: insertps_from_vector_load_offset:
832 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
833 ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1],mem[1],xmm0[3]
836 ; X64-LABEL: insertps_from_vector_load_offset:
838 ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1],mem[1],xmm0[3]
840 %1 = load <4 x float>* %pb, align 16
841 %2 = tail call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %a, <4 x float> %1, i32 96)
845 ;; Try to match a bit more of the instr, since we need the load's offset.
846 define <4 x float> @insertps_from_vector_load_offset_2(<4 x float> %a, <4 x float>* nocapture readonly %pb, i64 %index) {
847 ; X32-LABEL: insertps_from_vector_load_offset_2:
849 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
850 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
851 ; X32-NEXT: shll $4, %ecx
852 ; X32-NEXT: insertps {{.*#+}} xmm0 = mem[3],xmm0[1,2,3]
855 ; X64-LABEL: insertps_from_vector_load_offset_2:
857 ; X64-NEXT: shlq $4, %rsi
858 ; X64-NEXT: insertps {{.*#+}} xmm0 = mem[3],xmm0[1,2,3]
860 %1 = getelementptr inbounds <4 x float>* %pb, i64 %index
861 %2 = load <4 x float>* %1, align 16
862 %3 = tail call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %a, <4 x float> %2, i32 192)
866 define <4 x float> @insertps_from_broadcast_loadf32(<4 x float> %a, float* nocapture readonly %fb, i64 %index) {
867 ; X32-LABEL: insertps_from_broadcast_loadf32:
869 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
870 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
871 ; X32-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
872 ; X32-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0,0,0]
873 ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0]
876 ; X64-LABEL: insertps_from_broadcast_loadf32:
878 ; X64-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
879 ; X64-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0,0,0]
880 ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0]
882 %1 = getelementptr inbounds float* %fb, i64 %index
883 %2 = load float* %1, align 4
884 %3 = insertelement <4 x float> undef, float %2, i32 0
885 %4 = insertelement <4 x float> %3, float %2, i32 1
886 %5 = insertelement <4 x float> %4, float %2, i32 2
887 %6 = insertelement <4 x float> %5, float %2, i32 3
888 %7 = tail call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %a, <4 x float> %6, i32 48)
892 define <4 x float> @insertps_from_broadcast_loadv4f32(<4 x float> %a, <4 x float>* nocapture readonly %b) {
893 ; X32-LABEL: insertps_from_broadcast_loadv4f32:
895 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
896 ; X32-NEXT: movups (%eax), %xmm1
897 ; X32-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0,0,0]
898 ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0]
901 ; X64-LABEL: insertps_from_broadcast_loadv4f32:
903 ; X64-NEXT: movups (%rdi), %xmm1
904 ; X64-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0,0,0]
905 ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0]
907 %1 = load <4 x float>* %b, align 4
908 %2 = extractelement <4 x float> %1, i32 0
909 %3 = insertelement <4 x float> undef, float %2, i32 0
910 %4 = insertelement <4 x float> %3, float %2, i32 1
911 %5 = insertelement <4 x float> %4, float %2, i32 2
912 %6 = insertelement <4 x float> %5, float %2, i32 3
913 %7 = tail call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %a, <4 x float> %6, i32 48)
917 ;; FIXME: We're emitting an extraneous pshufd/vbroadcast.
918 define <4 x float> @insertps_from_broadcast_multiple_use(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d, float* nocapture readonly %fb, i64 %index) {
919 ; X32-LABEL: insertps_from_broadcast_multiple_use:
921 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
922 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
923 ; X32-NEXT: movss {{.*#+}} xmm4 = mem[0],zero,zero,zero
924 ; X32-NEXT: shufps {{.*#+}} xmm4 = xmm4[0,0,0,0]
925 ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm4[0]
926 ; X32-NEXT: insertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm4[0]
927 ; X32-NEXT: insertps {{.*#+}} xmm2 = xmm2[0,1,2],xmm4[0]
928 ; X32-NEXT: insertps {{.*#+}} xmm3 = xmm3[0,1,2],xmm4[0]
929 ; X32-NEXT: addps %xmm1, %xmm0
930 ; X32-NEXT: addps %xmm2, %xmm3
931 ; X32-NEXT: addps %xmm3, %xmm0
934 ; X64-LABEL: insertps_from_broadcast_multiple_use:
936 ; X64-NEXT: movss {{.*#+}} xmm4 = mem[0],zero,zero,zero
937 ; X64-NEXT: shufps {{.*#+}} xmm4 = xmm4[0,0,0,0]
938 ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm4[0]
939 ; X64-NEXT: insertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm4[0]
940 ; X64-NEXT: insertps {{.*#+}} xmm2 = xmm2[0,1,2],xmm4[0]
941 ; X64-NEXT: insertps {{.*#+}} xmm3 = xmm3[0,1,2],xmm4[0]
942 ; X64-NEXT: addps %xmm1, %xmm0
943 ; X64-NEXT: addps %xmm2, %xmm3
944 ; X64-NEXT: addps %xmm3, %xmm0
946 %1 = getelementptr inbounds float* %fb, i64 %index
947 %2 = load float* %1, align 4
948 %3 = insertelement <4 x float> undef, float %2, i32 0
949 %4 = insertelement <4 x float> %3, float %2, i32 1
950 %5 = insertelement <4 x float> %4, float %2, i32 2
951 %6 = insertelement <4 x float> %5, float %2, i32 3
952 %7 = tail call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %a, <4 x float> %6, i32 48)
953 %8 = tail call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %b, <4 x float> %6, i32 48)
954 %9 = tail call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %c, <4 x float> %6, i32 48)
955 %10 = tail call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %d, <4 x float> %6, i32 48)
956 %11 = fadd <4 x float> %7, %8
957 %12 = fadd <4 x float> %9, %10
958 %13 = fadd <4 x float> %11, %12
962 define <4 x float> @insertps_with_undefs(<4 x float> %a, float* %b) {
963 ; X32-LABEL: insertps_with_undefs:
965 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
966 ; X32-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
967 ; X32-NEXT: insertps {{.*#+}} xmm1 = xmm1[0],zero,xmm0[0],xmm1[3]
968 ; X32-NEXT: movaps %xmm1, %xmm0
971 ; X64-LABEL: insertps_with_undefs:
973 ; X64-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
974 ; X64-NEXT: insertps {{.*#+}} xmm1 = xmm1[0],zero,xmm0[0],xmm1[3]
975 ; X64-NEXT: movaps %xmm1, %xmm0
977 %1 = load float* %b, align 4
978 %2 = insertelement <4 x float> undef, float %1, i32 0
979 %result = shufflevector <4 x float> %a, <4 x float> %2, <4 x i32> <i32 4, i32 undef, i32 0, i32 7>
980 ret <4 x float> %result
983 ; Test for a bug in X86ISelLowering.cpp:getINSERTPS where we were using
984 ; the destination index to change the load, instead of the source index.
985 define <4 x float> @pr20087(<4 x float> %a, <4 x float> *%ptr) {
986 ; X32-LABEL: pr20087:
988 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
989 ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],zero,xmm0[2],mem[2]
992 ; X64-LABEL: pr20087:
994 ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],zero,xmm0[2],mem[2]
996 %load = load <4 x float> *%ptr
997 %ret = shufflevector <4 x float> %load, <4 x float> %a, <4 x i32> <i32 4, i32 undef, i32 6, i32 2>
1001 ; Edge case for insertps where we end up with a shuffle with mask=<0, 7, -1, -1>
1002 define void @insertps_pr20411(i32* noalias nocapture %RET) #1 {
1003 ; X32-LABEL: insertps_pr20411:
1005 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
1006 ; X32-NEXT: movaps {{.*#+}} xmm0 = [3,3,3,3]
1007 ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],mem[3],zero,zero
1008 ; X32-NEXT: movups %xmm0, (%eax)
1011 ; X64-LABEL: insertps_pr20411:
1013 ; X64-NEXT: movaps {{.*#+}} xmm0 = [3,3,3,3]
1014 ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],mem[3],zero,zero
1015 ; X64-NEXT: movups %xmm0, (%rdi)
1017 %gather_load = shufflevector <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, <8 x i32> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
1018 %shuffle109 = shufflevector <4 x i32> <i32 4, i32 5, i32 6, i32 7>, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> ; 4 5 6 7
1019 %shuffle116 = shufflevector <8 x i32> %gather_load, <8 x i32> undef, <4 x i32> <i32 3, i32 undef, i32 undef, i32 undef> ; 3 x x x
1020 %shuffle117 = shufflevector <4 x i32> %shuffle109, <4 x i32> %shuffle116, <4 x i32> <i32 4, i32 3, i32 undef, i32 undef> ; 3 7 x x
1021 %ptrcast = bitcast i32* %RET to <4 x i32>*
1022 store <4 x i32> %shuffle117, <4 x i32>* %ptrcast, align 4
1026 define <4 x float> @insertps_4(<4 x float> %A, <4 x float> %B) {
1027 ; X32-LABEL: insertps_4:
1028 ; X32: ## BB#0: ## %entry
1029 ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],zero,xmm1[2],zero
1032 ; X64-LABEL: insertps_4:
1033 ; X64: ## BB#0: ## %entry
1034 ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],zero,xmm1[2],zero
1037 %vecext = extractelement <4 x float> %A, i32 0
1038 %vecinit = insertelement <4 x float> undef, float %vecext, i32 0
1039 %vecinit1 = insertelement <4 x float> %vecinit, float 0.000000e+00, i32 1
1040 %vecext2 = extractelement <4 x float> %B, i32 2
1041 %vecinit3 = insertelement <4 x float> %vecinit1, float %vecext2, i32 2
1042 %vecinit4 = insertelement <4 x float> %vecinit3, float 0.000000e+00, i32 3
1043 ret <4 x float> %vecinit4
1046 define <4 x float> @insertps_5(<4 x float> %A, <4 x float> %B) {
1047 ; X32-LABEL: insertps_5:
1048 ; X32: ## BB#0: ## %entry
1049 ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[1],zero,zero
1052 ; X64-LABEL: insertps_5:
1053 ; X64: ## BB#0: ## %entry
1054 ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[1],zero,zero
1057 %vecext = extractelement <4 x float> %A, i32 0
1058 %vecinit = insertelement <4 x float> undef, float %vecext, i32 0
1059 %vecext1 = extractelement <4 x float> %B, i32 1
1060 %vecinit2 = insertelement <4 x float> %vecinit, float %vecext1, i32 1
1061 %vecinit3 = insertelement <4 x float> %vecinit2, float 0.000000e+00, i32 2
1062 %vecinit4 = insertelement <4 x float> %vecinit3, float 0.000000e+00, i32 3
1063 ret <4 x float> %vecinit4
1066 define <4 x float> @insertps_6(<4 x float> %A, <4 x float> %B) {
1067 ; X32-LABEL: insertps_6:
1068 ; X32: ## BB#0: ## %entry
1069 ; X32-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[1],xmm1[2],zero
1072 ; X64-LABEL: insertps_6:
1073 ; X64: ## BB#0: ## %entry
1074 ; X64-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[1],xmm1[2],zero
1077 %vecext = extractelement <4 x float> %A, i32 1
1078 %vecinit = insertelement <4 x float> <float 0.000000e+00, float undef, float undef, float undef>, float %vecext, i32 1
1079 %vecext1 = extractelement <4 x float> %B, i32 2
1080 %vecinit2 = insertelement <4 x float> %vecinit, float %vecext1, i32 2
1081 %vecinit3 = insertelement <4 x float> %vecinit2, float 0.000000e+00, i32 3
1082 ret <4 x float> %vecinit3
1085 define <4 x float> @insertps_7(<4 x float> %A, <4 x float> %B) {
1086 ; X32-LABEL: insertps_7:
1087 ; X32: ## BB#0: ## %entry
1088 ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],zero,xmm1[1],zero
1091 ; X64-LABEL: insertps_7:
1092 ; X64: ## BB#0: ## %entry
1093 ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],zero,xmm1[1],zero
1096 %vecext = extractelement <4 x float> %A, i32 0
1097 %vecinit = insertelement <4 x float> undef, float %vecext, i32 0
1098 %vecinit1 = insertelement <4 x float> %vecinit, float 0.000000e+00, i32 1
1099 %vecext2 = extractelement <4 x float> %B, i32 1
1100 %vecinit3 = insertelement <4 x float> %vecinit1, float %vecext2, i32 2
1101 %vecinit4 = insertelement <4 x float> %vecinit3, float 0.000000e+00, i32 3
1102 ret <4 x float> %vecinit4
1105 define <4 x float> @insertps_8(<4 x float> %A, <4 x float> %B) {
1106 ; X32-LABEL: insertps_8:
1107 ; X32: ## BB#0: ## %entry
1108 ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
1111 ; X64-LABEL: insertps_8:
1112 ; X64: ## BB#0: ## %entry
1113 ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
1116 %vecext = extractelement <4 x float> %A, i32 0
1117 %vecinit = insertelement <4 x float> undef, float %vecext, i32 0
1118 %vecext1 = extractelement <4 x float> %B, i32 0
1119 %vecinit2 = insertelement <4 x float> %vecinit, float %vecext1, i32 1
1120 %vecinit3 = insertelement <4 x float> %vecinit2, float 0.000000e+00, i32 2
1121 %vecinit4 = insertelement <4 x float> %vecinit3, float 0.000000e+00, i32 3
1122 ret <4 x float> %vecinit4
1125 define <4 x float> @insertps_9(<4 x float> %A, <4 x float> %B) {
1126 ; X32-LABEL: insertps_9:
1127 ; X32: ## BB#0: ## %entry
1128 ; X32-NEXT: insertps {{.*#+}} xmm1 = zero,xmm0[0],xmm1[2],zero
1129 ; X32-NEXT: movaps %xmm1, %xmm0
1132 ; X64-LABEL: insertps_9:
1133 ; X64: ## BB#0: ## %entry
1134 ; X64-NEXT: insertps {{.*#+}} xmm1 = zero,xmm0[0],xmm1[2],zero
1135 ; X64-NEXT: movaps %xmm1, %xmm0
1138 %vecext = extractelement <4 x float> %A, i32 0
1139 %vecinit = insertelement <4 x float> <float 0.000000e+00, float undef, float undef, float undef>, float %vecext, i32 1
1140 %vecext1 = extractelement <4 x float> %B, i32 2
1141 %vecinit2 = insertelement <4 x float> %vecinit, float %vecext1, i32 2
1142 %vecinit3 = insertelement <4 x float> %vecinit2, float 0.000000e+00, i32 3
1143 ret <4 x float> %vecinit3
1146 define <4 x float> @insertps_10(<4 x float> %A)
1147 ; X32-LABEL: insertps_10:
1149 ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],zero,xmm0[0],zero
1152 ; X64-LABEL: insertps_10:
1154 ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],zero,xmm0[0],zero
1157 %vecext = extractelement <4 x float> %A, i32 0
1158 %vecbuild1 = insertelement <4 x float> <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00>, float %vecext, i32 0
1159 %vecbuild2 = insertelement <4 x float> %vecbuild1, float %vecext, i32 2
1160 ret <4 x float> %vecbuild2
1163 define <4 x float> @build_vector_to_shuffle_1(<4 x float> %A) {
1164 ; X32-LABEL: build_vector_to_shuffle_1:
1165 ; X32: ## BB#0: ## %entry
1166 ; X32-NEXT: xorps %xmm1, %xmm1
1167 ; X32-NEXT: blendps {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2],xmm0[3]
1170 ; X64-LABEL: build_vector_to_shuffle_1:
1171 ; X64: ## BB#0: ## %entry
1172 ; X64-NEXT: xorps %xmm1, %xmm1
1173 ; X64-NEXT: blendps {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2],xmm0[3]
1176 %vecext = extractelement <4 x float> %A, i32 1
1177 %vecinit = insertelement <4 x float> zeroinitializer, float %vecext, i32 1
1178 %vecinit1 = insertelement <4 x float> %vecinit, float 0.0, i32 2
1179 %vecinit3 = shufflevector <4 x float> %vecinit1, <4 x float> %A, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
1180 ret <4 x float> %vecinit3
1183 define <4 x float> @build_vector_to_shuffle_2(<4 x float> %A) {
1184 ; X32-LABEL: build_vector_to_shuffle_2:
1185 ; X32: ## BB#0: ## %entry
1186 ; X32-NEXT: xorps %xmm1, %xmm1
1187 ; X32-NEXT: blendps {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3]
1190 ; X64-LABEL: build_vector_to_shuffle_2:
1191 ; X64: ## BB#0: ## %entry
1192 ; X64-NEXT: xorps %xmm1, %xmm1
1193 ; X64-NEXT: blendps {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3]
1196 %vecext = extractelement <4 x float> %A, i32 1
1197 %vecinit = insertelement <4 x float> zeroinitializer, float %vecext, i32 1
1198 %vecinit1 = insertelement <4 x float> %vecinit, float 0.0, i32 2
1199 ret <4 x float> %vecinit1