1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core-avx2 -mattr=+avx2 | FileCheck %s
3 define <4 x i32> @trunc4(<4 x i64> %A) nounwind {
6 ; CHECK-NEXT: vmovdqa {{.*#+}} ymm1 = <0,2,4,6,u,u,u,u>
7 ; CHECK-NEXT: vpermd %ymm0, %ymm1, %ymm0
8 ; CHECK-NEXT: vzeroupper
10 %B = trunc <4 x i64> %A to <4 x i32>
14 define <8 x i16> @trunc8(<8 x i32> %A) nounwind {
15 ; CHECK-LABEL: trunc8:
17 ; CHECK-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero
18 ; CHECK-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
19 ; CHECK-NEXT: vzeroupper
21 %B = trunc <8 x i32> %A to <8 x i16>
25 define <4 x i64> @sext4(<4 x i32> %A) nounwind {
28 ; CHECK-NEXT: vpmovsxdq %xmm0, %ymm0
30 %B = sext <4 x i32> %A to <4 x i64>
34 define <8 x i32> @sext8(<8 x i16> %A) nounwind {
37 ; CHECK-NEXT: vpmovsxwd %xmm0, %ymm0
39 %B = sext <8 x i16> %A to <8 x i32>
43 define <4 x i64> @zext4(<4 x i32> %A) nounwind {
46 ; CHECK-NEXT: vpmovzxdq {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
48 %B = zext <4 x i32> %A to <4 x i64>
52 define <8 x i32> @zext8(<8 x i16> %A) nounwind {
55 ; CHECK-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
57 %B = zext <8 x i16> %A to <8 x i32>
61 define <8 x i32> @zext_8i8_8i32(<8 x i8> %A) nounwind {
62 ; CHECK-LABEL: zext_8i8_8i32:
64 ; CHECK-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
65 ; CHECK-NEXT: vpbroadcastd {{.*}}(%rip), %ymm1
66 ; CHECK-NEXT: vpand %ymm1, %ymm0, %ymm0
68 %B = zext <8 x i8> %A to <8 x i32>
72 define <16 x i16> @zext_16i8_16i16(<16 x i8> %z) {
73 ; CHECK-LABEL: zext_16i8_16i16:
75 ; CHECK-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
77 %t = zext <16 x i8> %z to <16 x i16>
81 define <16 x i16> @sext_16i8_16i16(<16 x i8> %z) {
82 ; CHECK-LABEL: sext_16i8_16i16:
84 ; CHECK-NEXT: vpmovsxbw %xmm0, %ymm0
86 %t = sext <16 x i8> %z to <16 x i16>
90 define <16 x i8> @trunc_16i16_16i8(<16 x i16> %z) {
91 ; CHECK-LABEL: trunc_16i16_16i8:
93 ; CHECK-NEXT: vextracti128 $1, %ymm0, %xmm1
94 ; CHECK-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
95 ; CHECK-NEXT: vpshufb %xmm2, %xmm1, %xmm1
96 ; CHECK-NEXT: vpshufb %xmm2, %xmm0, %xmm0
97 ; CHECK-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
98 ; CHECK-NEXT: vzeroupper
100 %t = trunc <16 x i16> %z to <16 x i8>
104 define <4 x i64> @load_sext_test1(<4 x i32> *%ptr) {
105 ; CHECK-LABEL: load_sext_test1:
107 ; CHECK-NEXT: vpmovsxdq (%rdi), %ymm0
109 %X = load <4 x i32>, <4 x i32>* %ptr
110 %Y = sext <4 x i32> %X to <4 x i64>
114 define <4 x i64> @load_sext_test2(<4 x i8> *%ptr) {
115 ; CHECK-LABEL: load_sext_test2:
117 ; CHECK-NEXT: vpmovsxbq (%rdi), %ymm0
119 %X = load <4 x i8>, <4 x i8>* %ptr
120 %Y = sext <4 x i8> %X to <4 x i64>
124 define <4 x i64> @load_sext_test3(<4 x i16> *%ptr) {
125 ; CHECK-LABEL: load_sext_test3:
127 ; CHECK-NEXT: vpmovsxwq (%rdi), %ymm0
129 %X = load <4 x i16>, <4 x i16>* %ptr
130 %Y = sext <4 x i16> %X to <4 x i64>
134 define <8 x i32> @load_sext_test4(<8 x i16> *%ptr) {
135 ; CHECK-LABEL: load_sext_test4:
137 ; CHECK-NEXT: vpmovsxwd (%rdi), %ymm0
139 %X = load <8 x i16>, <8 x i16>* %ptr
140 %Y = sext <8 x i16> %X to <8 x i32>
144 define <8 x i32> @load_sext_test5(<8 x i8> *%ptr) {
145 ; CHECK-LABEL: load_sext_test5:
147 ; CHECK-NEXT: vpmovsxbd (%rdi), %ymm0
149 %X = load <8 x i8>, <8 x i8>* %ptr
150 %Y = sext <8 x i8> %X to <8 x i32>