1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s
4 define <4 x i64> @A(i64* %ptr) nounwind uwtable readnone ssp {
6 ; CHECK: ## BB#0: ## %entry
7 ; CHECK-NEXT: vbroadcastsd (%rdi), %ymm0
10 %q = load i64, i64* %ptr, align 8
11 %vecinit.i = insertelement <4 x i64> undef, i64 %q, i32 0
12 %vecinit2.i = insertelement <4 x i64> %vecinit.i, i64 %q, i32 1
13 %vecinit4.i = insertelement <4 x i64> %vecinit2.i, i64 %q, i32 2
14 %vecinit6.i = insertelement <4 x i64> %vecinit4.i, i64 %q, i32 3
15 ret <4 x i64> %vecinit6.i
18 define <8 x i32> @B(i32* %ptr) nounwind uwtable readnone ssp {
20 ; CHECK: ## BB#0: ## %entry
21 ; CHECK-NEXT: vbroadcastss (%rdi), %ymm0
24 %q = load i32, i32* %ptr, align 4
25 %vecinit.i = insertelement <8 x i32> undef, i32 %q, i32 0
26 %vecinit2.i = insertelement <8 x i32> %vecinit.i, i32 %q, i32 1
27 %vecinit4.i = insertelement <8 x i32> %vecinit2.i, i32 %q, i32 2
28 %vecinit6.i = insertelement <8 x i32> %vecinit4.i, i32 %q, i32 3
29 ret <8 x i32> %vecinit6.i
32 define <4 x double> @C(double* %ptr) nounwind uwtable readnone ssp {
34 ; CHECK: ## BB#0: ## %entry
35 ; CHECK-NEXT: vbroadcastsd (%rdi), %ymm0
38 %q = load double, double* %ptr, align 8
39 %vecinit.i = insertelement <4 x double> undef, double %q, i32 0
40 %vecinit2.i = insertelement <4 x double> %vecinit.i, double %q, i32 1
41 %vecinit4.i = insertelement <4 x double> %vecinit2.i, double %q, i32 2
42 %vecinit6.i = insertelement <4 x double> %vecinit4.i, double %q, i32 3
43 ret <4 x double> %vecinit6.i
46 define <8 x float> @D(float* %ptr) nounwind uwtable readnone ssp {
48 ; CHECK: ## BB#0: ## %entry
49 ; CHECK-NEXT: vbroadcastss (%rdi), %ymm0
52 %q = load float, float* %ptr, align 4
53 %vecinit.i = insertelement <8 x float> undef, float %q, i32 0
54 %vecinit2.i = insertelement <8 x float> %vecinit.i, float %q, i32 1
55 %vecinit4.i = insertelement <8 x float> %vecinit2.i, float %q, i32 2
56 %vecinit6.i = insertelement <8 x float> %vecinit4.i, float %q, i32 3
57 ret <8 x float> %vecinit6.i
62 define <4 x float> @e(float* %ptr) nounwind uwtable readnone ssp {
64 ; CHECK: ## BB#0: ## %entry
65 ; CHECK-NEXT: vbroadcastss (%rdi), %xmm0
68 %q = load float, float* %ptr, align 4
69 %vecinit.i = insertelement <4 x float> undef, float %q, i32 0
70 %vecinit2.i = insertelement <4 x float> %vecinit.i, float %q, i32 1
71 %vecinit4.i = insertelement <4 x float> %vecinit2.i, float %q, i32 2
72 %vecinit6.i = insertelement <4 x float> %vecinit4.i, float %q, i32 3
73 ret <4 x float> %vecinit6.i
76 ; Don't broadcast constants on pre-AVX2 hardware.
77 define <4 x float> @_e2(float* %ptr) nounwind uwtable readnone ssp {
79 ; CHECK: ## BB#0: ## %entry
80 ; CHECK-NEXT: vmovaps {{.*#+}} xmm0 = [-7.812500e-03,-7.812500e-03,-7.812500e-03,-7.812500e-03]
83 %vecinit.i = insertelement <4 x float> undef, float 0xbf80000000000000, i32 0
84 %vecinit2.i = insertelement <4 x float> %vecinit.i, float 0xbf80000000000000, i32 1
85 %vecinit4.i = insertelement <4 x float> %vecinit2.i, float 0xbf80000000000000, i32 2
86 %vecinit6.i = insertelement <4 x float> %vecinit4.i, float 0xbf80000000000000, i32 3
87 ret <4 x float> %vecinit6.i
91 define <4 x i32> @F(i32* %ptr) nounwind uwtable readnone ssp {
93 ; CHECK: ## BB#0: ## %entry
94 ; CHECK-NEXT: vbroadcastss (%rdi), %xmm0
97 %q = load i32, i32* %ptr, align 4
98 %vecinit.i = insertelement <4 x i32> undef, i32 %q, i32 0
99 %vecinit2.i = insertelement <4 x i32> %vecinit.i, i32 %q, i32 1
100 %vecinit4.i = insertelement <4 x i32> %vecinit2.i, i32 %q, i32 2
101 %vecinit6.i = insertelement <4 x i32> %vecinit4.i, i32 %q, i32 3
102 ret <4 x i32> %vecinit6.i
105 ; Unsupported vbroadcasts
107 define <2 x i64> @G(i64* %ptr) nounwind uwtable readnone ssp {
109 ; CHECK: ## BB#0: ## %entry
110 ; CHECK-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
111 ; CHECK-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
114 %q = load i64, i64* %ptr, align 8
115 %vecinit.i = insertelement <2 x i64> undef, i64 %q, i32 0
116 %vecinit2.i = insertelement <2 x i64> %vecinit.i, i64 %q, i32 1
117 ret <2 x i64> %vecinit2.i
120 define <4 x i32> @H(<4 x i32> %a) {
122 ; CHECK: ## BB#0: ## %entry
123 ; CHECK-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
126 %x = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
130 define <2 x double> @I(double* %ptr) nounwind uwtable readnone ssp {
132 ; CHECK: ## BB#0: ## %entry
133 ; CHECK-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
136 %q = load double, double* %ptr, align 4
137 %vecinit.i = insertelement <2 x double> undef, double %q, i32 0
138 %vecinit2.i = insertelement <2 x double> %vecinit.i, double %q, i32 1
139 ret <2 x double> %vecinit2.i
142 define <4 x float> @_RR(float* %ptr, i32* %k) nounwind uwtable readnone ssp {
144 ; CHECK: ## BB#0: ## %entry
145 ; CHECK-NEXT: vbroadcastss (%rdi), %xmm0
146 ; CHECK-NEXT: movl (%rsi), %eax
147 ; CHECK-NEXT: movl %eax, (%rax)
150 %q = load float, float* %ptr, align 4
151 %vecinit.i = insertelement <4 x float> undef, float %q, i32 0
152 %vecinit2.i = insertelement <4 x float> %vecinit.i, float %q, i32 1
153 %vecinit4.i = insertelement <4 x float> %vecinit2.i, float %q, i32 2
154 %vecinit6.i = insertelement <4 x float> %vecinit4.i, float %q, i32 3
156 %j = load i32, i32* %k, align 4
157 store i32 %j, i32* undef
158 ret <4 x float> %vecinit6.i
161 define <4 x float> @_RR2(float* %ptr, i32* %k) nounwind uwtable readnone ssp {
163 ; CHECK: ## BB#0: ## %entry
164 ; CHECK-NEXT: vbroadcastss (%rdi), %xmm0
167 %q = load float, float* %ptr, align 4
168 %v = insertelement <4 x float> undef, float %q, i32 0
169 %t = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> zeroinitializer
173 ; These tests check that a vbroadcast instruction is used when we have a splat
174 ; formed from a concat_vectors (via the shufflevector) of two BUILD_VECTORs
175 ; (via the insertelements).
177 define <8 x float> @splat_concat1(float* %p) {
178 ; CHECK-LABEL: splat_concat1:
180 ; CHECK-NEXT: vbroadcastss (%rdi), %ymm0
182 %1 = load float, float* %p, align 4
183 %2 = insertelement <4 x float> undef, float %1, i32 0
184 %3 = insertelement <4 x float> %2, float %1, i32 1
185 %4 = insertelement <4 x float> %3, float %1, i32 2
186 %5 = insertelement <4 x float> %4, float %1, i32 3
187 %6 = shufflevector <4 x float> %5, <4 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
191 define <8 x float> @splat_concat2(float* %p) {
192 ; CHECK-LABEL: splat_concat2:
194 ; CHECK-NEXT: vbroadcastss (%rdi), %ymm0
196 %1 = load float, float* %p, align 4
197 %2 = insertelement <4 x float> undef, float %1, i32 0
198 %3 = insertelement <4 x float> %2, float %1, i32 1
199 %4 = insertelement <4 x float> %3, float %1, i32 2
200 %5 = insertelement <4 x float> %4, float %1, i32 3
201 %6 = insertelement <4 x float> undef, float %1, i32 0
202 %7 = insertelement <4 x float> %6, float %1, i32 1
203 %8 = insertelement <4 x float> %7, float %1, i32 2
204 %9 = insertelement <4 x float> %8, float %1, i32 3
205 %10 = shufflevector <4 x float> %5, <4 x float> %9, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
209 define <4 x double> @splat_concat3(double* %p) {
210 ; CHECK-LABEL: splat_concat3:
212 ; CHECK-NEXT: vbroadcastsd (%rdi), %ymm0
214 %1 = load double, double* %p, align 8
215 %2 = insertelement <2 x double> undef, double %1, i32 0
216 %3 = insertelement <2 x double> %2, double %1, i32 1
217 %4 = shufflevector <2 x double> %3, <2 x double> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
221 define <4 x double> @splat_concat4(double* %p) {
222 ; CHECK-LABEL: splat_concat4:
224 ; CHECK-NEXT: vbroadcastsd (%rdi), %ymm0
226 %1 = load double, double* %p, align 8
227 %2 = insertelement <2 x double> undef, double %1, i32 0
228 %3 = insertelement <2 x double> %2, double %1, i32 1
229 %4 = insertelement <2 x double> undef, double %1, i32 0
230 %5 = insertelement <2 x double> %2, double %1, i32 1
231 %6 = shufflevector <2 x double> %3, <2 x double> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 3>