1 ; Test 8-bit atomic min/max operations.
3 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK
4 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
5 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
7 ; Check signed minimum.
8 ; - CHECK is for the main loop.
9 ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
10 ; RLL is set up correctly. The negation is independent of the NILL and L
12 ; - CHECK-SHIFT2 makes sure that %b is shifted into the high part of the word
13 ; before being used, and that the low bits are set to 1. This sequence is
14 ; independent of the other loop prologue instructions.
15 define i8 @f1(i8 *%src, i8 %b) {
17 ; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
18 ; CHECK: nill %r2, 65532
19 ; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
20 ; CHECK: [[LOOP:\.[^:]*]]:
21 ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
22 ; CHECK: cr [[ROT]], %r3
23 ; CHECK: jle [[KEEP:\..*]]
24 ; CHECK: risbg [[ROT]], %r3, 32, 39, 0
26 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
27 ; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
29 ; CHECK: rll %r2, [[OLD]], 8([[SHIFT]])
33 ; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
34 ; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
36 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
38 ; CHECK-SHIFT1: br %r14
41 ; CHECK-SHIFT2: sll %r3, 24
43 ; CHECK-SHIFT2: cr {{%r[0-9]+}}, %r3
46 ; CHECK-SHIFT2: br %r14
47 %res = atomicrmw min i8 *%src, i8 %b seq_cst
51 ; Check signed maximum.
52 define i8 @f2(i8 *%src, i8 %b) {
54 ; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
55 ; CHECK: nill %r2, 65532
56 ; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
57 ; CHECK: [[LOOP:\.[^:]*]]:
58 ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
59 ; CHECK: cr [[ROT]], %r3
60 ; CHECK: jhe [[KEEP:\..*]]
61 ; CHECK: risbg [[ROT]], %r3, 32, 39, 0
63 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
64 ; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
66 ; CHECK: rll %r2, [[OLD]], 8([[SHIFT]])
70 ; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
71 ; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
73 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
75 ; CHECK-SHIFT1: br %r14
78 ; CHECK-SHIFT2: sll %r3, 24
80 ; CHECK-SHIFT2: cr {{%r[0-9]+}}, %r3
83 ; CHECK-SHIFT2: br %r14
84 %res = atomicrmw max i8 *%src, i8 %b seq_cst
88 ; Check unsigned minimum.
89 define i8 @f3(i8 *%src, i8 %b) {
91 ; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
92 ; CHECK: nill %r2, 65532
93 ; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
94 ; CHECK: [[LOOP:\.[^:]*]]:
95 ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
96 ; CHECK: clr [[ROT]], %r3
97 ; CHECK: jle [[KEEP:\..*]]
98 ; CHECK: risbg [[ROT]], %r3, 32, 39, 0
100 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
101 ; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
102 ; CHECK: jlh [[LOOP]]
103 ; CHECK: rll %r2, [[OLD]], 8([[SHIFT]])
107 ; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
108 ; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
110 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
112 ; CHECK-SHIFT1: br %r14
115 ; CHECK-SHIFT2: sll %r3, 24
117 ; CHECK-SHIFT2: clr {{%r[0-9]+}}, %r3
120 ; CHECK-SHIFT2: br %r14
121 %res = atomicrmw umin i8 *%src, i8 %b seq_cst
125 ; Check unsigned maximum.
126 define i8 @f4(i8 *%src, i8 %b) {
128 ; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
129 ; CHECK: nill %r2, 65532
130 ; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
131 ; CHECK: [[LOOP:\.[^:]*]]:
132 ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
133 ; CHECK: clr [[ROT]], %r3
134 ; CHECK: jhe [[KEEP:\..*]]
135 ; CHECK: risbg [[ROT]], %r3, 32, 39, 0
137 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
138 ; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
139 ; CHECK: jlh [[LOOP]]
140 ; CHECK: rll %r2, [[OLD]], 8([[SHIFT]])
144 ; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
145 ; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
147 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
149 ; CHECK-SHIFT1: br %r14
152 ; CHECK-SHIFT2: sll %r3, 24
154 ; CHECK-SHIFT2: clr {{%r[0-9]+}}, %r3
157 ; CHECK-SHIFT2: br %r14
158 %res = atomicrmw umax i8 *%src, i8 %b seq_cst
162 ; Check the lowest useful signed minimum value. We need to load 0x81000000
163 ; into the source register.
164 define i8 @f5(i8 *%src) {
166 ; CHECK: llilh [[SRC2:%r[0-9]+]], 33024
167 ; CHECK: cr [[ROT:%r[0-9]+]], [[SRC2]]
168 ; CHECK: risbg [[ROT]], [[SRC2]], 32, 39, 0
172 ; CHECK-SHIFT1: br %r14
174 ; CHECK-SHIFT2: br %r14
175 %res = atomicrmw min i8 *%src, i8 -127 seq_cst
179 ; Check the highest useful signed maximum value. We need to load 0x7e000000
180 ; into the source register.
181 define i8 @f6(i8 *%src) {
183 ; CHECK: llilh [[SRC2:%r[0-9]+]], 32256
184 ; CHECK: cr [[ROT:%r[0-9]+]], [[SRC2]]
185 ; CHECK: risbg [[ROT]], [[SRC2]], 32, 39, 0
189 ; CHECK-SHIFT1: br %r14
191 ; CHECK-SHIFT2: br %r14
192 %res = atomicrmw max i8 *%src, i8 126 seq_cst
196 ; Check the lowest useful unsigned minimum value. We need to load 0x01000000
197 ; into the source register.
198 define i8 @f7(i8 *%src) {
200 ; CHECK: llilh [[SRC2:%r[0-9]+]], 256
201 ; CHECK: clr [[ROT:%r[0-9]+]], [[SRC2]]
202 ; CHECK: risbg [[ROT]], [[SRC2]], 32, 39, 0
206 ; CHECK-SHIFT1: br %r14
208 ; CHECK-SHIFT2: br %r14
209 %res = atomicrmw umin i8 *%src, i8 1 seq_cst
213 ; Check the highest useful unsigned maximum value. We need to load 0xfe000000
214 ; into the source register.
215 define i8 @f8(i8 *%src) {
217 ; CHECK: llilh [[SRC2:%r[0-9]+]], 65024
218 ; CHECK: clr [[ROT:%r[0-9]+]], [[SRC2]]
219 ; CHECK: risbg [[ROT]], [[SRC2]], 32, 39, 0
223 ; CHECK-SHIFT1: br %r14
225 ; CHECK-SHIFT2: br %r14
226 %res = atomicrmw umax i8 *%src, i8 254 seq_cst