1 ; RUN: llc < %s -march=sparc -mattr=hard-quad-float | FileCheck %s
3 ; CHECK-LABEL: f128_ops
8 ; CHECK: faddq [[R0:.+]], [[R1:.+]], [[R2:.+]]
9 ; CHECK: fsubq [[R2]], [[R3:.+]], [[R4:.+]]
10 ; CHECK: fmulq [[R4]], [[R5:.+]], [[R6:.+]]
11 ; CHECK: fdivq [[R6]], [[R2]]
15 define void @f128_ops(fp128* noalias sret %scalar.result, fp128* byval %a, fp128* byval %b, fp128* byval %c, fp128* byval %d) {
17 %0 = load fp128* %a, align 8
18 %1 = load fp128* %b, align 8
19 %2 = load fp128* %c, align 8
20 %3 = load fp128* %d, align 8
21 %4 = fadd fp128 %0, %1
22 %5 = fsub fp128 %4, %2
23 %6 = fmul fp128 %5, %3
24 %7 = fdiv fp128 %6, %4
25 store fp128 %7, fp128* %scalar.result, align 8
29 ; CHECK-LABEL: f128_spill
30 ; CHECK: std %f{{.+}}, [%[[S0:.+]]]
31 ; CHECK: std %f{{.+}}, [%[[S1:.+]]]
32 ; CHECK-DAG: ldd [%[[S0]]], %f{{.+}}
33 ; CHECK-DAG: ldd [%[[S1]]], %f{{.+}}
36 define void @f128_spill(fp128* noalias sret %scalar.result, fp128* byval %a) {
38 %0 = load fp128* %a, align 8
39 call void asm sideeffect "", "~{f0},~{f1},~{f2},~{f3},~{f4},~{f5},~{f6},~{f7},~{f8},~{f9},~{f10},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31}"()
40 store fp128 %0, fp128* %scalar.result, align 8