1 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600-CHECK %s
2 ; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck --check-prefix=R600-CHECK %s
3 ; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck --check-prefix=SI-CHECK %s
5 ; Load an i8 value from the global address space.
7 ; R600-CHECK: VTX_READ_8 T{{[0-9]+\.X, T[0-9]+\.X}}
10 ; SI-CHECK: BUFFER_LOAD_UBYTE VGPR{{[0-9]+}},
11 define void @load_i8(i32 addrspace(1)* %out, i8 addrspace(1)* %in) {
12 %1 = load i8 addrspace(1)* %in
13 %2 = zext i8 %1 to i32
14 store i32 %2, i32 addrspace(1)* %out
18 ; load an i32 value from the global address space.
19 ; R600-CHECK: @load_i32
20 ; R600-CHECK: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0
23 ; SI-CHECK: BUFFER_LOAD_DWORD VGPR{{[0-9]+}}
24 define void @load_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
26 %0 = load i32 addrspace(1)* %in
27 store i32 %0, i32 addrspace(1)* %out
31 ; load a f32 value from the global address space.
32 ; R600-CHECK: @load_f32
33 ; R600-CHECK: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0
36 ; SI-CHECK: BUFFER_LOAD_DWORD VGPR{{[0-9]+}}
37 define void @load_f32(float addrspace(1)* %out, float addrspace(1)* %in) {
39 %0 = load float addrspace(1)* %in
40 store float %0, float addrspace(1)* %out
44 ; Load an i32 value from the constant address space.
45 ; R600-CHECK: @load_const_addrspace_i32
46 ; R600-CHECK: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0
48 ; SI-CHECK: @load_const_addrspace_i32
49 ; SI-CHECK: S_LOAD_DWORD SGPR{{[0-9]+}}
50 define void @load_const_addrspace_i32(i32 addrspace(1)* %out, i32 addrspace(2)* %in) {
52 %0 = load i32 addrspace(2)* %in
53 store i32 %0, i32 addrspace(1)* %out
57 ; Load a f32 value from the constant address space.
58 ; R600-CHECK: @load_const_addrspace_f32
59 ; R600-CHECK: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0
61 ; SI-CHECK: @load_const_addrspace_f32
62 ; SI-CHECK: S_LOAD_DWORD SGPR{{[0-9]+}}
63 define void @load_const_addrspace_f32(float addrspace(1)* %out, float addrspace(2)* %in) {
64 %1 = load float addrspace(2)* %in
65 store float %1, float addrspace(1)* %out
69 ; R600-CHECK: @load_i64
74 ; SI-CHECK: BUFFER_LOAD_DWORDX2
75 define void @load_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %in) {
77 %0 = load i64 addrspace(1)* %in
78 store i64 %0, i64 addrspace(1)* %out
82 ; R600-CHECK: @load_i64_sext
85 ; R600-CHECK: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, T{{[0-9]\.[XYZW]}}, literal.x
87 ; SI-CHECK: @load_i64_sext
88 ; SI-CHECK: BUFFER_LOAD_DWORDX2 [[VAL:VGPR[0-9]_VGPR[0-9]]]
89 ; SI-CHECK: V_LSHL_B64 [[LSHL:VGPR[0-9]_VGPR[0-9]]], [[VAL]], 32
90 ; SI-CHECK: V_ASHR_I64 VGPR{{[0-9]}}_VGPR{{[0-9]}}, [[LSHL]], 32
92 define void @load_i64_sext(i64 addrspace(1)* %out, i32 addrspace(1)* %in) {
94 %0 = load i32 addrspace(1)* %in
95 %1 = sext i32 %0 to i64
96 store i64 %1, i64 addrspace(1)* %out
100 ; R600-CHECK: @load_i64_zext
103 define void @load_i64_zext(i64 addrspace(1)* %out, i32 addrspace(1)* %in) {
105 %0 = load i32 addrspace(1)* %in
106 %1 = zext i32 %0 to i64
107 store i64 %1, i64 addrspace(1)* %out