1 ; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=SI-SAFE -check-prefix=FUNC %s
2 ; RUN: llc -enable-no-nans-fp-math -enable-unsafe-fp-math -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI-NONAN -check-prefix=SI -check-prefix=FUNC %s
3 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
5 ; FIXME: Should replace unsafe-fp-math with no signed zeros.
7 declare i32 @llvm.r600.read.tidig.x() #1
9 ; FUNC-LABEL: @test_fmax_legacy_uge_f32
10 ; SI: buffer_load_dword [[A:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}}
11 ; SI: buffer_load_dword [[B:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:4
12 ; SI-SAFE: v_max_legacy_f32_e32 {{v[0-9]+}}, [[B]], [[A]]
13 ; SI-NONAN: v_max_f32_e32 {{v[0-9]+}}, [[B]], [[A]]
16 define void @test_fmax_legacy_uge_f32(float addrspace(1)* %out, float addrspace(1)* %in) #0 {
17 %tid = call i32 @llvm.r600.read.tidig.x() #1
18 %gep.0 = getelementptr float addrspace(1)* %in, i32 %tid
19 %gep.1 = getelementptr float addrspace(1)* %gep.0, i32 1
21 %a = load float addrspace(1)* %gep.0, align 4
22 %b = load float addrspace(1)* %gep.1, align 4
24 %cmp = fcmp uge float %a, %b
25 %val = select i1 %cmp, float %a, float %b
26 store float %val, float addrspace(1)* %out, align 4
30 ; FUNC-LABEL: @test_fmax_legacy_oge_f32
31 ; SI: buffer_load_dword [[A:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}}
32 ; SI: buffer_load_dword [[B:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:4
33 ; SI-SAFE: v_max_legacy_f32_e32 {{v[0-9]+}}, [[A]], [[B]]
34 ; SI-NONAN: v_max_f32_e32 {{v[0-9]+}}, [[B]], [[A]]
36 define void @test_fmax_legacy_oge_f32(float addrspace(1)* %out, float addrspace(1)* %in) #0 {
37 %tid = call i32 @llvm.r600.read.tidig.x() #1
38 %gep.0 = getelementptr float addrspace(1)* %in, i32 %tid
39 %gep.1 = getelementptr float addrspace(1)* %gep.0, i32 1
41 %a = load float addrspace(1)* %gep.0, align 4
42 %b = load float addrspace(1)* %gep.1, align 4
44 %cmp = fcmp oge float %a, %b
45 %val = select i1 %cmp, float %a, float %b
46 store float %val, float addrspace(1)* %out, align 4
50 ; FUNC-LABEL: @test_fmax_legacy_ugt_f32
51 ; SI: buffer_load_dword [[A:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}}
52 ; SI: buffer_load_dword [[B:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:4
53 ; SI-SAFE: v_max_legacy_f32_e32 {{v[0-9]+}}, [[B]], [[A]]
54 ; SI-NONAN: v_max_f32_e32 {{v[0-9]+}}, [[B]], [[A]]
56 define void @test_fmax_legacy_ugt_f32(float addrspace(1)* %out, float addrspace(1)* %in) #0 {
57 %tid = call i32 @llvm.r600.read.tidig.x() #1
58 %gep.0 = getelementptr float addrspace(1)* %in, i32 %tid
59 %gep.1 = getelementptr float addrspace(1)* %gep.0, i32 1
61 %a = load float addrspace(1)* %gep.0, align 4
62 %b = load float addrspace(1)* %gep.1, align 4
64 %cmp = fcmp ugt float %a, %b
65 %val = select i1 %cmp, float %a, float %b
66 store float %val, float addrspace(1)* %out, align 4
70 ; FUNC-LABEL: @test_fmax_legacy_ogt_f32
71 ; SI: buffer_load_dword [[A:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}}
72 ; SI: buffer_load_dword [[B:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:4
73 ; SI-SAFE: v_max_legacy_f32_e32 {{v[0-9]+}}, [[A]], [[B]]
74 ; SI-NONAN: v_max_f32_e32 {{v[0-9]+}}, [[B]], [[A]]
76 define void @test_fmax_legacy_ogt_f32(float addrspace(1)* %out, float addrspace(1)* %in) #0 {
77 %tid = call i32 @llvm.r600.read.tidig.x() #1
78 %gep.0 = getelementptr float addrspace(1)* %in, i32 %tid
79 %gep.1 = getelementptr float addrspace(1)* %gep.0, i32 1
81 %a = load float addrspace(1)* %gep.0, align 4
82 %b = load float addrspace(1)* %gep.1, align 4
84 %cmp = fcmp ogt float %a, %b
85 %val = select i1 %cmp, float %a, float %b
86 store float %val, float addrspace(1)* %out, align 4
91 ; FUNC-LABEL: @test_fmax_legacy_ogt_f32_multi_use
92 ; SI: buffer_load_dword [[A:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}}
93 ; SI: buffer_load_dword [[B:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:4
96 ; SI-NEXT: v_cndmask_b32
100 define void @test_fmax_legacy_ogt_f32_multi_use(float addrspace(1)* %out0, i1 addrspace(1)* %out1, float addrspace(1)* %in) #0 {
101 %tid = call i32 @llvm.r600.read.tidig.x() #1
102 %gep.0 = getelementptr float addrspace(1)* %in, i32 %tid
103 %gep.1 = getelementptr float addrspace(1)* %gep.0, i32 1
105 %a = load float addrspace(1)* %gep.0, align 4
106 %b = load float addrspace(1)* %gep.1, align 4
108 %cmp = fcmp ogt float %a, %b
109 %val = select i1 %cmp, float %a, float %b
110 store float %val, float addrspace(1)* %out0, align 4
111 store i1 %cmp, i1addrspace(1)* %out1
115 attributes #0 = { nounwind }
116 attributes #1 = { nounwind readnone }