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c319db0892b4edb3d763b7486905db59074422c4
[oota-llvm.git]
/
test
/
CodeGen
/
MIR
/
X86
/
machine-instructions.mir
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# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
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# This test ensures that the MIR parser parses X86 machine instructions
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# correctly.
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--- |
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define i32 @inc(i32 %a) {
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entry:
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%b = mul i32 %a, 11
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ret i32 %b
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}
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...
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---
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# CHECK: name: inc
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name: inc
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body:
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- id: 0
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name: entry
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instructions:
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# CHECK: MOV32rr
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# CHECK-NEXT: RETQ
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- '%eax = MOV32rr %eax'
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- ' RETQ %eax'
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...