2 ; RUN: llc -march=hexagon -mcpu=hexagonv5 < %s | FileCheck %s
3 ; Generate various cmpb instruction followed by if (p0) .. if (!p0)...
4 target triple = "hexagon"
6 @Enum_global = external global i8
8 define i32 @Func_3(i32) nounwind readnone {
11 %conv = and i32 %0, 255
12 %cmp = icmp eq i32 %conv, 2
13 %selv = zext i1 %cmp to i32
17 define i32 @Func_3b(i32) nounwind readonly {
20 %1 = load i8, i8* @Enum_global, align 1
21 %2 = trunc i32 %0 to i8
22 %cmp = icmp ne i8 %1, %2
23 %selv = zext i1 %cmp to i32
27 define i32 @Func_3c(i32) nounwind readnone {
30 %conv = and i32 %0, 255
31 %cmp = icmp eq i32 %conv, 2
32 %selv = zext i1 %cmp to i32
36 define i32 @Func_3d(i32) nounwind readonly {
39 %1 = load i8, i8* @Enum_global, align 1
40 %2 = trunc i32 %0 to i8
41 %cmp = icmp eq i8 %1, %2
42 %selv = zext i1 %cmp to i32
46 define i32 @Func_3e(i32) nounwind readonly {
49 %1 = load i8, i8* @Enum_global, align 1
50 %2 = trunc i32 %0 to i8
51 %cmp = icmp eq i8 %1, %2
52 %selv = zext i1 %cmp to i32
56 define i32 @Func_3f(i32) nounwind readnone {
59 %conv = and i32 %0, 255
60 %cmp = icmp ugt i32 %conv, 2
61 %selv = zext i1 %cmp to i32
65 define i32 @Func_3g(i32) nounwind readnone {
68 %conv = and i32 %0, 255
69 %cmp = icmp ult i32 %conv, 3
70 %selv = zext i1 %cmp to i32
74 define i32 @Func_3h(i32) nounwind readnone {
77 %conv = and i32 %0, 254
78 %cmp = icmp ult i32 %conv, 2
79 %selv = zext i1 %cmp to i32
83 define i32 @Func_3i(i32) nounwind readnone {
86 %conv = and i32 %0, 254
87 %cmp = icmp ugt i32 %conv, 1
88 %selv = zext i1 %cmp to i32