1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
3 %struct.__builtin_neon_v8qi2 = type { <8 x i8>, <8 x i8> }
4 %struct.__builtin_neon_v4hi2 = type { <4 x i16>, <4 x i16> }
5 %struct.__builtin_neon_v2si2 = type { <2 x i32>, <2 x i32> }
6 %struct.__builtin_neon_v2sf2 = type { <2 x float>, <2 x float> }
8 %struct.__builtin_neon_v16qi2 = type { <16 x i8>, <16 x i8> }
9 %struct.__builtin_neon_v8hi2 = type { <8 x i16>, <8 x i16> }
10 %struct.__builtin_neon_v4si2 = type { <4 x i32>, <4 x i32> }
11 %struct.__builtin_neon_v4sf2 = type { <4 x float>, <4 x float> }
13 define <8 x i8> @vtrni8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
16 %tmp1 = load <8 x i8>* %A
17 %tmp2 = load <8 x i8>* %B
18 %tmp3 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
19 %tmp4 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
20 %tmp5 = add <8 x i8> %tmp3, %tmp4
24 define <4 x i16> @vtrni16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
27 %tmp1 = load <4 x i16>* %A
28 %tmp2 = load <4 x i16>* %B
29 %tmp3 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
30 %tmp4 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
31 %tmp5 = add <4 x i16> %tmp3, %tmp4
35 define <2 x i32> @vtrni32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
38 %tmp1 = load <2 x i32>* %A
39 %tmp2 = load <2 x i32>* %B
40 %tmp3 = shufflevector <2 x i32> %tmp1, <2 x i32> %tmp2, <2 x i32> <i32 0, i32 2>
41 %tmp4 = shufflevector <2 x i32> %tmp1, <2 x i32> %tmp2, <2 x i32> <i32 1, i32 3>
42 %tmp5 = add <2 x i32> %tmp3, %tmp4
46 define <2 x float> @vtrnf(<2 x float>* %A, <2 x float>* %B) nounwind {
49 %tmp1 = load <2 x float>* %A
50 %tmp2 = load <2 x float>* %B
51 %tmp3 = shufflevector <2 x float> %tmp1, <2 x float> %tmp2, <2 x i32> <i32 0, i32 2>
52 %tmp4 = shufflevector <2 x float> %tmp1, <2 x float> %tmp2, <2 x i32> <i32 1, i32 3>
53 %tmp5 = add <2 x float> %tmp3, %tmp4
57 define <16 x i8> @vtrnQi8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
60 %tmp1 = load <16 x i8>* %A
61 %tmp2 = load <16 x i8>* %B
62 %tmp3 = shufflevector <16 x i8> %tmp1, <16 x i8> %tmp2, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
63 %tmp4 = shufflevector <16 x i8> %tmp1, <16 x i8> %tmp2, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
64 %tmp5 = add <16 x i8> %tmp3, %tmp4
68 define <8 x i16> @vtrnQi16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
71 %tmp1 = load <8 x i16>* %A
72 %tmp2 = load <8 x i16>* %B
73 %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
74 %tmp4 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
75 %tmp5 = add <8 x i16> %tmp3, %tmp4
79 define <4 x i32> @vtrnQi32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
82 %tmp1 = load <4 x i32>* %A
83 %tmp2 = load <4 x i32>* %B
84 %tmp3 = shufflevector <4 x i32> %tmp1, <4 x i32> %tmp2, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
85 %tmp4 = shufflevector <4 x i32> %tmp1, <4 x i32> %tmp2, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
86 %tmp5 = add <4 x i32> %tmp3, %tmp4
90 define <4 x float> @vtrnQf(<4 x float>* %A, <4 x float>* %B) nounwind {
93 %tmp1 = load <4 x float>* %A
94 %tmp2 = load <4 x float>* %B
95 %tmp3 = shufflevector <4 x float> %tmp1, <4 x float> %tmp2, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
96 %tmp4 = shufflevector <4 x float> %tmp1, <4 x float> %tmp2, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
97 %tmp5 = add <4 x float> %tmp3, %tmp4