1 ; This tests that MC/asm header conversion is smooth and that the
2 ; build attributes are correct
4 ; RUN: llc < %s -mtriple=thumbv5-linux-gnueabi -mcpu=xscale | FileCheck %s --check-prefix=XSCALE
5 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi | FileCheck %s --check-prefix=V6
6 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -enable-unsafe-fp-math | FileCheck %s --check-prefix=V6-FAST
7 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
8 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi | FileCheck %s --check-prefix=V6M
9 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -enable-unsafe-fp-math | FileCheck %s --check-prefix=V6M-FAST
10 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s | FileCheck %s --check-prefix=ARM1156T2F-S
11 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -enable-unsafe-fp-math | FileCheck %s --check-prefix=ARM1156T2F-S-FAST
12 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
13 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi | FileCheck %s --check-prefix=V7M
14 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -enable-unsafe-fp-math | FileCheck %s --check-prefix=V7M-FAST
15 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
16 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=V7
17 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
18 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -enable-unsafe-fp-math | FileCheck %s --check-prefix=V7-FAST
19 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8
20 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -enable-unsafe-fp-math | FileCheck %s --check-prefix=V8-FAST
21 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
22 ; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi | FileCheck %s --check-prefix=Vt8
23 ; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
24 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-neon,-crypto | FileCheck %s --check-prefix=V8-FPARMv8
25 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-fp-armv8,-crypto | FileCheck %s --check-prefix=V8-NEON
26 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-crypto | FileCheck %s --check-prefix=V8-FPARMv8-NEON
27 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8-FPARMv8-NEON-CRYPTO
28 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT
29 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -enable-unsafe-fp-math | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT-FAST
30 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
31 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-neon,+d16 | FileCheck %s --check-prefix=CORTEX-A5-NONEON
32 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A5-NOFPU
33 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2 -enable-unsafe-fp-math | FileCheck %s --check-prefix=CORTEX-A5-NOFPU-FAST
34 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT
35 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft -enable-unsafe-fp-math | FileCheck %s --check-prefix=CORTEX-A9-SOFT-FAST
36 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A9-HARD
37 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard -enable-unsafe-fp-math | FileCheck %s --check-prefix=CORTEX-A9-HARD-FAST
38 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
39 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT
40 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT
41 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -enable-unsafe-fp-math | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT-FAST
42 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A12-NOFPU
43 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2 -enable-unsafe-fp-math | FileCheck %s --check-prefix=CORTEX-A12-NOFPU-FAST
44 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
45 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CORTEX-A15
46 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-unsafe-fp-math | FileCheck %s --check-prefix=CORTEX-A15-FAST
47 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
48 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 | FileCheck %s --check-prefix=CORTEX-A17-DEFAULT
49 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -enable-unsafe-fp-math | FileCheck %s --check-prefix=CORTEX-A17-FAST
50 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A17-NOFPU
51 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2 -enable-unsafe-fp-math | FileCheck %s --check-prefix=CORTEX-A17-NOFPU-FAST
52 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
53 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 | FileCheck %s --check-prefix=CORTEX-M0
54 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -enable-unsafe-fp-math | FileCheck %s --check-prefix=CORTEX-M0-FAST
55 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
56 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=CORTEX-M3
57 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-unsafe-fp-math | FileCheck %s --check-prefix=CORTEX-M3-FAST
58 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
59 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-M4-SOFT
60 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft -enable-unsafe-fp-math | FileCheck %s --check-prefix=CORTEX-M4-SOFT-FAST
61 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-M4-HARD
62 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard -enable-unsafe-fp-math | FileCheck %s --check-prefix=CORTEX-M4-HARD-FAST
63 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
64 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SOFT
65 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2 -enable-unsafe-fp-math | FileCheck %s --check-prefix=CORTEX-M7-NOFPU-FAST
66 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SINGLE
67 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp -enable-unsafe-fp-math | FileCheck %s --check-prefix=CORTEX-M7-FAST
68 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 | FileCheck %s --check-prefix=CORTEX-M7-DOUBLE
69 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
70 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=CORTEX-R5
71 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-unsafe-fp-math | FileCheck %s --check-prefix=CORTEX-R5-FAST
72 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
73 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 | FileCheck %s --check-prefix=CORTEX-A53
74 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-unsafe-fp-math | FileCheck %s --check-prefix=CORTEX-A53-FAST
75 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
76 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=CORTEX-A57
77 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 -enable-unsafe-fp-math | FileCheck %s --check-prefix=CORTEX-A57-FAST
78 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
79 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=CORTEX-A7-CHECK
80 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -enable-unsafe-fp-math | FileCheck %s --check-prefix=CORTEX-A7-CHECK-FAST
81 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon | FileCheck %s --check-prefix=CORTEX-A7-NOFPU
82 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon -enable-unsafe-fp-math | FileCheck %s --check-prefix=CORTEX-A7-NOFPU-FAST
83 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4
84 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
85 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon -enable-unsafe-fp-math | FileCheck %s --check-prefix=CORTEX-A7-FPUV4-FAST
86 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,,+d16,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4
87 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -relocation-model=pic | FileCheck %s --check-prefix=RELOC-PIC
88 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -relocation-model=static | FileCheck %s --check-prefix=RELOC-OTHER
89 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -relocation-model=default | FileCheck %s --check-prefix=RELOC-OTHER
90 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -relocation-model=dynamic-no-pic | FileCheck %s --check-prefix=RELOC-OTHER
91 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi | FileCheck %s --check-prefix=RELOC-OTHER
92 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi | FileCheck %s --check-prefix=PCS-R9-USE
93 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -arm-reserve-r9 | FileCheck %s --check-prefix=PCS-R9-RESERVE
96 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 -arm-no-strict-align | FileCheck %s --check-prefix=NO-STRICT-ALIGN
97 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
98 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
100 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -arm-no-strict-align | FileCheck %s --check-prefix=NO-STRICT-ALIGN
101 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
102 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
104 ; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 -arm-no-strict-align | FileCheck %s --check-prefix=NO-STRICT-ALIGN
105 ; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
106 ; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
108 ; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 -arm-no-strict-align | FileCheck %s --check-prefix=NO-STRICT-ALIGN
109 ; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
110 ; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
112 ; RUN: llc < %s -mtriple=armv6-none-netbsd-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
113 ; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=STRICT-ALIGN
114 ; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s -arm-no-strict-align | FileCheck %s --check-prefix=NO-STRICT-ALIGN
115 ; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
117 ; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -arm-no-strict-align -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN
118 ; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -arm-strict-align -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN
119 ; RUN: llc < %s -mtriple=thumbv6m-none-linux-gnueabi -arm-no-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
120 ; RUN: llc < %s -mtriple=thumbv6m-none-linux-gnueabi -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
121 ; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN
122 ; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN
124 ; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e -arm-no-strict-align | FileCheck %s --check-prefix=NO-STRICT-ALIGN
125 ; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
126 ; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e | FileCheck %s --check-prefix=STRICT-ALIGN
128 ; XSCALE: .eabi_attribute 6, 5
129 ; XSCALE: .eabi_attribute 8, 1
130 ; XSCALE: .eabi_attribute 9, 1
132 ; DYN-ROUNDING: .eabi_attribute 19, 1
134 ; V6: .eabi_attribute 6, 6
135 ; V6: .eabi_attribute 8, 1
136 ;; We assume round-to-nearest by default (matches GCC)
137 ; V6-NOT: .eabi_attribute 19
138 ;; The default choice made by llc is for a V6 CPU without an FPU.
139 ;; This is not an interesting detail, but for such CPUs, the default intention is to use
140 ;; software floating-point support. The choice is not important for targets without
142 ; V6: .eabi_attribute 20, 1
143 ; V6: .eabi_attribute 24, 1
144 ; V6: .eabi_attribute 25, 1
145 ; V6-NOT: .eabi_attribute 27
146 ; V6-NOT: .eabi_attribute 28
147 ; V6-NOT: .eabi_attribute 36
148 ; V6-NOT: .eabi_attribute 42
149 ; V6-NOT: .eabi_attribute 68
151 ; V6-FAST-NOT: .eabi_attribute 19
152 ;; Despite the V6 CPU having no FPU by default, we chose to flush to
153 ;; positive zero here. There's no hardware support doing this, but the
154 ;; fast maths software library might.
155 ; V6-FAST-NOT: .eabi_attribute 20
157 ; V6M: .eabi_attribute 6, 12
158 ; V6M-NOT: .eabi_attribute 7
159 ; V6M: .eabi_attribute 8, 0
160 ; V6M: .eabi_attribute 9, 1
161 ; V6M-NOT: .eabi_attribute 19
162 ;; The default choice made by llc is for a V6M CPU without an FPU.
163 ;; This is not an interesting detail, but for such CPUs, the default intention is to use
164 ;; software floating-point support. The choice is not important for targets without
166 ; V6M: .eabi_attribute 20, 1
167 ; V6M: .eabi_attribute 24, 1
168 ; V6M: .eabi_attribute 25, 1
169 ; V6M-NOT: .eabi_attribute 27
170 ; V6M-NOT: .eabi_attribute 28
171 ; V6M-NOT: .eabi_attribute 36
172 ; V6M-NOT: .eabi_attribute 42
173 ; V6M-NOT: .eabi_attribute 68
175 ; V6M-FAST-NOT: .eabi_attribute 19
176 ;; Despite the V6M CPU having no FPU by default, we chose to flush to
177 ;; positive zero here. There's no hardware support doing this, but the
178 ;; fast maths software library might.
179 ; V6M-FAST-NOT: .eabi_attribute 20
181 ; ARM1156T2F-S: .cpu arm1156t2f-s
182 ; ARM1156T2F-S: .eabi_attribute 6, 8
183 ; ARM1156T2F-S: .eabi_attribute 8, 1
184 ; ARM1156T2F-S: .eabi_attribute 9, 2
185 ; ARM1156T2F-S: .fpu vfpv2
186 ; ARM1156T2F-S-NOT: .eabi_attribute 19
187 ;; We default to IEEE 754 compliance
188 ; ARM1156T2F-S: .eabi_attribute 20, 1
189 ; ARM1156T2F-S: .eabi_attribute 21, 1
190 ; ARM1156T2F-S: .eabi_attribute 23, 3
191 ; ARM1156T2F-S: .eabi_attribute 24, 1
192 ; ARM1156T2F-S: .eabi_attribute 25, 1
193 ; ARM1156T2F-S-NOT: .eabi_attribute 27
194 ; ARM1156T2F-S-NOT: .eabi_attribute 28
195 ; ARM1156T2F-S-NOT: .eabi_attribute 36
196 ; ARM1156T2F-S-NOT: .eabi_attribute 42
197 ; ARM1156T2F-S-NOT: .eabi_attribute 68
199 ;; V6 cores default to flush to positive zero (value 0). Note that value 2 is also equally
200 ;; valid for this core, it's an implementation defined question as to which of 0 and 2 you
201 ;; select. LLVM historically picks 0.
202 ; ARM1156T2F-S-FAST-NOT: .eabi_attribute 20
204 ; V7M: .eabi_attribute 6, 10
205 ; V7M: .eabi_attribute 7, 77
206 ; V7M: .eabi_attribute 8, 0
207 ; V7M: .eabi_attribute 9, 2
208 ; V7M-NOT: .eabi_attribute 19
209 ;; The default choice made by llc is for a V7M CPU without an FPU.
210 ;; This is not an interesting detail, but for such CPUs, the default intention is to use
211 ;; software floating-point support. The choice is not important for targets without
213 ; V7M: .eabi_attribute 20, 1
214 ; V7M: .eabi_attribute 24, 1
215 ; V7M: .eabi_attribute 25, 1
216 ; V7M-NOT: .eabi_attribute 27
217 ; V7M-NOT: .eabi_attribute 28
218 ; V7M-NOT: .eabi_attribute 36
219 ; V7M-NOT: .eabi_attribute 42
220 ; V7M-NOT: .eabi_attribute 44
221 ; V7M-NOT: .eabi_attribute 68
223 ;; Despite the V7M CPU having no FPU by default, we chose to flush
224 ;; preserving sign. This matches what the hardware would do in the
225 ;; architecture revision were to exist on the current target.
226 ; V7M-FAST: .eabi_attribute 20, 2
228 ; V7: .syntax unified
229 ; V7: .eabi_attribute 6, 10
230 ; V7-NOT: .eabi_attribute 19
231 ;; In safe-maths mode we default to an IEEE 754 compliant choice.
232 ; V7: .eabi_attribute 20, 1
233 ; V7: .eabi_attribute 21, 1
234 ; V7: .eabi_attribute 23, 3
235 ; V7: .eabi_attribute 24, 1
236 ; V7: .eabi_attribute 25, 1
237 ; V7-NOT: .eabi_attribute 27
238 ; V7-NOT: .eabi_attribute 28
239 ; V7-NOT: .eabi_attribute 36
240 ; V7-NOT: .eabi_attribute 42
241 ; V7-NOT: .eabi_attribute 68
243 ; V7-FAST-NOT: .eabi_attribute 19
244 ;; The default CPU does have an FPU and it must be VFPv3 or better, so it flushes
245 ;; denormals to zero preserving the sign.
246 ; V7-FAST: .eabi_attribute 20, 2
248 ; V8: .syntax unified
249 ; V8: .eabi_attribute 6, 14
250 ; V8-NOT: .eabi_attribute 19
251 ; V8: .eabi_attribute 20, 1
253 ; V8-FAST-NOT: .eabi_attribute 19
254 ;; The default does have an FPU, and for V8-A, it flushes preserving sign.
255 ; V8-FAST: .eabi_attribute 20, 2
257 ; Vt8: .syntax unified
258 ; Vt8: .eabi_attribute 6, 14
259 ; Vt8-NOT: .eabi_attribute 19
261 ; V8-FPARMv8: .syntax unified
262 ; V8-FPARMv8: .eabi_attribute 6, 14
263 ; V8-FPARMv8: .fpu fp-armv8
265 ; V8-NEON: .syntax unified
266 ; V8-NEON: .eabi_attribute 6, 14
268 ; V8-NEON: .eabi_attribute 12, 3
270 ; V8-FPARMv8-NEON: .syntax unified
271 ; V8-FPARMv8-NEON: .eabi_attribute 6, 14
272 ; V8-FPARMv8-NEON: .fpu neon-fp-armv8
273 ; V8-FPARMv8-NEON: .eabi_attribute 12, 3
275 ; V8-FPARMv8-NEON-CRYPTO: .syntax unified
276 ; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 6, 14
277 ; V8-FPARMv8-NEON-CRYPTO: .fpu crypto-neon-fp-armv8
278 ; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 12, 3
280 ; Tag_CPU_unaligned_access
281 ; NO-STRICT-ALIGN: .eabi_attribute 34, 1
282 ; STRICT-ALIGN: .eabi_attribute 34, 0
284 ; Tag_CPU_arch 'ARMv7'
285 ; CORTEX-A7-CHECK: .eabi_attribute 6, 10
286 ; CORTEX-A7-NOFPU: .eabi_attribute 6, 10
288 ; CORTEX-A7-FPUV4: .eabi_attribute 6, 10
290 ; Tag_CPU_arch_profile 'A'
291 ; CORTEX-A7-CHECK: .eabi_attribute 7, 65
292 ; CORTEX-A7-NOFPU: .eabi_attribute 7, 65
293 ; CORTEX-A7-FPUV4: .eabi_attribute 7, 65
296 ; CORTEX-A7-CHECK: .eabi_attribute 8, 1
297 ; CORTEX-A7-NOFPU: .eabi_attribute 8, 1
298 ; CORTEX-A7-FPUV4: .eabi_attribute 8, 1
301 ; CORTEX-A7-CHECK: .eabi_attribute 9, 2
302 ; CORTEX-A7-NOFPU: .eabi_attribute 9, 2
303 ; CORTEX-A7-FPUV4: .eabi_attribute 9, 2
305 ; CORTEX-A7-CHECK: .fpu neon-vfpv4
306 ; CORTEX-A7-NOFPU-NOT: .fpu
307 ; CORTEX-A7-FPUV4: .fpu vfpv4
309 ; CORTEX-A7-CHECK-NOT: .eabi_attribute 19
310 ; Tag_ABI_FP_denormal
311 ;; We default to IEEE 754 compliance
312 ; CORTEX-A7-CHECK: .eabi_attribute 20, 1
313 ;; The A7 has VFPv3 support by default, so flush preserving sign.
314 ; CORTEX-A7-CHECK-FAST: .eabi_attribute 20, 2
315 ; CORTEX-A7-NOFPU: .eabi_attribute 20, 1
316 ;; Despite there being no FPU, we chose to flush to zero preserving
317 ;; sign. This matches what the hardware would do for this architecture
319 ; CORTEX-A7-NOFPU-FAST: .eabi_attribute 20, 2
320 ; CORTEX-A7-FPUV4: .eabi_attribute 20, 1
321 ;; The VFPv4 FPU flushes preserving sign.
322 ; CORTEX-A7-FPUV4-FAST: .eabi_attribute 20, 2
324 ; Tag_ABI_FP_exceptions
325 ; CORTEX-A7-CHECK: .eabi_attribute 21, 1
326 ; CORTEX-A7-NOFPU: .eabi_attribute 21, 1
327 ; CORTEX-A7-FPUV4: .eabi_attribute 21, 1
329 ; Tag_ABI_FP_number_model
330 ; CORTEX-A7-CHECK: .eabi_attribute 23, 3
331 ; CORTEX-A7-NOFPU: .eabi_attribute 23, 3
332 ; CORTEX-A7-FPUV4: .eabi_attribute 23, 3
334 ; Tag_ABI_align_needed
335 ; CORTEX-A7-CHECK: .eabi_attribute 24, 1
336 ; CORTEX-A7-NOFPU: .eabi_attribute 24, 1
337 ; CORTEX-A7-FPUV4: .eabi_attribute 24, 1
339 ; Tag_ABI_align_preserved
340 ; CORTEX-A7-CHECK: .eabi_attribute 25, 1
341 ; CORTEX-A7-NOFPU: .eabi_attribute 25, 1
342 ; CORTEX-A7-FPUV4: .eabi_attribute 25, 1
344 ; Tag_FP_HP_extension
345 ; CORTEX-A7-CHECK: .eabi_attribute 36, 1
346 ; CORTEX-A7-NOFPU: .eabi_attribute 36, 1
347 ; CORTEX-A7-FPUV4: .eabi_attribute 36, 1
349 ; Tag_MPextension_use
350 ; CORTEX-A7-CHECK: .eabi_attribute 42, 1
351 ; CORTEX-A7-NOFPU: .eabi_attribute 42, 1
352 ; CORTEX-A7-FPUV4: .eabi_attribute 42, 1
355 ; CORTEX-A7-CHECK: .eabi_attribute 44, 2
356 ; CORTEX-A7-NOFPU: .eabi_attribute 44, 2
357 ; CORTEX-A7-FPUV4: .eabi_attribute 44, 2
359 ; Tag_Virtualization_use
360 ; CORTEX-A7-CHECK: .eabi_attribute 68, 3
361 ; CORTEX-A7-NOFPU: .eabi_attribute 68, 3
362 ; CORTEX-A7-FPUV4: .eabi_attribute 68, 3
364 ; CORTEX-A5-DEFAULT: .cpu cortex-a5
365 ; CORTEX-A5-DEFAULT: .eabi_attribute 6, 10
366 ; CORTEX-A5-DEFAULT: .eabi_attribute 7, 65
367 ; CORTEX-A5-DEFAULT: .eabi_attribute 8, 1
368 ; CORTEX-A5-DEFAULT: .eabi_attribute 9, 2
369 ; CORTEX-A5-DEFAULT: .fpu neon-vfpv4
370 ; CORTEX-A5-NOT: .eabi_attribute 19
371 ;; We default to IEEE 754 compliance
372 ; CORTEX-A5-DEFAULT: .eabi_attribute 20, 1
373 ; CORTEX-A5-DEFAULT: .eabi_attribute 21, 1
374 ; CORTEX-A5-DEFAULT: .eabi_attribute 23, 3
375 ; CORTEX-A5-DEFAULT: .eabi_attribute 24, 1
376 ; CORTEX-A5-DEFAULT: .eabi_attribute 25, 1
377 ; CORTEX-A5-DEFAULT: .eabi_attribute 42, 1
378 ; CORTEX-A5-DEFAULT: .eabi_attribute 68, 1
380 ; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 19
381 ;; The A5 defaults to a VFPv4 FPU, so it flushed preserving sign when -ffast-math
383 ; CORTEX-A5-DEFAULT-FAST: .eabi_attribute 20, 2
385 ; CORTEX-A5-NONEON: .cpu cortex-a5
386 ; CORTEX-A5-NONEON: .eabi_attribute 6, 10
387 ; CORTEX-A5-NONEON: .eabi_attribute 7, 65
388 ; CORTEX-A5-NONEON: .eabi_attribute 8, 1
389 ; CORTEX-A5-NONEON: .eabi_attribute 9, 2
390 ; CORTEX-A5-NONEON: .fpu vfpv4-d16
391 ;; We default to IEEE 754 compliance
392 ; CORTEX-A5-NONEON: .eabi_attribute 20, 1
393 ; CORTEX-A5-NONEON: .eabi_attribute 21, 1
394 ; CORTEX-A5-NONEON: .eabi_attribute 23, 3
395 ; CORTEX-A5-NONEON: .eabi_attribute 24, 1
396 ; CORTEX-A5-NONEON: .eabi_attribute 25, 1
397 ; CORTEX-A5-NONEON: .eabi_attribute 42, 1
398 ; CORTEX-A5-NONEON: .eabi_attribute 68, 1
400 ; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 19
401 ;; The A5 defaults to a VFPv4 FPU, so it flushed preserving sign when -ffast-math
403 ; CORTEX-A5-NONEON-FAST: .eabi_attribute 20, 2
405 ; CORTEX-A5-NOFPU: .cpu cortex-a5
406 ; CORTEX-A5-NOFPU: .eabi_attribute 6, 10
407 ; CORTEX-A5-NOFPU: .eabi_attribute 7, 65
408 ; CORTEX-A5-NOFPU: .eabi_attribute 8, 1
409 ; CORTEX-A5-NOFPU: .eabi_attribute 9, 2
410 ; CORTEX-A5-NOFPU-NOT: .fpu
411 ; CORTEX-A5-NOFPU-NOT: .eabi_attribute 19
412 ;; We default to IEEE 754 compliance
413 ; CORTEX-A5-NOFPU: .eabi_attribute 20, 1
414 ; CORTEX-A5-NOFPU: .eabi_attribute 21, 1
415 ; CORTEX-A5-NOFPU: .eabi_attribute 23, 3
416 ; CORTEX-A5-NOFPU: .eabi_attribute 24, 1
417 ; CORTEX-A5-NOFPU: .eabi_attribute 25, 1
418 ; CORTEX-A5-NOFPU: .eabi_attribute 42, 1
419 ; CORTEX-A5-NOFPU: .eabi_attribute 68, 1
421 ; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 19
422 ;; Despite there being no FPU, we chose to flush to zero preserving
423 ;; sign. This matches what the hardware would do for this architecture
425 ; CORTEX-A5-NOFPU-FAST: .eabi_attribute 20, 2
427 ; CORTEX-A9-SOFT: .cpu cortex-a9
428 ; CORTEX-A9-SOFT: .eabi_attribute 6, 10
429 ; CORTEX-A9-SOFT: .eabi_attribute 7, 65
430 ; CORTEX-A9-SOFT: .eabi_attribute 8, 1
431 ; CORTEX-A9-SOFT: .eabi_attribute 9, 2
432 ; CORTEX-A9-SOFT: .fpu neon
433 ; CORTEX-A9-SOFT-NOT: .eabi_attribute 19
434 ;; We default to IEEE 754 compliance
435 ; CORTEX-A9-SOFT: .eabi_attribute 20, 1
436 ; CORTEX-A9-SOFT: .eabi_attribute 21, 1
437 ; CORTEX-A9-SOFT: .eabi_attribute 23, 3
438 ; CORTEX-A9-SOFT: .eabi_attribute 24, 1
439 ; CORTEX-A9-SOFT: .eabi_attribute 25, 1
440 ; CORTEX-A9-SOFT-NOT: .eabi_attribute 27
441 ; CORTEX-A9-SOFT-NOT: .eabi_attribute 28
442 ; CORTEX-A9-SOFT: .eabi_attribute 36, 1
443 ; CORTEX-A9-SOFT: .eabi_attribute 42, 1
444 ; CORTEX-A9-SOFT: .eabi_attribute 68, 1
446 ; CORTEX-A9-SOFT-FAST-NOT: .eabi_attribute 19
447 ;; The A9 defaults to a VFPv3 FPU, so it flushes preseving sign when
448 ;; -ffast-math is specified.
449 ; CORTEX-A9-SOFT-FAST: .eabi_attribute 20, 2
451 ; CORTEX-A9-HARD: .cpu cortex-a9
452 ; CORTEX-A9-HARD: .eabi_attribute 6, 10
453 ; CORTEX-A9-HARD: .eabi_attribute 7, 65
454 ; CORTEX-A9-HARD: .eabi_attribute 8, 1
455 ; CORTEX-A9-HARD: .eabi_attribute 9, 2
456 ; CORTEX-A9-HARD: .fpu neon
457 ; CORTEX-A9-HARD-NOT: .eabi_attribute 19
458 ;; We default to IEEE 754 compliance
459 ; CORTEX-A9-HARD: .eabi_attribute 20, 1
460 ; CORTEX-A9-HARD: .eabi_attribute 21, 1
461 ; CORTEX-A9-HARD: .eabi_attribute 23, 3
462 ; CORTEX-A9-HARD: .eabi_attribute 24, 1
463 ; CORTEX-A9-HARD: .eabi_attribute 25, 1
464 ; CORTEX-A9-HARD-NOT: .eabi_attribute 27
465 ; CORTEX-A9-HARD: .eabi_attribute 28, 1
466 ; CORTEX-A9-HARD: .eabi_attribute 36, 1
467 ; CORTEX-A9-HARD: .eabi_attribute 42, 1
468 ; CORTEX-A9-HARD: .eabi_attribute 68, 1
470 ; CORTEX-A9-HARD-FAST-NOT: .eabi_attribute 19
471 ;; The A9 defaults to a VFPv3 FPU, so it flushes preseving sign when
472 ;; -ffast-math is specified.
473 ; CORTEX-A9-HARD-FAST: .eabi_attribute 20, 2
475 ; CORTEX-A12-DEFAULT: .cpu cortex-a12
476 ; CORTEX-A12-DEFAULT: .eabi_attribute 6, 10
477 ; CORTEX-A12-DEFAULT: .eabi_attribute 7, 65
478 ; CORTEX-A12-DEFAULT: .eabi_attribute 8, 1
479 ; CORTEX-A12-DEFAULT: .eabi_attribute 9, 2
480 ; CORTEX-A12-DEFAULT: .fpu neon-vfpv4
481 ; CORTEX-A12-DEFAULT-NOT: .eabi_attribute 19
482 ;; We default to IEEE 754 compliance
483 ; CORTEX-A12-DEFAULT: .eabi_attribute 20, 1
484 ; CORTEX-A12-DEFAULT: .eabi_attribute 21, 1
485 ; CORTEX-A12-DEFAULT: .eabi_attribute 23, 3
486 ; CORTEX-A12-DEFAULT: .eabi_attribute 24, 1
487 ; CORTEX-A12-DEFAULT: .eabi_attribute 25, 1
488 ; CORTEX-A12-DEFAULT: .eabi_attribute 42, 1
489 ; CORTEX-A12-DEFAULT: .eabi_attribute 44, 2
490 ; CORTEX-A12-DEFAULT: .eabi_attribute 68, 3
492 ; CORTEX-A12-DEFAULT-FAST-NOT: .eabi_attribute 19
493 ;; The A12 defaults to a VFPv3 FPU, so it flushes preseving sign when
494 ;; -ffast-math is specified.
495 ; CORTEX-A12-DEFAULT-FAST: .eabi_attribute 20, 2
497 ; CORTEX-A12-NOFPU: .cpu cortex-a12
498 ; CORTEX-A12-NOFPU: .eabi_attribute 6, 10
499 ; CORTEX-A12-NOFPU: .eabi_attribute 7, 65
500 ; CORTEX-A12-NOFPU: .eabi_attribute 8, 1
501 ; CORTEX-A12-NOFPU: .eabi_attribute 9, 2
502 ; CORTEX-A12-NOFPU-NOT: .fpu
503 ; CORTEX-A12-NOFPU-NOT: .eabi_attribute 19
504 ;; We default to IEEE 754 compliance
505 ; CORTEX-A12-NOFPU: .eabi_attribute 20, 1
506 ; CORTEX-A12-NOFPU: .eabi_attribute 21, 1
507 ; CORTEX-A12-NOFPU: .eabi_attribute 23, 3
508 ; CORTEX-A12-NOFPU: .eabi_attribute 24, 1
509 ; CORTEX-A12-NOFPU: .eabi_attribute 25, 1
510 ; CORTEX-A12-NOFPU: .eabi_attribute 42, 1
511 ; CORTEX-A12-NOFPU: .eabi_attribute 44, 2
512 ; CORTEX-A12-NOFPU: .eabi_attribute 68, 3
514 ; CORTEX-A12-NOFPU-FAST-NOT: .eabi_attribute 19
515 ;; Despite there being no FPU, we chose to flush to zero preserving
516 ;; sign. This matches what the hardware would do for this architecture
518 ; CORTEX-A12-NOFPU-FAST: .eabi_attribute 20, 2
520 ; CORTEX-A15: .cpu cortex-a15
521 ; CORTEX-A15: .eabi_attribute 6, 10
522 ; CORTEX-A15: .eabi_attribute 7, 65
523 ; CORTEX-A15: .eabi_attribute 8, 1
524 ; CORTEX-A15: .eabi_attribute 9, 2
525 ; CORTEX-A15: .fpu neon-vfpv4
526 ; CORTEX-A15-NOT: .eabi_attribute 19
527 ;; We default to IEEE 754 compliance
528 ; CORTEX-A15: .eabi_attribute 20, 1
529 ; CORTEX-A15: .eabi_attribute 21, 1
530 ; CORTEX-A15: .eabi_attribute 23, 3
531 ; CORTEX-A15: .eabi_attribute 24, 1
532 ; CORTEX-A15: .eabi_attribute 25, 1
533 ; CORTEX-A15-NOT: .eabi_attribute 27
534 ; CORTEX-A15-NOT: .eabi_attribute 28
535 ; CORTEX-A15: .eabi_attribute 36, 1
536 ; CORTEX-A15: .eabi_attribute 42, 1
537 ; CORTEX-A15: .eabi_attribute 44, 2
538 ; CORTEX-A15: .eabi_attribute 68, 3
540 ; CORTEX-A15-FAST-NOT: .eabi_attribute 19
541 ;; The A15 defaults to a VFPv3 FPU, so it flushes preseving sign when
542 ;; -ffast-math is specified.
543 ; CORTEX-A15-FAST: .eabi_attribute 20, 2
545 ; CORTEX-A17-DEFAULT: .cpu cortex-a17
546 ; CORTEX-A17-DEFAULT: .eabi_attribute 6, 10
547 ; CORTEX-A17-DEFAULT: .eabi_attribute 7, 65
548 ; CORTEX-A17-DEFAULT: .eabi_attribute 8, 1
549 ; CORTEX-A17-DEFAULT: .eabi_attribute 9, 2
550 ; CORTEX-A17-DEFAULT: .fpu neon-vfpv4
551 ; CORTEX-A17-DEFAULT-NOT: .eabi_attribute 19
552 ;; We default to IEEE 754 compliance
553 ; CORTEX-A17-DEFAULT: .eabi_attribute 20, 1
554 ; CORTEX-A17-DEFAULT: .eabi_attribute 21, 1
555 ; CORTEX-A17-DEFAULT: .eabi_attribute 23, 3
556 ; CORTEX-A17-DEFAULT: .eabi_attribute 24, 1
557 ; CORTEX-A17-DEFAULT: .eabi_attribute 25, 1
558 ; CORTEX-A17-DEFAULT: .eabi_attribute 42, 1
559 ; CORTEX-A17-DEFAULT: .eabi_attribute 44, 2
560 ; CORTEX-A17-DEFAULT: .eabi_attribute 68, 3
562 ; CORTEX-A17-FAST-NOT: .eabi_attribute 19
563 ;; The A17 defaults to a VFPv3 FPU, so it flushes preseving sign when
564 ;; -ffast-math is specified.
565 ; CORTEX-A17-FAST: .eabi_attribute 20, 2
567 ; CORTEX-A17-NOFPU: .cpu cortex-a17
568 ; CORTEX-A17-NOFPU: .eabi_attribute 6, 10
569 ; CORTEX-A17-NOFPU: .eabi_attribute 7, 65
570 ; CORTEX-A17-NOFPU: .eabi_attribute 8, 1
571 ; CORTEX-A17-NOFPU: .eabi_attribute 9, 2
572 ; CORTEX-A17-NOFPU-NOT: .fpu
573 ; CORTEX-A17-NOFPU-NOT: .eabi_attribute 19
574 ;; We default to IEEE 754 compliance
575 ; CORTEX-A17-NOFPU: .eabi_attribute 20, 1
576 ; CORTEX-A17-NOFPU: .eabi_attribute 21, 1
577 ; CORTEX-A17-NOFPU: .eabi_attribute 23, 3
578 ; CORTEX-A17-NOFPU: .eabi_attribute 24, 1
579 ; CORTEX-A17-NOFPU: .eabi_attribute 25, 1
580 ; CORTEX-A17-NOFPU: .eabi_attribute 42, 1
581 ; CORTEX-A17-NOFPU: .eabi_attribute 44, 2
582 ; CORTEX-A17-NOFPU: .eabi_attribute 68, 3
584 ; CORTEX-A17-NOFPU-NOT: .eabi_attribute 19
585 ;; Despite there being no FPU, we chose to flush to zero preserving
586 ;; sign. This matches what the hardware would do for this architecture
588 ; CORTEX-A17-NOFPU-FAST: .eabi_attribute 20, 2
590 ; CORTEX-M0: .cpu cortex-m0
591 ; CORTEX-M0: .eabi_attribute 6, 12
592 ; CORTEX-M0-NOT: .eabi_attribute 7
593 ; CORTEX-M0: .eabi_attribute 8, 0
594 ; CORTEX-M0: .eabi_attribute 9, 1
595 ; CORTEX-M0-NOT: .eabi_attribute 19
596 ;; We default to IEEE 754 compliance
597 ; CORTEX-M0: .eabi_attribute 20, 1
598 ; CORTEX-M0: .eabi_attribute 24, 1
599 ; CORTEX-M0: .eabi_attribute 25, 1
600 ; CORTEX-M0-NOT: .eabi_attribute 27
601 ; CORTEX-M0-NOT: .eabi_attribute 28
602 ; CORTEX-M0-NOT: .eabi_attribute 36
603 ; CORTEX-M0-NOT: .eabi_attribute 42
604 ; CORTEX-M0-NOT: .eabi_attribute 68
606 ; CORTEX-M0-FAST-NOT: .eabi_attribute 19
607 ;; Despite the M0 CPU having no FPU in this scenario, we chose to
608 ;; flush to positive zero here. There's no hardware support doing
609 ;; this, but the fast maths software library might and such behaviour
610 ;; would match hardware support on this architecture revision if it
612 ; CORTEX-M0-FAST-NOT: .eabi_attribute 20
614 ; CORTEX-M3: .cpu cortex-m3
615 ; CORTEX-M3: .eabi_attribute 6, 10
616 ; CORTEX-M3: .eabi_attribute 7, 77
617 ; CORTEX-M3: .eabi_attribute 8, 0
618 ; CORTEX-M3: .eabi_attribute 9, 2
619 ; CORTEX-M3-NOT: .eabi_attribute 19
620 ;; We default to IEEE 754 compliance
621 ; CORTEX-M3: .eabi_attribute 20, 1
622 ; CORTEX-M3: .eabi_attribute 21, 1
623 ; CORTEX-M3: .eabi_attribute 23, 3
624 ; CORTEX-M3: .eabi_attribute 24, 1
625 ; CORTEX-M3: .eabi_attribute 25, 1
626 ; CORTEX-M3-NOT: .eabi_attribute 27
627 ; CORTEX-M3-NOT: .eabi_attribute 28
628 ; CORTEX-M3-NOT: .eabi_attribute 36
629 ; CORTEX-M3-NOT: .eabi_attribute 42
630 ; CORTEX-M3-NOT: .eabi_attribute 44
631 ; CORTEX-M3-NOT: .eabi_attribute 68
633 ; CORTEX-M3-FAST-NOT: .eabi_attribute 19
634 ;; Despite there being no FPU, we chose to flush to zero preserving
635 ;; sign. This matches what the hardware would do for this architecture
637 ; CORTEX-M3-FAST: .eabi_attribute 20, 2
639 ; CORTEX-M4-SOFT: .cpu cortex-m4
640 ; CORTEX-M4-SOFT: .eabi_attribute 6, 13
641 ; CORTEX-M4-SOFT: .eabi_attribute 7, 77
642 ; CORTEX-M4-SOFT: .eabi_attribute 8, 0
643 ; CORTEX-M4-SOFT: .eabi_attribute 9, 2
644 ; CORTEX-M4-SOFT: .fpu vfpv4-d16
645 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 19
646 ;; We default to IEEE 754 compliance
647 ; CORTEX-M4-SOFT: .eabi_attribute 20, 1
648 ; CORTEX-M4-SOFT: .eabi_attribute 21, 1
649 ; CORTEX-M4-SOFT: .eabi_attribute 23, 3
650 ; CORTEX-M4-SOFT: .eabi_attribute 24, 1
651 ; CORTEX-M4-SOFT: .eabi_attribute 25, 1
652 ; CORTEX-M4-SOFT: .eabi_attribute 27, 1
653 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 28
654 ; CORTEX-M4-SOFT: .eabi_attribute 36, 1
655 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 42
656 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 44
657 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 68
659 ; CORTEX-M4-SOFT-FAST-NOT: .eabi_attribute 19
660 ;; The M4 defaults to a VFPv4 FPU, so it flushes preseving sign when
661 ;; -ffast-math is specified.
662 ; CORTEX-M4-SOFT-FAST: .eabi_attribute 20, 2
664 ; CORTEX-M4-HARD: .cpu cortex-m4
665 ; CORTEX-M4-HARD: .eabi_attribute 6, 13
666 ; CORTEX-M4-HARD: .eabi_attribute 7, 77
667 ; CORTEX-M4-HARD: .eabi_attribute 8, 0
668 ; CORTEX-M4-HARD: .eabi_attribute 9, 2
669 ; CORTEX-M4-HARD: .fpu vfpv4-d16
670 ; CORTEX-M4-HARD-NOT: .eabi_attribute 19
671 ;; We default to IEEE 754 compliance
672 ; CORTEX-M4-HARD: .eabi_attribute 20, 1
673 ; CORTEX-M4-HARD: .eabi_attribute 21, 1
674 ; CORTEX-M4-HARD: .eabi_attribute 23, 3
675 ; CORTEX-M4-HARD: .eabi_attribute 24, 1
676 ; CORTEX-M4-HARD: .eabi_attribute 25, 1
677 ; CORTEX-M4-HARD: .eabi_attribute 27, 1
678 ; CORTEX-M4-HARD: .eabi_attribute 28, 1
679 ; CORTEX-M4-HARD: .eabi_attribute 36, 1
680 ; CORTEX-M4-HARD-NOT: .eabi_attribute 42
681 ; CORTEX-M4-HARD-NOT: .eabi_attribute 44
682 ; CORTEX-M4-HARD-NOT: .eabi_attribute 68
684 ; CORTEX-M4-HARD-FAST-NOT: .eabi_attribute 19
685 ;; The M4 defaults to a VFPv4 FPU, so it flushes preseving sign when
686 ;; -ffast-math is specified.
687 ; CORTEX-M4-HARD-FAST: .eabi_attribute 20, 2
689 ; CORTEX-M7: .cpu cortex-m7
690 ; CORTEX-M7: .eabi_attribute 6, 13
691 ; CORTEX-M7: .eabi_attribute 7, 77
692 ; CORTEX-M7: .eabi_attribute 8, 0
693 ; CORTEX-M7: .eabi_attribute 9, 2
694 ; CORTEX-M7-SOFT-NOT: .fpu
695 ; CORTEX-M7-SINGLE: .fpu fpv5-d16
696 ; CORTEX-M7-DOUBLE: .fpu fpv5-d16
697 ; CORTEX-M7: .eabi_attribute 17, 1
698 ; CORTEX-M7-NOT: .eabi_attribute 19
699 ;; We default to IEEE 754 compliance
700 ; CORTEX-M7: .eabi_attribute 20, 1
701 ; CORTEX-M7: .eabi_attribute 21, 1
702 ; CORTEX-M7: .eabi_attribute 23, 3
703 ; CORTEX-M7: .eabi_attribute 24, 1
704 ; CORTEX-M7: .eabi_attribute 25, 1
705 ; CORTEX-M7-SOFT-NOT: .eabi_attribute 27
706 ; CORTEX-M7-SINGLE: .eabi_attribute 27, 1
707 ; CORTEX-M7-DOUBLE-NOT: .eabi_attribute 27
708 ; CORTEX-M7: .eabi_attribute 36, 1
709 ; CORTEX-M7: .eabi_attribute 14, 0
711 ; CORTEX-M7-NOFPU-FAST-NOT: .eabi_attribute 19
712 ;; The M7 has the ARMv8 FP unit, which always flushes preserving sign.
713 ; CORTEX-M7-FAST: .eabi_attribute 20, 2
714 ;; Despite there being no FPU, we chose to flush to zero preserving
715 ;; sign. This matches what the hardware would do for this architecture
717 ; CORTEX-M7-NOFPU-FAST: .eabi_attribute 20, 2
720 ; CORTEX-R5: .cpu cortex-r5
721 ; CORTEX-R5: .eabi_attribute 6, 10
722 ; CORTEX-R5: .eabi_attribute 7, 82
723 ; CORTEX-R5: .eabi_attribute 8, 1
724 ; CORTEX-R5: .eabi_attribute 9, 2
725 ; CORTEX-R5: .fpu vfpv3-d16
726 ; CORTEX-R5-NOT: .eabi_attribute 19
727 ;; We default to IEEE 754 compliance
728 ; CORTEX-R5: .eabi_attribute 20, 1
729 ; CORTEX-R5: .eabi_attribute 21, 1
730 ; CORTEX-R5: .eabi_attribute 23, 3
731 ; CORTEX-R5: .eabi_attribute 24, 1
732 ; CORTEX-R5: .eabi_attribute 25, 1
733 ; CORTEX-R5: .eabi_attribute 27, 1
734 ; CORTEX-R5-NOT: .eabi_attribute 28
735 ; CORTEX-R5-NOT: .eabi_attribute 36
736 ; CORTEX-R5-NOT: .eabi_attribute 42
737 ; CORTEX-R5: .eabi_attribute 44, 2
738 ; CORTEX-R5-NOT: .eabi_attribute 68
740 ; CORTEX-R5-FAST-NOT: .eabi_attribute 19
741 ;; The R5 has the VFPv3 FP unit, which always flushes preserving sign.
742 ; CORTEX-R5-FAST: .eabi_attribute 20, 2
744 ; CORTEX-A53: .cpu cortex-a53
745 ; CORTEX-A53: .eabi_attribute 6, 14
746 ; CORTEX-A53: .eabi_attribute 7, 65
747 ; CORTEX-A53: .eabi_attribute 8, 1
748 ; CORTEX-A53: .eabi_attribute 9, 2
749 ; CORTEX-A53: .fpu crypto-neon-fp-armv8
750 ; CORTEX-A53: .eabi_attribute 12, 3
751 ; CORTEX-A53-NOT: .eabi_attribute 19
752 ;; We default to IEEE 754 compliance
753 ; CORTEX-A53: .eabi_attribute 20, 1
754 ; CORTEX-A53: .eabi_attribute 24, 1
755 ; CORTEX-A53: .eabi_attribute 25, 1
756 ; CORTEX-A53-NOT: .eabi_attribute 27
757 ; CORTEX-A53-NOT: .eabi_attribute 28
758 ; CORTEX-A53: .eabi_attribute 36, 1
759 ; CORTEX-A53: .eabi_attribute 42, 1
760 ; CORTEX-A53-NOT: .eabi_attribute 44
761 ; CORTEX-A53: .eabi_attribute 68, 3
763 ; CORTEX-A53-FAST-NOT: .eabi_attribute 19
764 ;; The A53 has the ARMv8 FP unit, which always flushes preserving sign.
765 ; CORTEX-A53-FAST: .eabi_attribute 20, 2
767 ; CORTEX-A57: .cpu cortex-a57
768 ; CORTEX-A57: .eabi_attribute 6, 14
769 ; CORTEX-A57: .eabi_attribute 7, 65
770 ; CORTEX-A57: .eabi_attribute 8, 1
771 ; CORTEX-A57: .eabi_attribute 9, 2
772 ; CORTEX-A57: .fpu crypto-neon-fp-armv8
773 ; CORTEX-A57: .eabi_attribute 12, 3
774 ; CORTEX-A57-NOT: .eabi_attribute 19
775 ;; We default to IEEE 754 compliance
776 ; CORTEX-A57: .eabi_attribute 20, 1
777 ; CORTEX-A57: .eabi_attribute 24, 1
778 ; CORTEX-A57: .eabi_attribute 25, 1
779 ; CORTEX-A57-NOT: .eabi_attribute 27
780 ; CORTEX-A57-NOT: .eabi_attribute 28
781 ; CORTEX-A57: .eabi_attribute 36, 1
782 ; CORTEX-A57: .eabi_attribute 42, 1
783 ; CORTEX-A57-NOT: .eabi_attribute 44
784 ; CORTEX-A57: .eabi_attribute 68, 3
786 ; CORTEX-A57-FAST-NOT: .eabi_attribute 19
787 ;; The A57 has the ARMv8 FP unit, which always flushes preserving sign.
788 ; CORTEX-A57-FAST: .eabi_attribute 20, 2
790 ; RELOC-PIC: .eabi_attribute 15, 1
791 ; RELOC-PIC: .eabi_attribute 16, 1
792 ; RELOC-PIC: .eabi_attribute 17, 2
793 ; RELOC-OTHER: .eabi_attribute 17, 1
795 ; PCS-R9-USE: .eabi_attribute 14, 0
796 ; PCS-R9-RESERVE: .eabi_attribute 14, 3
798 define i32 @f(i64 %z) {