1 ; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s
2 ; RUN: llc -verify-machineinstrs < %s -mtriple=arm64-none-linux-gnu -arm64-load-store-opt=0 | FileCheck %s
4 declare void @callee_stack0()
5 declare void @callee_stack8([8 x i32], i64)
6 declare void @callee_stack16([8 x i32], i64, i64)
8 define void @caller_to0_from0() nounwind {
9 ; CHECK-LABEL: caller_to0_from0:
11 tail call void @callee_stack0()
13 ; CHECK-NEXT: b callee_stack0
16 define void @caller_to0_from8([8 x i32], i64) nounwind{
17 ; CHECK-LABEL: caller_to0_from8:
20 tail call void @callee_stack0()
22 ; CHECK-NEXT: b callee_stack0
25 define void @caller_to8_from0() {
26 ; CHECK-LABEL: caller_to8_from0:
28 ; Caller isn't going to clean up any extra stack we allocate, so it
29 ; can't be a tail call.
30 tail call void @callee_stack8([8 x i32] undef, i64 42)
32 ; CHECK: bl callee_stack8
35 define void @caller_to8_from8([8 x i32], i64 %a) {
36 ; CHECK-LABEL: caller_to8_from8:
37 ; CHECK-NOT: sub sp, sp,
39 ; This should reuse our stack area for the 42
40 tail call void @callee_stack8([8 x i32] undef, i64 42)
42 ; CHECK: str {{x[0-9]+}}, [sp]
43 ; CHECK-NEXT: b callee_stack8
46 define void @caller_to16_from8([8 x i32], i64 %a) {
47 ; CHECK-LABEL: caller_to16_from8:
49 ; Shouldn't be a tail call: we can't use SP+8 because our caller might
50 ; have something there. This may sound obvious but implementation does
51 ; some funky aligning.
52 tail call void @callee_stack16([8 x i32] undef, i64 undef, i64 undef)
53 ; CHECK: bl callee_stack16
57 define void @caller_to8_from24([8 x i32], i64 %a, i64 %b, i64 %c) {
58 ; CHECK-LABEL: caller_to8_from24:
59 ; CHECK-NOT: sub sp, sp
61 ; Reuse our area, putting "42" at incoming sp
62 tail call void @callee_stack8([8 x i32] undef, i64 42)
64 ; CHECK: str {{x[0-9]+}}, [sp]
65 ; CHECK-NEXT: b callee_stack8
68 define void @caller_to16_from16([8 x i32], i64 %a, i64 %b) {
69 ; CHECK-LABEL: caller_to16_from16:
70 ; CHECK-NOT: sub sp, sp,
72 ; Here we want to make sure that both loads happen before the stores:
73 ; otherwise either %a or %b will be wrongly clobbered.
74 tail call void @callee_stack16([8 x i32] undef, i64 %b, i64 %a)
77 ; CHECK: ldr [[VAL0:x[0-9]+]],
78 ; CHECK: ldr [[VAL1:x[0-9]+]],
79 ; CHECK: str [[VAL1]],
80 ; CHECK: str [[VAL0]],
82 ; CHECK-NOT: add sp, sp,
83 ; CHECK: b callee_stack16
86 @func = global void(i32)* null
88 define void @indirect_tail() {
89 ; CHECK-LABEL: indirect_tail:
90 ; CHECK-NOT: sub sp, sp
92 %fptr = load void(i32)** @func
93 tail call void %fptr(i32 42)
95 ; CHECK: ldr [[FPTR:x[1-9]+]], [{{x[0-9]+}}, {{#?}}:lo12:func]
96 ; CHECK: movz w0, #{{42|0x2a}}