1 ; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AARCH64
2 ; RUN: llc -verify-machineinstrs < %s -mtriple=arm64-none-linux-gnu -mcpu=cyclone | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-ARM64
3 ; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mattr=-fp-armv8 | FileCheck --check-prefix=CHECK-NOFP %s
8 define void @test_csel(i32 %lhs32, i32 %rhs32, i64 %lhs64) minsize {
9 ; CHECK-LABEL: test_csel:
11 %tst1 = icmp ugt i32 %lhs32, %rhs32
12 %val1 = select i1 %tst1, i32 42, i32 52
13 store i32 %val1, i32* @var32
14 ; CHECK-DAG: movz [[W52:w[0-9]+]], #52
15 ; CHECK-DAG: movz [[W42:w[0-9]+]], #42
16 ; CHECK: csel {{w[0-9]+}}, [[W42]], [[W52]], hi
18 %rhs64 = sext i32 %rhs32 to i64
19 %tst2 = icmp sle i64 %lhs64, %rhs64
20 %val2 = select i1 %tst2, i64 %lhs64, i64 %rhs64
21 store i64 %val2, i64* @var64
22 ; CHECK: sxtw [[EXT_RHS:x[0-9]+]], {{[wx]}}[[RHS:[0-9]+]]
23 ; CHECK: cmp [[LHS:x[0-9]+]], w[[RHS]], sxtw
24 ; CHECK: csel {{x[0-9]+}}, [[LHS]], [[EXT_RHS]], le
30 define void @test_floatcsel(float %lhs32, float %rhs32, double %lhs64, double %rhs64) {
31 ; CHECK-LABEL: test_floatcsel:
33 %tst1 = fcmp one float %lhs32, %rhs32
34 ; CHECK: fcmp {{s[0-9]+}}, {{s[0-9]+}}
35 ; CHECK-NOFP-NOT: fcmp
36 %val1 = select i1 %tst1, i32 42, i32 52
37 store i32 %val1, i32* @var32
38 ; CHECK: movz [[W52:w[0-9]+]], #52
39 ; CHECK: movz [[W42:w[0-9]+]], #42
40 ; CHECK: csel [[MAYBETRUE:w[0-9]+]], [[W42]], [[W52]], mi
41 ; CHECK: csel {{w[0-9]+}}, [[W42]], [[MAYBETRUE]], gt
44 %tst2 = fcmp ueq double %lhs64, %rhs64
45 ; CHECK: fcmp {{d[0-9]+}}, {{d[0-9]+}}
46 ; CHECK-NOFP-NOT: fcmp
47 %val2 = select i1 %tst2, i64 9, i64 15
48 store i64 %val2, i64* @var64
49 ; CHECK-AARCH64: movz [[CONST15:x[0-9]+]], #15
50 ; CHECK-ARM64: orr [[CONST15:x[0-9]+]], xzr, #0xf
51 ; CHECK: movz [[CONST9:x[0-9]+]], #9
52 ; CHECK: csel [[MAYBETRUE:x[0-9]+]], [[CONST9]], [[CONST15]], eq
53 ; CHECK: csel {{x[0-9]+}}, [[CONST9]], [[MAYBETRUE]], vs
60 define void @test_csinc(i32 %lhs32, i32 %rhs32, i64 %lhs64) minsize {
61 ; CHECK-LABEL: test_csinc:
63 ; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).
64 %tst1 = icmp ugt i32 %lhs32, %rhs32
65 %inc1 = add i32 %rhs32, 1
66 %val1 = select i1 %tst1, i32 %inc1, i32 %lhs32
67 store volatile i32 %val1, i32* @var32
68 ; CHECK: cmp [[LHS:w[0-9]+]], [[RHS:w[0-9]+]]
69 ; CHECK: csinc {{w[0-9]+}}, [[LHS]], [[RHS]], ls
71 %rhs2 = add i32 %rhs32, 42
72 %tst2 = icmp sle i32 %lhs32, %rhs2
73 %inc2 = add i32 %rhs32, 1
74 %val2 = select i1 %tst2, i32 %lhs32, i32 %inc2
75 store volatile i32 %val2, i32* @var32
76 ; CHECK: cmp [[LHS:w[0-9]+]], {{w[0-9]+}}
77 ; CHECK: csinc {{w[0-9]+}}, [[LHS]], {{w[0-9]+}}, le
79 ; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).
80 %rhs3 = sext i32 %rhs32 to i64
81 %tst3 = icmp ugt i64 %lhs64, %rhs3
82 %inc3 = add i64 %rhs3, 1
83 %val3 = select i1 %tst3, i64 %inc3, i64 %lhs64
84 store volatile i64 %val3, i64* @var64
85 ; CHECK: cmp [[LHS:x[0-9]+]], {{w[0-9]+}}
86 ; CHECK: csinc {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, ls
88 %rhs4 = zext i32 %rhs32 to i64
89 %tst4 = icmp sle i64 %lhs64, %rhs4
90 %inc4 = add i64 %rhs4, 1
91 %val4 = select i1 %tst4, i64 %lhs64, i64 %inc4
92 store volatile i64 %val4, i64* @var64
93 ; CHECK: cmp [[LHS:x[0-9]+]], {{w[0-9]+}}
94 ; CHECK: csinc {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, le
100 define void @test_csinv(i32 %lhs32, i32 %rhs32, i64 %lhs64) minsize {
101 ; CHECK-LABEL: test_csinv:
103 ; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).
104 %tst1 = icmp ugt i32 %lhs32, %rhs32
105 %inc1 = xor i32 -1, %rhs32
106 %val1 = select i1 %tst1, i32 %inc1, i32 %lhs32
107 store volatile i32 %val1, i32* @var32
108 ; CHECK: cmp [[LHS:w[0-9]+]], [[RHS:w[0-9]+]]
109 ; CHECK: csinv {{w[0-9]+}}, [[LHS]], [[RHS]], ls
111 %rhs2 = add i32 %rhs32, 42
112 %tst2 = icmp sle i32 %lhs32, %rhs2
113 %inc2 = xor i32 -1, %rhs32
114 %val2 = select i1 %tst2, i32 %lhs32, i32 %inc2
115 store volatile i32 %val2, i32* @var32
116 ; CHECK: cmp [[LHS:w[0-9]+]], {{w[0-9]+}}
117 ; CHECK: csinv {{w[0-9]+}}, [[LHS]], {{w[0-9]+}}, le
119 ; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).
120 %rhs3 = sext i32 %rhs32 to i64
121 %tst3 = icmp ugt i64 %lhs64, %rhs3
122 %inc3 = xor i64 -1, %rhs3
123 %val3 = select i1 %tst3, i64 %inc3, i64 %lhs64
124 store volatile i64 %val3, i64* @var64
125 ; CHECK: cmp [[LHS:x[0-9]+]], {{w[0-9]+}}
126 ; CHECK: csinv {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, ls
128 %rhs4 = zext i32 %rhs32 to i64
129 %tst4 = icmp sle i64 %lhs64, %rhs4
130 %inc4 = xor i64 -1, %rhs4
131 %val4 = select i1 %tst4, i64 %lhs64, i64 %inc4
132 store volatile i64 %val4, i64* @var64
133 ; CHECK: cmp [[LHS:x[0-9]+]], {{w[0-9]+}}
134 ; CHECK: csinv {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, le
140 define void @test_csneg(i32 %lhs32, i32 %rhs32, i64 %lhs64) minsize {
141 ; CHECK-LABEL: test_csneg:
143 ; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).
144 %tst1 = icmp ugt i32 %lhs32, %rhs32
145 %inc1 = sub i32 0, %rhs32
146 %val1 = select i1 %tst1, i32 %inc1, i32 %lhs32
147 store volatile i32 %val1, i32* @var32
148 ; CHECK: cmp [[LHS:w[0-9]+]], [[RHS:w[0-9]+]]
149 ; CHECK: csneg {{w[0-9]+}}, [[LHS]], [[RHS]], ls
151 %rhs2 = add i32 %rhs32, 42
152 %tst2 = icmp sle i32 %lhs32, %rhs2
153 %inc2 = sub i32 0, %rhs32
154 %val2 = select i1 %tst2, i32 %lhs32, i32 %inc2
155 store volatile i32 %val2, i32* @var32
156 ; CHECK: cmp [[LHS:w[0-9]+]], {{w[0-9]+}}
157 ; CHECK: csneg {{w[0-9]+}}, [[LHS]], {{w[0-9]+}}, le
159 ; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).
160 %rhs3 = sext i32 %rhs32 to i64
161 %tst3 = icmp ugt i64 %lhs64, %rhs3
162 %inc3 = sub i64 0, %rhs3
163 %val3 = select i1 %tst3, i64 %inc3, i64 %lhs64
164 store volatile i64 %val3, i64* @var64
165 ; CHECK: cmp [[LHS:x[0-9]+]], {{w[0-9]+}}
166 ; CHECK: csneg {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, ls
168 %rhs4 = zext i32 %rhs32 to i64
169 %tst4 = icmp sle i64 %lhs64, %rhs4
170 %inc4 = sub i64 0, %rhs4
171 %val4 = select i1 %tst4, i64 %lhs64, i64 %inc4
172 store volatile i64 %val4, i64* @var64
173 ; CHECK: cmp [[LHS:x[0-9]+]], {{w[0-9]+}}
174 ; CHECK: csneg {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, le
180 define void @test_cset(i32 %lhs, i32 %rhs, i64 %lhs64) {
181 ; CHECK-LABEL: test_cset:
183 ; N.b. code is not optimal here (32-bit csinc would be better) but
184 ; incoming DAG is too complex
185 %tst1 = icmp eq i32 %lhs, %rhs
186 %val1 = zext i1 %tst1 to i32
187 store i32 %val1, i32* @var32
188 ; CHECK: cmp {{w[0-9]+}}, {{w[0-9]+}}
189 ; CHECK: csinc {{w[0-9]+}}, wzr, wzr, ne
191 %rhs64 = sext i32 %rhs to i64
192 %tst2 = icmp ule i64 %lhs64, %rhs64
193 %val2 = zext i1 %tst2 to i64
194 store i64 %val2, i64* @var64
195 ; CHECK: csinc {{w[0-9]+}}, wzr, wzr, hi
201 define void @test_csetm(i32 %lhs, i32 %rhs, i64 %lhs64) {
202 ; CHECK-LABEL: test_csetm:
204 %tst1 = icmp eq i32 %lhs, %rhs
205 %val1 = sext i1 %tst1 to i32
206 store i32 %val1, i32* @var32
207 ; CHECK: cmp {{w[0-9]+}}, {{w[0-9]+}}
208 ; CHECK: csinv {{w[0-9]+}}, wzr, wzr, ne
210 %rhs64 = sext i32 %rhs to i64
211 %tst2 = icmp ule i64 %lhs64, %rhs64
212 %val2 = sext i1 %tst2 to i64
213 store i64 %val2, i64* @var64
214 ; CHECK: csinv {{x[0-9]+}}, xzr, xzr, hi