2 * soc-cache.c -- ASoC register cache helpers
4 * Copyright 2009 Wolfson Microelectronics PLC.
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
14 #include <linux/i2c.h>
15 #include <linux/spi/spi.h>
16 #include <sound/soc.h>
18 static unsigned int snd_soc_4_12_read(struct snd_soc_codec *codec,
24 if (reg >= codec->driver->reg_cache_size ||
25 snd_soc_codec_volatile_register(codec, reg)) {
26 if (codec->cache_only)
29 BUG_ON(!codec->hw_read);
30 return codec->hw_read(codec, reg);
33 ret = snd_soc_cache_read(codec, reg, &val);
39 static int snd_soc_4_12_write(struct snd_soc_codec *codec, unsigned int reg,
45 data[0] = (reg << 4) | ((value >> 8) & 0x000f);
46 data[1] = value & 0x00ff;
48 if (!snd_soc_codec_volatile_register(codec, reg) &&
49 reg < codec->driver->reg_cache_size) {
50 ret = snd_soc_cache_write(codec, reg, value);
55 if (codec->cache_only) {
56 codec->cache_sync = 1;
60 ret = codec->hw_write(codec->control_data, data, 2);
69 #if defined(CONFIG_SPI_MASTER)
70 static int snd_soc_4_12_spi_write(void *control_data, const char *data,
73 struct spi_device *spi = control_data;
74 struct spi_transfer t;
85 memset(&t, 0, (sizeof t));
90 spi_message_add_tail(&t, &m);
96 #define snd_soc_4_12_spi_write NULL
99 static unsigned int snd_soc_7_9_read(struct snd_soc_codec *codec,
105 if (reg >= codec->driver->reg_cache_size ||
106 snd_soc_codec_volatile_register(codec, reg)) {
107 if (codec->cache_only)
110 BUG_ON(!codec->hw_read);
111 return codec->hw_read(codec, reg);
114 ret = snd_soc_cache_read(codec, reg, &val);
120 static int snd_soc_7_9_write(struct snd_soc_codec *codec, unsigned int reg,
126 data[0] = (reg << 1) | ((value >> 8) & 0x0001);
127 data[1] = value & 0x00ff;
129 if (!snd_soc_codec_volatile_register(codec, reg) &&
130 reg < codec->driver->reg_cache_size) {
131 ret = snd_soc_cache_write(codec, reg, value);
136 if (codec->cache_only) {
137 codec->cache_sync = 1;
141 ret = codec->hw_write(codec->control_data, data, 2);
150 #if defined(CONFIG_SPI_MASTER)
151 static int snd_soc_7_9_spi_write(void *control_data, const char *data,
154 struct spi_device *spi = control_data;
155 struct spi_transfer t;
156 struct spi_message m;
165 spi_message_init(&m);
166 memset(&t, 0, (sizeof t));
171 spi_message_add_tail(&t, &m);
177 #define snd_soc_7_9_spi_write NULL
180 static int snd_soc_8_8_write(struct snd_soc_codec *codec, unsigned int reg,
188 data[1] = value & 0xff;
190 if (!snd_soc_codec_volatile_register(codec, reg) &&
191 reg < codec->driver->reg_cache_size) {
192 ret = snd_soc_cache_write(codec, reg, value);
197 if (codec->cache_only) {
198 codec->cache_sync = 1;
202 if (codec->hw_write(codec->control_data, data, 2) == 2)
208 static unsigned int snd_soc_8_8_read(struct snd_soc_codec *codec,
215 if (reg >= codec->driver->reg_cache_size ||
216 snd_soc_codec_volatile_register(codec, reg)) {
217 if (codec->cache_only)
220 BUG_ON(!codec->hw_read);
221 return codec->hw_read(codec, reg);
224 ret = snd_soc_cache_read(codec, reg, &val);
230 #if defined(CONFIG_SPI_MASTER)
231 static int snd_soc_8_8_spi_write(void *control_data, const char *data,
234 struct spi_device *spi = control_data;
235 struct spi_transfer t;
236 struct spi_message m;
245 spi_message_init(&m);
246 memset(&t, 0, (sizeof t));
251 spi_message_add_tail(&t, &m);
257 #define snd_soc_8_8_spi_write NULL
260 static int snd_soc_8_16_write(struct snd_soc_codec *codec, unsigned int reg,
267 data[1] = (value >> 8) & 0xff;
268 data[2] = value & 0xff;
270 if (!snd_soc_codec_volatile_register(codec, reg) &&
271 reg < codec->driver->reg_cache_size) {
272 ret = snd_soc_cache_write(codec, reg, value);
277 if (codec->cache_only) {
278 codec->cache_sync = 1;
282 if (codec->hw_write(codec->control_data, data, 3) == 3)
288 static unsigned int snd_soc_8_16_read(struct snd_soc_codec *codec,
294 if (reg >= codec->driver->reg_cache_size ||
295 snd_soc_codec_volatile_register(codec, reg)) {
296 if (codec->cache_only)
299 BUG_ON(!codec->hw_read);
300 return codec->hw_read(codec, reg);
303 ret = snd_soc_cache_read(codec, reg, &val);
309 #if defined(CONFIG_SPI_MASTER)
310 static int snd_soc_8_16_spi_write(void *control_data, const char *data,
313 struct spi_device *spi = control_data;
314 struct spi_transfer t;
315 struct spi_message m;
325 spi_message_init(&m);
326 memset(&t, 0, (sizeof t));
331 spi_message_add_tail(&t, &m);
337 #define snd_soc_8_16_spi_write NULL
340 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
341 static unsigned int snd_soc_8_8_read_i2c(struct snd_soc_codec *codec,
344 struct i2c_msg xfer[2];
348 struct i2c_client *client = codec->control_data;
351 xfer[0].addr = client->addr;
357 xfer[1].addr = client->addr;
358 xfer[1].flags = I2C_M_RD;
362 ret = i2c_transfer(client->adapter, xfer, 2);
364 dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
371 #define snd_soc_8_8_read_i2c NULL
374 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
375 static unsigned int snd_soc_8_16_read_i2c(struct snd_soc_codec *codec,
378 struct i2c_msg xfer[2];
382 struct i2c_client *client = codec->control_data;
385 xfer[0].addr = client->addr;
391 xfer[1].addr = client->addr;
392 xfer[1].flags = I2C_M_RD;
394 xfer[1].buf = (u8 *)&data;
396 ret = i2c_transfer(client->adapter, xfer, 2);
398 dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
402 return (data >> 8) | ((data & 0xff) << 8);
405 #define snd_soc_8_16_read_i2c NULL
408 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
409 static unsigned int snd_soc_16_8_read_i2c(struct snd_soc_codec *codec,
412 struct i2c_msg xfer[2];
416 struct i2c_client *client = codec->control_data;
419 xfer[0].addr = client->addr;
422 xfer[0].buf = (u8 *)®
425 xfer[1].addr = client->addr;
426 xfer[1].flags = I2C_M_RD;
430 ret = i2c_transfer(client->adapter, xfer, 2);
432 dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
439 #define snd_soc_16_8_read_i2c NULL
442 static unsigned int snd_soc_16_8_read(struct snd_soc_codec *codec,
449 if (reg >= codec->driver->reg_cache_size ||
450 snd_soc_codec_volatile_register(codec, reg)) {
451 if (codec->cache_only)
454 BUG_ON(!codec->hw_read);
455 return codec->hw_read(codec, reg);
458 ret = snd_soc_cache_read(codec, reg, &val);
464 static int snd_soc_16_8_write(struct snd_soc_codec *codec, unsigned int reg,
470 data[0] = (reg >> 8) & 0xff;
471 data[1] = reg & 0xff;
475 if (!snd_soc_codec_volatile_register(codec, reg) &&
476 reg < codec->driver->reg_cache_size) {
477 ret = snd_soc_cache_write(codec, reg, value);
482 if (codec->cache_only) {
483 codec->cache_sync = 1;
487 ret = codec->hw_write(codec->control_data, data, 3);
496 #if defined(CONFIG_SPI_MASTER)
497 static int snd_soc_16_8_spi_write(void *control_data, const char *data,
500 struct spi_device *spi = control_data;
501 struct spi_transfer t;
502 struct spi_message m;
512 spi_message_init(&m);
513 memset(&t, 0, (sizeof t));
518 spi_message_add_tail(&t, &m);
524 #define snd_soc_16_8_spi_write NULL
527 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
528 static unsigned int snd_soc_16_16_read_i2c(struct snd_soc_codec *codec,
531 struct i2c_msg xfer[2];
532 u16 reg = cpu_to_be16(r);
535 struct i2c_client *client = codec->control_data;
538 xfer[0].addr = client->addr;
541 xfer[0].buf = (u8 *)®
544 xfer[1].addr = client->addr;
545 xfer[1].flags = I2C_M_RD;
547 xfer[1].buf = (u8 *)&data;
549 ret = i2c_transfer(client->adapter, xfer, 2);
551 dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
555 return be16_to_cpu(data);
558 #define snd_soc_16_16_read_i2c NULL
561 static unsigned int snd_soc_16_16_read(struct snd_soc_codec *codec,
567 if (reg >= codec->driver->reg_cache_size ||
568 snd_soc_codec_volatile_register(codec, reg)) {
569 if (codec->cache_only)
572 BUG_ON(!codec->hw_read);
573 return codec->hw_read(codec, reg);
576 ret = snd_soc_cache_read(codec, reg, &val);
583 static int snd_soc_16_16_write(struct snd_soc_codec *codec, unsigned int reg,
589 data[0] = (reg >> 8) & 0xff;
590 data[1] = reg & 0xff;
591 data[2] = (value >> 8) & 0xff;
592 data[3] = value & 0xff;
594 if (!snd_soc_codec_volatile_register(codec, reg) &&
595 reg < codec->driver->reg_cache_size) {
596 ret = snd_soc_cache_write(codec, reg, value);
601 if (codec->cache_only) {
602 codec->cache_sync = 1;
606 ret = codec->hw_write(codec->control_data, data, 4);
615 #if defined(CONFIG_SPI_MASTER)
616 static int snd_soc_16_16_spi_write(void *control_data, const char *data,
619 struct spi_device *spi = control_data;
620 struct spi_transfer t;
621 struct spi_message m;
632 spi_message_init(&m);
633 memset(&t, 0, (sizeof t));
638 spi_message_add_tail(&t, &m);
644 #define snd_soc_16_16_spi_write NULL
650 int (*write)(struct snd_soc_codec *codec, unsigned int, unsigned int);
651 int (*spi_write)(void *, const char *, int);
652 unsigned int (*read)(struct snd_soc_codec *, unsigned int);
653 unsigned int (*i2c_read)(struct snd_soc_codec *, unsigned int);
656 .addr_bits = 4, .data_bits = 12,
657 .write = snd_soc_4_12_write, .read = snd_soc_4_12_read,
658 .spi_write = snd_soc_4_12_spi_write,
661 .addr_bits = 7, .data_bits = 9,
662 .write = snd_soc_7_9_write, .read = snd_soc_7_9_read,
663 .spi_write = snd_soc_7_9_spi_write,
666 .addr_bits = 8, .data_bits = 8,
667 .write = snd_soc_8_8_write, .read = snd_soc_8_8_read,
668 .i2c_read = snd_soc_8_8_read_i2c,
669 .spi_write = snd_soc_8_8_spi_write,
672 .addr_bits = 8, .data_bits = 16,
673 .write = snd_soc_8_16_write, .read = snd_soc_8_16_read,
674 .i2c_read = snd_soc_8_16_read_i2c,
675 .spi_write = snd_soc_8_16_spi_write,
678 .addr_bits = 16, .data_bits = 8,
679 .write = snd_soc_16_8_write, .read = snd_soc_16_8_read,
680 .i2c_read = snd_soc_16_8_read_i2c,
681 .spi_write = snd_soc_16_8_spi_write,
684 .addr_bits = 16, .data_bits = 16,
685 .write = snd_soc_16_16_write, .read = snd_soc_16_16_read,
686 .i2c_read = snd_soc_16_16_read_i2c,
687 .spi_write = snd_soc_16_16_spi_write,
692 * snd_soc_codec_set_cache_io: Set up standard I/O functions.
694 * @codec: CODEC to configure.
695 * @type: Type of cache.
696 * @addr_bits: Number of bits of register address data.
697 * @data_bits: Number of bits of data per register.
698 * @control: Control bus used.
700 * Register formats are frequently shared between many I2C and SPI
701 * devices. In order to promote code reuse the ASoC core provides
702 * some standard implementations of CODEC read and write operations
703 * which can be set up using this function.
705 * The caller is responsible for allocating and initialising the
708 * Note that at present this code cannot be used by CODECs with
709 * volatile registers.
711 int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
712 int addr_bits, int data_bits,
713 enum snd_soc_control_type control)
717 for (i = 0; i < ARRAY_SIZE(io_types); i++)
718 if (io_types[i].addr_bits == addr_bits &&
719 io_types[i].data_bits == data_bits)
721 if (i == ARRAY_SIZE(io_types)) {
723 "No I/O functions for %d bit address %d bit data\n",
724 addr_bits, data_bits);
728 codec->driver->write = io_types[i].write;
729 codec->driver->read = io_types[i].read;
736 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
737 codec->hw_write = (hw_write_t)i2c_master_send;
739 if (io_types[i].i2c_read)
740 codec->hw_read = io_types[i].i2c_read;
742 codec->control_data = container_of(codec->dev,
748 if (io_types[i].spi_write)
749 codec->hw_write = io_types[i].spi_write;
751 codec->control_data = container_of(codec->dev,
759 EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);
761 static int snd_soc_flat_cache_sync(struct snd_soc_codec *codec)
764 struct snd_soc_codec_driver *codec_drv;
767 codec_drv = codec->driver;
768 for (i = 0; i < codec_drv->reg_cache_size; ++i) {
769 snd_soc_cache_read(codec, i, &val);
770 if (codec_drv->reg_cache_default) {
771 switch (codec_drv->reg_word_size) {
775 cache = codec_drv->reg_cache_default;
783 cache = codec_drv->reg_cache_default;
792 snd_soc_write(codec, i, val);
793 dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
799 static int snd_soc_flat_cache_write(struct snd_soc_codec *codec,
800 unsigned int reg, unsigned int value)
802 switch (codec->driver->reg_word_size) {
806 cache = codec->reg_cache;
813 cache = codec->reg_cache;
824 static int snd_soc_flat_cache_read(struct snd_soc_codec *codec,
825 unsigned int reg, unsigned int *value)
827 switch (codec->driver->reg_word_size) {
831 cache = codec->reg_cache;
838 cache = codec->reg_cache;
849 static int snd_soc_flat_cache_exit(struct snd_soc_codec *codec)
851 if (!codec->reg_cache)
853 kfree(codec->reg_cache);
854 codec->reg_cache = NULL;
858 static int snd_soc_flat_cache_init(struct snd_soc_codec *codec)
860 struct snd_soc_codec_driver *codec_drv;
863 codec_drv = codec->driver;
864 reg_size = codec_drv->reg_cache_size * codec_drv->reg_word_size;
866 if (codec_drv->reg_cache_default)
867 codec->reg_cache = kmemdup(codec_drv->reg_cache_default,
868 reg_size, GFP_KERNEL);
870 codec->reg_cache = kzalloc(reg_size, GFP_KERNEL);
871 if (!codec->reg_cache)
877 /* an array of all supported compression types */
878 static const struct snd_soc_cache_ops cache_types[] = {
880 .id = SND_SOC_NO_COMPRESSION,
881 .init = snd_soc_flat_cache_init,
882 .exit = snd_soc_flat_cache_exit,
883 .read = snd_soc_flat_cache_read,
884 .write = snd_soc_flat_cache_write,
885 .sync = snd_soc_flat_cache_sync
889 int snd_soc_cache_init(struct snd_soc_codec *codec)
893 for (i = 0; i < ARRAY_SIZE(cache_types); ++i)
894 if (cache_types[i].id == codec->driver->compress_type)
896 if (i == ARRAY_SIZE(cache_types)) {
897 dev_err(codec->dev, "Could not match compress type: %d\n",
898 codec->driver->compress_type);
902 mutex_init(&codec->cache_rw_mutex);
903 codec->cache_ops = &cache_types[i];
905 if (codec->cache_ops->init)
906 return codec->cache_ops->init(codec);
911 * NOTE: keep in mind that this function might be called
914 int snd_soc_cache_exit(struct snd_soc_codec *codec)
916 if (codec->cache_ops && codec->cache_ops->exit)
917 return codec->cache_ops->exit(codec);
922 * snd_soc_cache_read: Fetch the value of a given register from the cache.
924 * @codec: CODEC to configure.
925 * @reg: The register index.
926 * @value: The value to be returned.
928 int snd_soc_cache_read(struct snd_soc_codec *codec,
929 unsigned int reg, unsigned int *value)
933 mutex_lock(&codec->cache_rw_mutex);
935 if (value && codec->cache_ops && codec->cache_ops->read) {
936 ret = codec->cache_ops->read(codec, reg, value);
937 mutex_unlock(&codec->cache_rw_mutex);
941 mutex_unlock(&codec->cache_rw_mutex);
944 EXPORT_SYMBOL_GPL(snd_soc_cache_read);
947 * snd_soc_cache_write: Set the value of a given register in the cache.
949 * @codec: CODEC to configure.
950 * @reg: The register index.
951 * @value: The new register value.
953 int snd_soc_cache_write(struct snd_soc_codec *codec,
954 unsigned int reg, unsigned int value)
958 mutex_lock(&codec->cache_rw_mutex);
960 if (codec->cache_ops && codec->cache_ops->write) {
961 ret = codec->cache_ops->write(codec, reg, value);
962 mutex_unlock(&codec->cache_rw_mutex);
966 mutex_unlock(&codec->cache_rw_mutex);
969 EXPORT_SYMBOL_GPL(snd_soc_cache_write);
972 * snd_soc_cache_sync: Sync the register cache with the hardware.
974 * @codec: CODEC to configure.
976 * Any registers that should not be synced should be marked as
977 * volatile. In general drivers can choose not to use the provided
978 * syncing functionality if they so require.
980 int snd_soc_cache_sync(struct snd_soc_codec *codec)
984 if (!codec->cache_sync) {
988 if (codec->cache_ops && codec->cache_ops->sync) {
989 ret = codec->cache_ops->sync(codec);
991 codec->cache_sync = 0;
997 EXPORT_SYMBOL_GPL(snd_soc_cache_sync);