2 * soc-cache.c -- ASoC register cache helpers
4 * Copyright 2009 Wolfson Microelectronics PLC.
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
14 #include <linux/i2c.h>
15 #include <linux/spi/spi.h>
16 #include <sound/soc.h>
17 #include <linux/lzo.h>
18 #include <linux/bitmap.h>
19 #include <linux/rbtree.h>
21 #include <trace/events/asoc.h>
23 static int do_hw_write(struct snd_soc_codec *codec, unsigned int reg,
24 unsigned int value, const void *data, int len)
28 if (!snd_soc_codec_volatile_register(codec, reg) &&
29 reg < codec->driver->reg_cache_size &&
30 !codec->cache_bypass) {
31 ret = snd_soc_cache_write(codec, reg, value);
36 if (codec->cache_only) {
37 codec->cache_sync = 1;
41 ret = codec->hw_write(codec->control_data, data, len);
50 static unsigned int snd_soc_4_12_read(struct snd_soc_codec *codec,
56 if (reg >= codec->driver->reg_cache_size ||
57 snd_soc_codec_volatile_register(codec, reg) ||
58 codec->cache_bypass) {
59 if (codec->cache_only)
62 BUG_ON(!codec->hw_read);
63 return codec->hw_read(codec, reg);
66 ret = snd_soc_cache_read(codec, reg, &val);
72 static int snd_soc_4_12_write(struct snd_soc_codec *codec, unsigned int reg,
77 data[0] = (reg << 4) | ((value >> 8) & 0x000f);
78 data[1] = value & 0x00ff;
80 return do_hw_write(codec, reg, value, data, 2);
83 #if defined(CONFIG_SPI_MASTER)
84 static int snd_soc_4_12_spi_write(void *control_data, const char *data,
87 struct spi_device *spi = control_data;
88 struct spi_transfer t;
99 memset(&t, 0, sizeof t);
104 spi_message_add_tail(&t, &m);
110 #define snd_soc_4_12_spi_write NULL
113 static unsigned int snd_soc_7_9_read(struct snd_soc_codec *codec,
119 if (reg >= codec->driver->reg_cache_size ||
120 snd_soc_codec_volatile_register(codec, reg) ||
121 codec->cache_bypass) {
122 if (codec->cache_only)
125 BUG_ON(!codec->hw_read);
126 return codec->hw_read(codec, reg);
129 ret = snd_soc_cache_read(codec, reg, &val);
135 static int snd_soc_7_9_write(struct snd_soc_codec *codec, unsigned int reg,
140 data[0] = (reg << 1) | ((value >> 8) & 0x0001);
141 data[1] = value & 0x00ff;
143 return do_hw_write(codec, reg, value, data, 2);
146 #if defined(CONFIG_SPI_MASTER)
147 static int snd_soc_7_9_spi_write(void *control_data, const char *data,
150 struct spi_device *spi = control_data;
151 struct spi_transfer t;
152 struct spi_message m;
161 spi_message_init(&m);
162 memset(&t, 0, sizeof t);
167 spi_message_add_tail(&t, &m);
173 #define snd_soc_7_9_spi_write NULL
176 static int snd_soc_8_8_write(struct snd_soc_codec *codec, unsigned int reg,
183 data[1] = value & 0xff;
185 return do_hw_write(codec, reg, value, data, 2);
188 static unsigned int snd_soc_8_8_read(struct snd_soc_codec *codec,
195 if (reg >= codec->driver->reg_cache_size ||
196 snd_soc_codec_volatile_register(codec, reg) ||
197 codec->cache_bypass) {
198 if (codec->cache_only)
201 BUG_ON(!codec->hw_read);
202 return codec->hw_read(codec, reg);
205 ret = snd_soc_cache_read(codec, reg, &val);
211 #if defined(CONFIG_SPI_MASTER)
212 static int snd_soc_8_8_spi_write(void *control_data, const char *data,
215 struct spi_device *spi = control_data;
216 struct spi_transfer t;
217 struct spi_message m;
226 spi_message_init(&m);
227 memset(&t, 0, sizeof t);
232 spi_message_add_tail(&t, &m);
238 #define snd_soc_8_8_spi_write NULL
241 static int snd_soc_8_16_write(struct snd_soc_codec *codec, unsigned int reg,
247 data[1] = (value >> 8) & 0xff;
248 data[2] = value & 0xff;
250 return do_hw_write(codec, reg, value, data, 3);
253 static unsigned int snd_soc_8_16_read(struct snd_soc_codec *codec,
259 if (reg >= codec->driver->reg_cache_size ||
260 snd_soc_codec_volatile_register(codec, reg) ||
261 codec->cache_bypass) {
262 if (codec->cache_only)
265 BUG_ON(!codec->hw_read);
266 return codec->hw_read(codec, reg);
269 ret = snd_soc_cache_read(codec, reg, &val);
275 #if defined(CONFIG_SPI_MASTER)
276 static int snd_soc_8_16_spi_write(void *control_data, const char *data,
279 struct spi_device *spi = control_data;
280 struct spi_transfer t;
281 struct spi_message m;
291 spi_message_init(&m);
292 memset(&t, 0, sizeof t);
297 spi_message_add_tail(&t, &m);
303 #define snd_soc_8_16_spi_write NULL
306 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
307 static unsigned int do_i2c_read(struct snd_soc_codec *codec,
308 void *reg, int reglen,
309 void *data, int datalen)
311 struct i2c_msg xfer[2];
313 struct i2c_client *client = codec->control_data;
316 xfer[0].addr = client->addr;
318 xfer[0].len = reglen;
322 xfer[1].addr = client->addr;
323 xfer[1].flags = I2C_M_RD;
324 xfer[1].len = datalen;
327 ret = i2c_transfer(client->adapter, xfer, 2);
328 dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
338 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
339 static unsigned int snd_soc_8_8_read_i2c(struct snd_soc_codec *codec,
346 ret = do_i2c_read(codec, ®, 1, &data, 1);
352 #define snd_soc_8_8_read_i2c NULL
355 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
356 static unsigned int snd_soc_8_16_read_i2c(struct snd_soc_codec *codec,
363 ret = do_i2c_read(codec, ®, 1, &data, 2);
366 return (data >> 8) | ((data & 0xff) << 8);
369 #define snd_soc_8_16_read_i2c NULL
372 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
373 static unsigned int snd_soc_16_8_read_i2c(struct snd_soc_codec *codec,
380 ret = do_i2c_read(codec, ®, 2, &data, 1);
386 #define snd_soc_16_8_read_i2c NULL
389 static unsigned int snd_soc_16_8_read(struct snd_soc_codec *codec,
396 if (reg >= codec->driver->reg_cache_size ||
397 snd_soc_codec_volatile_register(codec, reg) ||
398 codec->cache_bypass) {
399 if (codec->cache_only)
402 BUG_ON(!codec->hw_read);
403 return codec->hw_read(codec, reg);
406 ret = snd_soc_cache_read(codec, reg, &val);
412 static int snd_soc_16_8_write(struct snd_soc_codec *codec, unsigned int reg,
417 data[0] = (reg >> 8) & 0xff;
418 data[1] = reg & 0xff;
422 return do_hw_write(codec, reg, value, data, 3);
425 #if defined(CONFIG_SPI_MASTER)
426 static int snd_soc_16_8_spi_write(void *control_data, const char *data,
429 struct spi_device *spi = control_data;
430 struct spi_transfer t;
431 struct spi_message m;
441 spi_message_init(&m);
442 memset(&t, 0, sizeof t);
447 spi_message_add_tail(&t, &m);
453 #define snd_soc_16_8_spi_write NULL
456 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
457 static unsigned int snd_soc_16_16_read_i2c(struct snd_soc_codec *codec,
460 u16 reg = cpu_to_be16(r);
464 ret = do_i2c_read(codec, ®, 2, &data, 2);
467 return be16_to_cpu(data);
470 #define snd_soc_16_16_read_i2c NULL
473 static unsigned int snd_soc_16_16_read(struct snd_soc_codec *codec,
479 if (reg >= codec->driver->reg_cache_size ||
480 snd_soc_codec_volatile_register(codec, reg) ||
481 codec->cache_bypass) {
482 if (codec->cache_only)
485 BUG_ON(!codec->hw_read);
486 return codec->hw_read(codec, reg);
489 ret = snd_soc_cache_read(codec, reg, &val);
496 static int snd_soc_16_16_write(struct snd_soc_codec *codec, unsigned int reg,
501 data[0] = (reg >> 8) & 0xff;
502 data[1] = reg & 0xff;
503 data[2] = (value >> 8) & 0xff;
504 data[3] = value & 0xff;
506 return do_hw_write(codec, reg, value, data, 4);
509 #if defined(CONFIG_SPI_MASTER)
510 static int snd_soc_16_16_spi_write(void *control_data, const char *data,
513 struct spi_device *spi = control_data;
514 struct spi_transfer t;
515 struct spi_message m;
526 spi_message_init(&m);
527 memset(&t, 0, sizeof t);
532 spi_message_add_tail(&t, &m);
538 #define snd_soc_16_16_spi_write NULL
541 /* Primitive bulk write support for soc-cache. The data pointed to by `data' needs
542 * to already be in the form the hardware expects including any leading register specific
543 * data. Any data written through this function will not go through the cache as it
544 * only handles writing to volatile or out of bounds registers.
546 static int snd_soc_hw_bulk_write_raw(struct snd_soc_codec *codec, unsigned int reg,
547 const void *data, size_t len)
551 /* Ensure that the base register is volatile. Subsequently
552 * any other register that is touched by this routine should be
553 * volatile as well to ensure that we don't get out of sync with
556 if (!snd_soc_codec_volatile_register(codec, reg)
557 && reg < codec->driver->reg_cache_size)
560 switch (codec->control_type) {
562 ret = i2c_master_send(codec->control_data, data, len);
565 ret = do_spi_write(codec->control_data, data, len);
582 int (*write)(struct snd_soc_codec *codec, unsigned int, unsigned int);
583 int (*spi_write)(void *, const char *, int);
584 unsigned int (*read)(struct snd_soc_codec *, unsigned int);
585 unsigned int (*i2c_read)(struct snd_soc_codec *, unsigned int);
588 .addr_bits = 4, .data_bits = 12,
589 .write = snd_soc_4_12_write, .read = snd_soc_4_12_read,
590 .spi_write = snd_soc_4_12_spi_write,
593 .addr_bits = 7, .data_bits = 9,
594 .write = snd_soc_7_9_write, .read = snd_soc_7_9_read,
595 .spi_write = snd_soc_7_9_spi_write,
598 .addr_bits = 8, .data_bits = 8,
599 .write = snd_soc_8_8_write, .read = snd_soc_8_8_read,
600 .i2c_read = snd_soc_8_8_read_i2c,
601 .spi_write = snd_soc_8_8_spi_write,
604 .addr_bits = 8, .data_bits = 16,
605 .write = snd_soc_8_16_write, .read = snd_soc_8_16_read,
606 .i2c_read = snd_soc_8_16_read_i2c,
607 .spi_write = snd_soc_8_16_spi_write,
610 .addr_bits = 16, .data_bits = 8,
611 .write = snd_soc_16_8_write, .read = snd_soc_16_8_read,
612 .i2c_read = snd_soc_16_8_read_i2c,
613 .spi_write = snd_soc_16_8_spi_write,
616 .addr_bits = 16, .data_bits = 16,
617 .write = snd_soc_16_16_write, .read = snd_soc_16_16_read,
618 .i2c_read = snd_soc_16_16_read_i2c,
619 .spi_write = snd_soc_16_16_spi_write,
624 * snd_soc_codec_set_cache_io: Set up standard I/O functions.
626 * @codec: CODEC to configure.
627 * @type: Type of cache.
628 * @addr_bits: Number of bits of register address data.
629 * @data_bits: Number of bits of data per register.
630 * @control: Control bus used.
632 * Register formats are frequently shared between many I2C and SPI
633 * devices. In order to promote code reuse the ASoC core provides
634 * some standard implementations of CODEC read and write operations
635 * which can be set up using this function.
637 * The caller is responsible for allocating and initialising the
640 * Note that at present this code cannot be used by CODECs with
641 * volatile registers.
643 int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
644 int addr_bits, int data_bits,
645 enum snd_soc_control_type control)
649 for (i = 0; i < ARRAY_SIZE(io_types); i++)
650 if (io_types[i].addr_bits == addr_bits &&
651 io_types[i].data_bits == data_bits)
653 if (i == ARRAY_SIZE(io_types)) {
655 "No I/O functions for %d bit address %d bit data\n",
656 addr_bits, data_bits);
660 codec->write = io_types[i].write;
661 codec->read = io_types[i].read;
662 codec->bulk_write_raw = snd_soc_hw_bulk_write_raw;
669 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
670 codec->hw_write = (hw_write_t)i2c_master_send;
672 if (io_types[i].i2c_read)
673 codec->hw_read = io_types[i].i2c_read;
675 codec->control_data = container_of(codec->dev,
681 if (io_types[i].spi_write)
682 codec->hw_write = io_types[i].spi_write;
684 codec->control_data = container_of(codec->dev,
692 EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);
694 static bool snd_soc_set_cache_val(void *base, unsigned int idx,
695 unsigned int val, unsigned int word_size)
700 if (cache[idx] == val)
707 if (cache[idx] == val)
718 static unsigned int snd_soc_get_cache_val(const void *base, unsigned int idx,
719 unsigned int word_size)
723 const u8 *cache = base;
727 const u16 *cache = base;
737 struct snd_soc_rbtree_node {
742 } __attribute__ ((packed));
744 struct snd_soc_rbtree_ctx {
748 static struct snd_soc_rbtree_node *snd_soc_rbtree_lookup(
749 struct rb_root *root, unsigned int reg)
751 struct rb_node *node;
752 struct snd_soc_rbtree_node *rbnode;
754 node = root->rb_node;
756 rbnode = container_of(node, struct snd_soc_rbtree_node, node);
757 if (rbnode->reg < reg)
758 node = node->rb_left;
759 else if (rbnode->reg > reg)
760 node = node->rb_right;
768 static int snd_soc_rbtree_insert(struct rb_root *root,
769 struct snd_soc_rbtree_node *rbnode)
771 struct rb_node **new, *parent;
772 struct snd_soc_rbtree_node *rbnode_tmp;
775 new = &root->rb_node;
777 rbnode_tmp = container_of(*new, struct snd_soc_rbtree_node,
780 if (rbnode_tmp->reg < rbnode->reg)
781 new = &((*new)->rb_left);
782 else if (rbnode_tmp->reg > rbnode->reg)
783 new = &((*new)->rb_right);
788 /* insert the node into the rbtree */
789 rb_link_node(&rbnode->node, parent, new);
790 rb_insert_color(&rbnode->node, root);
795 static int snd_soc_rbtree_cache_sync(struct snd_soc_codec *codec)
797 struct snd_soc_rbtree_ctx *rbtree_ctx;
798 struct rb_node *node;
799 struct snd_soc_rbtree_node *rbnode;
803 rbtree_ctx = codec->reg_cache;
804 for (node = rb_first(&rbtree_ctx->root); node; node = rb_next(node)) {
805 rbnode = rb_entry(node, struct snd_soc_rbtree_node, node);
806 if (rbnode->value == rbnode->defval)
808 ret = snd_soc_cache_read(codec, rbnode->reg, &val);
811 codec->cache_bypass = 1;
812 ret = snd_soc_write(codec, rbnode->reg, val);
813 codec->cache_bypass = 0;
816 dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
823 static int snd_soc_rbtree_cache_write(struct snd_soc_codec *codec,
824 unsigned int reg, unsigned int value)
826 struct snd_soc_rbtree_ctx *rbtree_ctx;
827 struct snd_soc_rbtree_node *rbnode;
829 rbtree_ctx = codec->reg_cache;
830 rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg);
832 if (rbnode->value == value)
834 rbnode->value = value;
836 /* bail out early, no need to create the rbnode yet */
840 * for uninitialized registers whose value is changed
841 * from the default zero, create an rbnode and insert
844 rbnode = kzalloc(sizeof *rbnode, GFP_KERNEL);
848 rbnode->value = value;
849 snd_soc_rbtree_insert(&rbtree_ctx->root, rbnode);
855 static int snd_soc_rbtree_cache_read(struct snd_soc_codec *codec,
856 unsigned int reg, unsigned int *value)
858 struct snd_soc_rbtree_ctx *rbtree_ctx;
859 struct snd_soc_rbtree_node *rbnode;
861 rbtree_ctx = codec->reg_cache;
862 rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg);
864 *value = rbnode->value;
866 /* uninitialized registers default to 0 */
873 static int snd_soc_rbtree_cache_exit(struct snd_soc_codec *codec)
875 struct rb_node *next;
876 struct snd_soc_rbtree_ctx *rbtree_ctx;
877 struct snd_soc_rbtree_node *rbtree_node;
879 /* if we've already been called then just return */
880 rbtree_ctx = codec->reg_cache;
884 /* free up the rbtree */
885 next = rb_first(&rbtree_ctx->root);
887 rbtree_node = rb_entry(next, struct snd_soc_rbtree_node, node);
888 next = rb_next(&rbtree_node->node);
889 rb_erase(&rbtree_node->node, &rbtree_ctx->root);
893 /* release the resources */
894 kfree(codec->reg_cache);
895 codec->reg_cache = NULL;
900 static int snd_soc_rbtree_cache_init(struct snd_soc_codec *codec)
902 struct snd_soc_rbtree_node *rbtree_node;
903 struct snd_soc_rbtree_ctx *rbtree_ctx;
905 unsigned int word_size;
909 codec->reg_cache = kmalloc(sizeof *rbtree_ctx, GFP_KERNEL);
910 if (!codec->reg_cache)
913 rbtree_ctx = codec->reg_cache;
914 rbtree_ctx->root = RB_ROOT;
916 if (!codec->reg_def_copy)
920 * populate the rbtree with the initialized registers. All other
921 * registers will be inserted when they are first modified.
923 word_size = codec->driver->reg_word_size;
924 for (i = 0; i < codec->driver->reg_cache_size; ++i) {
925 val = snd_soc_get_cache_val(codec->reg_def_copy, i, word_size);
928 rbtree_node = kzalloc(sizeof *rbtree_node, GFP_KERNEL);
931 snd_soc_cache_exit(codec);
934 rbtree_node->reg = i;
935 rbtree_node->value = val;
936 rbtree_node->defval = val;
937 snd_soc_rbtree_insert(&rbtree_ctx->root, rbtree_node);
943 #ifdef CONFIG_SND_SOC_CACHE_LZO
944 struct snd_soc_lzo_ctx {
950 size_t decompressed_size;
951 unsigned long *sync_bmp;
955 #define LZO_BLOCK_NUM 8
956 static int snd_soc_lzo_block_count(void)
958 return LZO_BLOCK_NUM;
961 static int snd_soc_lzo_prepare(struct snd_soc_lzo_ctx *lzo_ctx)
963 lzo_ctx->wmem = kmalloc(LZO1X_MEM_COMPRESS, GFP_KERNEL);
969 static int snd_soc_lzo_compress(struct snd_soc_lzo_ctx *lzo_ctx)
971 size_t compress_size;
974 ret = lzo1x_1_compress(lzo_ctx->src, lzo_ctx->src_len,
975 lzo_ctx->dst, &compress_size, lzo_ctx->wmem);
976 if (ret != LZO_E_OK || compress_size > lzo_ctx->dst_len)
978 lzo_ctx->dst_len = compress_size;
982 static int snd_soc_lzo_decompress(struct snd_soc_lzo_ctx *lzo_ctx)
987 dst_len = lzo_ctx->dst_len;
988 ret = lzo1x_decompress_safe(lzo_ctx->src, lzo_ctx->src_len,
989 lzo_ctx->dst, &dst_len);
990 if (ret != LZO_E_OK || dst_len != lzo_ctx->dst_len)
995 static int snd_soc_lzo_compress_cache_block(struct snd_soc_codec *codec,
996 struct snd_soc_lzo_ctx *lzo_ctx)
1000 lzo_ctx->dst_len = lzo1x_worst_compress(PAGE_SIZE);
1001 lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL);
1002 if (!lzo_ctx->dst) {
1003 lzo_ctx->dst_len = 0;
1007 ret = snd_soc_lzo_compress(lzo_ctx);
1013 static int snd_soc_lzo_decompress_cache_block(struct snd_soc_codec *codec,
1014 struct snd_soc_lzo_ctx *lzo_ctx)
1018 lzo_ctx->dst_len = lzo_ctx->decompressed_size;
1019 lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL);
1020 if (!lzo_ctx->dst) {
1021 lzo_ctx->dst_len = 0;
1025 ret = snd_soc_lzo_decompress(lzo_ctx);
1031 static inline int snd_soc_lzo_get_blkindex(struct snd_soc_codec *codec,
1034 const struct snd_soc_codec_driver *codec_drv;
1036 codec_drv = codec->driver;
1037 return (reg * codec_drv->reg_word_size) /
1038 DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count());
1041 static inline int snd_soc_lzo_get_blkpos(struct snd_soc_codec *codec,
1044 const struct snd_soc_codec_driver *codec_drv;
1046 codec_drv = codec->driver;
1047 return reg % (DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count()) /
1048 codec_drv->reg_word_size);
1051 static inline int snd_soc_lzo_get_blksize(struct snd_soc_codec *codec)
1053 const struct snd_soc_codec_driver *codec_drv;
1055 codec_drv = codec->driver;
1056 return DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count());
1059 static int snd_soc_lzo_cache_sync(struct snd_soc_codec *codec)
1061 struct snd_soc_lzo_ctx **lzo_blocks;
1066 lzo_blocks = codec->reg_cache;
1067 for_each_set_bit(i, lzo_blocks[0]->sync_bmp, lzo_blocks[0]->sync_bmp_nbits) {
1068 ret = snd_soc_cache_read(codec, i, &val);
1071 codec->cache_bypass = 1;
1072 ret = snd_soc_write(codec, i, val);
1073 codec->cache_bypass = 0;
1076 dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
1083 static int snd_soc_lzo_cache_write(struct snd_soc_codec *codec,
1084 unsigned int reg, unsigned int value)
1086 struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks;
1087 int ret, blkindex, blkpos;
1088 size_t blksize, tmp_dst_len;
1091 /* index of the compressed lzo block */
1092 blkindex = snd_soc_lzo_get_blkindex(codec, reg);
1093 /* register index within the decompressed block */
1094 blkpos = snd_soc_lzo_get_blkpos(codec, reg);
1095 /* size of the compressed block */
1096 blksize = snd_soc_lzo_get_blksize(codec);
1097 lzo_blocks = codec->reg_cache;
1098 lzo_block = lzo_blocks[blkindex];
1100 /* save the pointer and length of the compressed block */
1101 tmp_dst = lzo_block->dst;
1102 tmp_dst_len = lzo_block->dst_len;
1104 /* prepare the source to be the compressed block */
1105 lzo_block->src = lzo_block->dst;
1106 lzo_block->src_len = lzo_block->dst_len;
1108 /* decompress the block */
1109 ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block);
1111 kfree(lzo_block->dst);
1115 /* write the new value to the cache */
1116 if (snd_soc_set_cache_val(lzo_block->dst, blkpos, value,
1117 codec->driver->reg_word_size)) {
1118 kfree(lzo_block->dst);
1122 /* prepare the source to be the decompressed block */
1123 lzo_block->src = lzo_block->dst;
1124 lzo_block->src_len = lzo_block->dst_len;
1126 /* compress the block */
1127 ret = snd_soc_lzo_compress_cache_block(codec, lzo_block);
1129 kfree(lzo_block->dst);
1130 kfree(lzo_block->src);
1134 /* set the bit so we know we have to sync this register */
1135 set_bit(reg, lzo_block->sync_bmp);
1137 kfree(lzo_block->src);
1140 lzo_block->dst = tmp_dst;
1141 lzo_block->dst_len = tmp_dst_len;
1145 static int snd_soc_lzo_cache_read(struct snd_soc_codec *codec,
1146 unsigned int reg, unsigned int *value)
1148 struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks;
1149 int ret, blkindex, blkpos;
1150 size_t blksize, tmp_dst_len;
1154 /* index of the compressed lzo block */
1155 blkindex = snd_soc_lzo_get_blkindex(codec, reg);
1156 /* register index within the decompressed block */
1157 blkpos = snd_soc_lzo_get_blkpos(codec, reg);
1158 /* size of the compressed block */
1159 blksize = snd_soc_lzo_get_blksize(codec);
1160 lzo_blocks = codec->reg_cache;
1161 lzo_block = lzo_blocks[blkindex];
1163 /* save the pointer and length of the compressed block */
1164 tmp_dst = lzo_block->dst;
1165 tmp_dst_len = lzo_block->dst_len;
1167 /* prepare the source to be the compressed block */
1168 lzo_block->src = lzo_block->dst;
1169 lzo_block->src_len = lzo_block->dst_len;
1171 /* decompress the block */
1172 ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block);
1174 /* fetch the value from the cache */
1175 *value = snd_soc_get_cache_val(lzo_block->dst, blkpos,
1176 codec->driver->reg_word_size);
1178 kfree(lzo_block->dst);
1179 /* restore the pointer and length of the compressed block */
1180 lzo_block->dst = tmp_dst;
1181 lzo_block->dst_len = tmp_dst_len;
1185 static int snd_soc_lzo_cache_exit(struct snd_soc_codec *codec)
1187 struct snd_soc_lzo_ctx **lzo_blocks;
1190 lzo_blocks = codec->reg_cache;
1194 blkcount = snd_soc_lzo_block_count();
1196 * the pointer to the bitmap used for syncing the cache
1197 * is shared amongst all lzo_blocks. Ensure it is freed
1201 kfree(lzo_blocks[0]->sync_bmp);
1202 for (i = 0; i < blkcount; ++i) {
1203 if (lzo_blocks[i]) {
1204 kfree(lzo_blocks[i]->wmem);
1205 kfree(lzo_blocks[i]->dst);
1207 /* each lzo_block is a pointer returned by kmalloc or NULL */
1208 kfree(lzo_blocks[i]);
1211 codec->reg_cache = NULL;
1215 static int snd_soc_lzo_cache_init(struct snd_soc_codec *codec)
1217 struct snd_soc_lzo_ctx **lzo_blocks;
1219 const struct snd_soc_codec_driver *codec_drv;
1220 int ret, tofree, i, blksize, blkcount;
1221 const char *p, *end;
1222 unsigned long *sync_bmp;
1225 codec_drv = codec->driver;
1228 * If we have not been given a default register cache
1229 * then allocate a dummy zero-ed out region, compress it
1230 * and remember to free it afterwards.
1233 if (!codec->reg_def_copy)
1236 if (!codec->reg_def_copy) {
1237 codec->reg_def_copy = kzalloc(codec->reg_size, GFP_KERNEL);
1238 if (!codec->reg_def_copy)
1242 blkcount = snd_soc_lzo_block_count();
1243 codec->reg_cache = kzalloc(blkcount * sizeof *lzo_blocks,
1245 if (!codec->reg_cache) {
1249 lzo_blocks = codec->reg_cache;
1252 * allocate a bitmap to be used when syncing the cache with
1253 * the hardware. Each time a register is modified, the corresponding
1254 * bit is set in the bitmap, so we know that we have to sync
1257 bmp_size = codec_drv->reg_cache_size;
1258 sync_bmp = kmalloc(BITS_TO_LONGS(bmp_size) * sizeof(long),
1264 bitmap_zero(sync_bmp, bmp_size);
1266 /* allocate the lzo blocks and initialize them */
1267 for (i = 0; i < blkcount; ++i) {
1268 lzo_blocks[i] = kzalloc(sizeof **lzo_blocks,
1270 if (!lzo_blocks[i]) {
1275 lzo_blocks[i]->sync_bmp = sync_bmp;
1276 lzo_blocks[i]->sync_bmp_nbits = bmp_size;
1277 /* alloc the working space for the compressed block */
1278 ret = snd_soc_lzo_prepare(lzo_blocks[i]);
1283 blksize = snd_soc_lzo_get_blksize(codec);
1284 p = codec->reg_def_copy;
1285 end = codec->reg_def_copy + codec->reg_size;
1286 /* compress the register map and fill the lzo blocks */
1287 for (i = 0; i < blkcount; ++i, p += blksize) {
1288 lzo_blocks[i]->src = p;
1289 if (p + blksize > end)
1290 lzo_blocks[i]->src_len = end - p;
1292 lzo_blocks[i]->src_len = blksize;
1293 ret = snd_soc_lzo_compress_cache_block(codec,
1297 lzo_blocks[i]->decompressed_size =
1298 lzo_blocks[i]->src_len;
1302 kfree(codec->reg_def_copy);
1303 codec->reg_def_copy = NULL;
1307 snd_soc_cache_exit(codec);
1310 kfree(codec->reg_def_copy);
1311 codec->reg_def_copy = NULL;
1317 static int snd_soc_flat_cache_sync(struct snd_soc_codec *codec)
1321 const struct snd_soc_codec_driver *codec_drv;
1324 codec_drv = codec->driver;
1325 for (i = 0; i < codec_drv->reg_cache_size; ++i) {
1326 ret = snd_soc_cache_read(codec, i, &val);
1329 if (codec->reg_def_copy)
1330 if (snd_soc_get_cache_val(codec->reg_def_copy,
1331 i, codec_drv->reg_word_size) == val)
1333 ret = snd_soc_write(codec, i, val);
1336 dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
1342 static int snd_soc_flat_cache_write(struct snd_soc_codec *codec,
1343 unsigned int reg, unsigned int value)
1345 snd_soc_set_cache_val(codec->reg_cache, reg, value,
1346 codec->driver->reg_word_size);
1350 static int snd_soc_flat_cache_read(struct snd_soc_codec *codec,
1351 unsigned int reg, unsigned int *value)
1353 *value = snd_soc_get_cache_val(codec->reg_cache, reg,
1354 codec->driver->reg_word_size);
1358 static int snd_soc_flat_cache_exit(struct snd_soc_codec *codec)
1360 if (!codec->reg_cache)
1362 kfree(codec->reg_cache);
1363 codec->reg_cache = NULL;
1367 static int snd_soc_flat_cache_init(struct snd_soc_codec *codec)
1369 const struct snd_soc_codec_driver *codec_drv;
1371 codec_drv = codec->driver;
1373 if (codec->reg_def_copy)
1374 codec->reg_cache = kmemdup(codec->reg_def_copy,
1375 codec->reg_size, GFP_KERNEL);
1377 codec->reg_cache = kzalloc(codec->reg_size, GFP_KERNEL);
1378 if (!codec->reg_cache)
1384 /* an array of all supported compression types */
1385 static const struct snd_soc_cache_ops cache_types[] = {
1386 /* Flat *must* be the first entry for fallback */
1388 .id = SND_SOC_FLAT_COMPRESSION,
1390 .init = snd_soc_flat_cache_init,
1391 .exit = snd_soc_flat_cache_exit,
1392 .read = snd_soc_flat_cache_read,
1393 .write = snd_soc_flat_cache_write,
1394 .sync = snd_soc_flat_cache_sync
1396 #ifdef CONFIG_SND_SOC_CACHE_LZO
1398 .id = SND_SOC_LZO_COMPRESSION,
1400 .init = snd_soc_lzo_cache_init,
1401 .exit = snd_soc_lzo_cache_exit,
1402 .read = snd_soc_lzo_cache_read,
1403 .write = snd_soc_lzo_cache_write,
1404 .sync = snd_soc_lzo_cache_sync
1408 .id = SND_SOC_RBTREE_COMPRESSION,
1410 .init = snd_soc_rbtree_cache_init,
1411 .exit = snd_soc_rbtree_cache_exit,
1412 .read = snd_soc_rbtree_cache_read,
1413 .write = snd_soc_rbtree_cache_write,
1414 .sync = snd_soc_rbtree_cache_sync
1418 int snd_soc_cache_init(struct snd_soc_codec *codec)
1422 for (i = 0; i < ARRAY_SIZE(cache_types); ++i)
1423 if (cache_types[i].id == codec->compress_type)
1426 /* Fall back to flat compression */
1427 if (i == ARRAY_SIZE(cache_types)) {
1428 dev_warn(codec->dev, "Could not match compress type: %d\n",
1429 codec->compress_type);
1433 mutex_init(&codec->cache_rw_mutex);
1434 codec->cache_ops = &cache_types[i];
1436 if (codec->cache_ops->init) {
1437 if (codec->cache_ops->name)
1438 dev_dbg(codec->dev, "Initializing %s cache for %s codec\n",
1439 codec->cache_ops->name, codec->name);
1440 return codec->cache_ops->init(codec);
1446 * NOTE: keep in mind that this function might be called
1449 int snd_soc_cache_exit(struct snd_soc_codec *codec)
1451 if (codec->cache_ops && codec->cache_ops->exit) {
1452 if (codec->cache_ops->name)
1453 dev_dbg(codec->dev, "Destroying %s cache for %s codec\n",
1454 codec->cache_ops->name, codec->name);
1455 return codec->cache_ops->exit(codec);
1461 * snd_soc_cache_read: Fetch the value of a given register from the cache.
1463 * @codec: CODEC to configure.
1464 * @reg: The register index.
1465 * @value: The value to be returned.
1467 int snd_soc_cache_read(struct snd_soc_codec *codec,
1468 unsigned int reg, unsigned int *value)
1472 mutex_lock(&codec->cache_rw_mutex);
1474 if (value && codec->cache_ops && codec->cache_ops->read) {
1475 ret = codec->cache_ops->read(codec, reg, value);
1476 mutex_unlock(&codec->cache_rw_mutex);
1480 mutex_unlock(&codec->cache_rw_mutex);
1483 EXPORT_SYMBOL_GPL(snd_soc_cache_read);
1486 * snd_soc_cache_write: Set the value of a given register in the cache.
1488 * @codec: CODEC to configure.
1489 * @reg: The register index.
1490 * @value: The new register value.
1492 int snd_soc_cache_write(struct snd_soc_codec *codec,
1493 unsigned int reg, unsigned int value)
1497 mutex_lock(&codec->cache_rw_mutex);
1499 if (codec->cache_ops && codec->cache_ops->write) {
1500 ret = codec->cache_ops->write(codec, reg, value);
1501 mutex_unlock(&codec->cache_rw_mutex);
1505 mutex_unlock(&codec->cache_rw_mutex);
1508 EXPORT_SYMBOL_GPL(snd_soc_cache_write);
1511 * snd_soc_cache_sync: Sync the register cache with the hardware.
1513 * @codec: CODEC to configure.
1515 * Any registers that should not be synced should be marked as
1516 * volatile. In general drivers can choose not to use the provided
1517 * syncing functionality if they so require.
1519 int snd_soc_cache_sync(struct snd_soc_codec *codec)
1524 if (!codec->cache_sync) {
1528 if (!codec->cache_ops || !codec->cache_ops->sync)
1531 if (codec->cache_ops->name)
1532 name = codec->cache_ops->name;
1536 if (codec->cache_ops->name)
1537 dev_dbg(codec->dev, "Syncing %s cache for %s codec\n",
1538 codec->cache_ops->name, codec->name);
1539 trace_snd_soc_cache_sync(codec, name, "start");
1540 ret = codec->cache_ops->sync(codec);
1542 codec->cache_sync = 0;
1543 trace_snd_soc_cache_sync(codec, name, "end");
1546 EXPORT_SYMBOL_GPL(snd_soc_cache_sync);
1548 static int snd_soc_get_reg_access_index(struct snd_soc_codec *codec,
1551 const struct snd_soc_codec_driver *codec_drv;
1552 unsigned int min, max, index;
1554 codec_drv = codec->driver;
1556 max = codec_drv->reg_access_size - 1;
1558 index = (min + max) / 2;
1559 if (codec_drv->reg_access_default[index].reg == reg)
1561 if (codec_drv->reg_access_default[index].reg < reg)
1565 } while (min <= max);
1569 int snd_soc_default_volatile_register(struct snd_soc_codec *codec,
1574 if (reg >= codec->driver->reg_cache_size)
1576 index = snd_soc_get_reg_access_index(codec, reg);
1579 return codec->driver->reg_access_default[index].vol;
1581 EXPORT_SYMBOL_GPL(snd_soc_default_volatile_register);
1583 int snd_soc_default_readable_register(struct snd_soc_codec *codec,
1588 if (reg >= codec->driver->reg_cache_size)
1590 index = snd_soc_get_reg_access_index(codec, reg);
1593 return codec->driver->reg_access_default[index].read;
1595 EXPORT_SYMBOL_GPL(snd_soc_default_readable_register);