2 * Fifo-attached Serial Interface (FSI) support for SH7724
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
8 * Copyright (c) 2007 Manuel Lauss <mano@roarinelk.homelinux.net>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/delay.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/pm_runtime.h>
20 #include <linux/of_device.h>
21 #include <linux/scatterlist.h>
22 #include <linux/sh_dma.h>
23 #include <linux/slab.h>
24 #include <linux/module.h>
25 #include <linux/workqueue.h>
26 #include <sound/soc.h>
27 #include <sound/pcm_params.h>
28 #include <sound/sh_fsi.h>
30 /* PortA/PortB register */
31 #define REG_DO_FMT 0x0000
32 #define REG_DOFF_CTL 0x0004
33 #define REG_DOFF_ST 0x0008
34 #define REG_DI_FMT 0x000C
35 #define REG_DIFF_CTL 0x0010
36 #define REG_DIFF_ST 0x0014
37 #define REG_CKG1 0x0018
38 #define REG_CKG2 0x001C
39 #define REG_DIDT 0x0020
40 #define REG_DODT 0x0024
41 #define REG_MUTE_ST 0x0028
42 #define REG_OUT_DMAC 0x002C
43 #define REG_OUT_SEL 0x0030
44 #define REG_IN_DMAC 0x0038
47 #define MST_CLK_RST 0x0210
48 #define MST_SOFT_RST 0x0214
49 #define MST_FIFO_SZ 0x0218
51 /* core register (depend on FSI version) */
52 #define A_MST_CTLR 0x0180
53 #define B_MST_CTLR 0x01A0
54 #define CPU_INT_ST 0x01F4
55 #define CPU_IEMSK 0x01F8
56 #define CPU_IMSK 0x01FC
63 #define CR_BWS_MASK (0x3 << 20) /* FSI2 */
64 #define CR_BWS_24 (0x0 << 20) /* FSI2 */
65 #define CR_BWS_16 (0x1 << 20) /* FSI2 */
66 #define CR_BWS_20 (0x2 << 20) /* FSI2 */
68 #define CR_DTMD_PCM (0x0 << 8) /* FSI2 */
69 #define CR_DTMD_SPDIF_PCM (0x1 << 8) /* FSI2 */
70 #define CR_DTMD_SPDIF_STREAM (0x2 << 8) /* FSI2 */
72 #define CR_MONO (0x0 << 4)
73 #define CR_MONO_D (0x1 << 4)
74 #define CR_PCM (0x2 << 4)
75 #define CR_I2S (0x3 << 4)
76 #define CR_TDM (0x4 << 4)
77 #define CR_TDM_D (0x5 << 4)
81 #define VDMD_MASK (0x3 << 4)
82 #define VDMD_FRONT (0x0 << 4) /* Package in front */
83 #define VDMD_BACK (0x1 << 4) /* Package in back */
84 #define VDMD_STREAM (0x2 << 4) /* Stream mode(16bit * 2) */
86 #define DMA_ON (0x1 << 0)
90 #define IRQ_HALF 0x00100000
91 #define FIFO_CLR 0x00000001
94 #define ERR_OVER 0x00000010
95 #define ERR_UNDER 0x00000001
96 #define ST_ERR (ERR_OVER | ERR_UNDER)
99 #define ACKMD_MASK 0x00007000
100 #define BPFMD_MASK 0x00000700
101 #define DIMD (1 << 4)
102 #define DOMD (1 << 0)
105 #define BP (1 << 4) /* Fix the signal of Biphase output */
106 #define SE (1 << 0) /* Fix the master clock */
112 /* IO SHIFT / MACRO */
117 #define AB_IO(param, shift) (param << shift)
120 #define PBSR (1 << 12) /* Port B Software Reset */
121 #define PASR (1 << 8) /* Port A Software Reset */
122 #define IR (1 << 4) /* Interrupt Reset */
123 #define FSISR (1 << 0) /* Software Reset */
126 #define DMMD (1 << 4) /* SPDIF output timing 0: Biphase only */
127 /* 1: Biphase and serial */
130 #define FIFO_SZ_MASK 0x7
132 #define FSI_RATES SNDRV_PCM_RATE_8000_96000
134 #define FSI_FMTS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE)
141 * A : sample widtht 16bit setting
142 * B : sample widtht 24bit setting
145 #define SHIFT_16DATA 0
146 #define SHIFT_24DATA 4
148 #define PACKAGE_24BITBUS_BACK 0
149 #define PACKAGE_24BITBUS_FRONT 1
150 #define PACKAGE_16BITBUS_STREAM 2
152 #define BUSOP_SET(s, a) ((a) << SHIFT_ ## s ## DATA)
153 #define BUSOP_GET(s, a) (((a) >> SHIFT_ ## s ## DATA) & 0xF)
156 * FSI driver use below type name for variable
158 * xxx_num : number of data
159 * xxx_pos : position of data
160 * xxx_capa : capacity of data
164 * period/frame/sample image
168 * period pos period pos
170 * |<-------------------- period--------------------->|
171 * ==|============================================ ... =|==
173 * ||<----- frame ----->|<------ frame ----->| ... |
174 * |+--------------------+--------------------+- ... |
175 * ||[ sample ][ sample ]|[ sample ][ sample ]| ... |
176 * |+--------------------+--------------------+- ... |
177 * ==|============================================ ... =|==
195 * FSIxCLK [CPG] (ick) -------> |
196 * |-> FSI_DIV (div)-> FSI2
197 * FSIxCK [external] (xck) ---> |
204 struct fsi_stream_handler;
208 * these are initialized by fsi_stream_init()
210 struct snd_pcm_substream *substream;
211 int fifo_sample_capa; /* sample capacity of FSI FIFO */
212 int buff_sample_capa; /* sample capacity of ALSA buffer */
213 int buff_sample_pos; /* sample position of ALSA buffer */
214 int period_samples; /* sample number / 1 period */
215 int period_pos; /* current period position */
216 int sample_width; /* sample width */
226 * thse are initialized by fsi_handler_init()
228 struct fsi_stream_handler *handler;
229 struct fsi_priv *priv;
232 * these are for DMAEngine
234 struct dma_chan *chan;
239 /* see [FSI clock] */
244 int (*set_rate)(struct device *dev,
245 struct fsi_priv *fsi);
253 struct fsi_master *master;
255 struct fsi_stream playback;
256 struct fsi_stream capture;
258 struct fsi_clk clock;
263 unsigned int clk_master:1;
264 unsigned int clk_cpg:1;
265 unsigned int spdif:1;
266 unsigned int enable_stream:1;
267 unsigned int bit_clk_inv:1;
268 unsigned int lr_clk_inv:1;
271 struct fsi_stream_handler {
272 int (*init)(struct fsi_priv *fsi, struct fsi_stream *io);
273 int (*quit)(struct fsi_priv *fsi, struct fsi_stream *io);
274 int (*probe)(struct fsi_priv *fsi, struct fsi_stream *io, struct device *dev);
275 int (*transfer)(struct fsi_priv *fsi, struct fsi_stream *io);
276 int (*remove)(struct fsi_priv *fsi, struct fsi_stream *io);
277 int (*start_stop)(struct fsi_priv *fsi, struct fsi_stream *io,
280 #define fsi_stream_handler_call(io, func, args...) \
282 !((io)->handler->func) ? 0 : \
283 (io)->handler->func(args))
297 struct fsi_priv fsia;
298 struct fsi_priv fsib;
299 const struct fsi_core *core;
303 static int fsi_stream_is_play(struct fsi_priv *fsi, struct fsi_stream *io);
306 * basic read write function
309 static void __fsi_reg_write(u32 __iomem *reg, u32 data)
311 /* valid data area is 24bit */
314 __raw_writel(data, reg);
317 static u32 __fsi_reg_read(u32 __iomem *reg)
319 return __raw_readl(reg);
322 static void __fsi_reg_mask_set(u32 __iomem *reg, u32 mask, u32 data)
324 u32 val = __fsi_reg_read(reg);
329 __fsi_reg_write(reg, val);
332 #define fsi_reg_write(p, r, d)\
333 __fsi_reg_write((p->base + REG_##r), d)
335 #define fsi_reg_read(p, r)\
336 __fsi_reg_read((p->base + REG_##r))
338 #define fsi_reg_mask_set(p, r, m, d)\
339 __fsi_reg_mask_set((p->base + REG_##r), m, d)
341 #define fsi_master_read(p, r) _fsi_master_read(p, MST_##r)
342 #define fsi_core_read(p, r) _fsi_master_read(p, p->core->r)
343 static u32 _fsi_master_read(struct fsi_master *master, u32 reg)
348 spin_lock_irqsave(&master->lock, flags);
349 ret = __fsi_reg_read(master->base + reg);
350 spin_unlock_irqrestore(&master->lock, flags);
355 #define fsi_master_mask_set(p, r, m, d) _fsi_master_mask_set(p, MST_##r, m, d)
356 #define fsi_core_mask_set(p, r, m, d) _fsi_master_mask_set(p, p->core->r, m, d)
357 static void _fsi_master_mask_set(struct fsi_master *master,
358 u32 reg, u32 mask, u32 data)
362 spin_lock_irqsave(&master->lock, flags);
363 __fsi_reg_mask_set(master->base + reg, mask, data);
364 spin_unlock_irqrestore(&master->lock, flags);
370 static int fsi_version(struct fsi_master *master)
372 return master->core->ver;
375 static struct fsi_master *fsi_get_master(struct fsi_priv *fsi)
380 static int fsi_is_clk_master(struct fsi_priv *fsi)
382 return fsi->clk_master;
385 static int fsi_is_port_a(struct fsi_priv *fsi)
387 return fsi->master->base == fsi->base;
390 static int fsi_is_spdif(struct fsi_priv *fsi)
395 static int fsi_is_enable_stream(struct fsi_priv *fsi)
397 return fsi->enable_stream;
400 static int fsi_is_play(struct snd_pcm_substream *substream)
402 return substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
405 static struct snd_soc_dai *fsi_get_dai(struct snd_pcm_substream *substream)
407 struct snd_soc_pcm_runtime *rtd = substream->private_data;
412 static struct fsi_priv *fsi_get_priv_frm_dai(struct snd_soc_dai *dai)
414 struct fsi_master *master = snd_soc_dai_get_drvdata(dai);
417 return &master->fsia;
419 return &master->fsib;
422 static struct fsi_priv *fsi_get_priv(struct snd_pcm_substream *substream)
424 return fsi_get_priv_frm_dai(fsi_get_dai(substream));
427 static u32 fsi_get_port_shift(struct fsi_priv *fsi, struct fsi_stream *io)
429 int is_play = fsi_stream_is_play(fsi, io);
430 int is_porta = fsi_is_port_a(fsi);
434 shift = is_play ? AO_SHIFT : AI_SHIFT;
436 shift = is_play ? BO_SHIFT : BI_SHIFT;
441 static int fsi_frame2sample(struct fsi_priv *fsi, int frames)
443 return frames * fsi->chan_num;
446 static int fsi_sample2frame(struct fsi_priv *fsi, int samples)
448 return samples / fsi->chan_num;
451 static int fsi_get_current_fifo_samples(struct fsi_priv *fsi,
452 struct fsi_stream *io)
454 int is_play = fsi_stream_is_play(fsi, io);
459 fsi_reg_read(fsi, DOFF_ST) :
460 fsi_reg_read(fsi, DIFF_ST);
462 frames = 0x1ff & (status >> 8);
464 return fsi_frame2sample(fsi, frames);
467 static void fsi_count_fifo_err(struct fsi_priv *fsi)
469 u32 ostatus = fsi_reg_read(fsi, DOFF_ST);
470 u32 istatus = fsi_reg_read(fsi, DIFF_ST);
472 if (ostatus & ERR_OVER)
473 fsi->playback.oerr_num++;
475 if (ostatus & ERR_UNDER)
476 fsi->playback.uerr_num++;
478 if (istatus & ERR_OVER)
479 fsi->capture.oerr_num++;
481 if (istatus & ERR_UNDER)
482 fsi->capture.uerr_num++;
484 fsi_reg_write(fsi, DOFF_ST, 0);
485 fsi_reg_write(fsi, DIFF_ST, 0);
489 * fsi_stream_xx() function
491 static inline int fsi_stream_is_play(struct fsi_priv *fsi,
492 struct fsi_stream *io)
494 return &fsi->playback == io;
497 static inline struct fsi_stream *fsi_stream_get(struct fsi_priv *fsi,
498 struct snd_pcm_substream *substream)
500 return fsi_is_play(substream) ? &fsi->playback : &fsi->capture;
503 static int fsi_stream_is_working(struct fsi_priv *fsi,
504 struct fsi_stream *io)
506 struct fsi_master *master = fsi_get_master(fsi);
510 spin_lock_irqsave(&master->lock, flags);
511 ret = !!(io->substream && io->substream->runtime);
512 spin_unlock_irqrestore(&master->lock, flags);
517 static struct fsi_priv *fsi_stream_to_priv(struct fsi_stream *io)
522 static void fsi_stream_init(struct fsi_priv *fsi,
523 struct fsi_stream *io,
524 struct snd_pcm_substream *substream)
526 struct snd_pcm_runtime *runtime = substream->runtime;
527 struct fsi_master *master = fsi_get_master(fsi);
530 spin_lock_irqsave(&master->lock, flags);
531 io->substream = substream;
532 io->buff_sample_capa = fsi_frame2sample(fsi, runtime->buffer_size);
533 io->buff_sample_pos = 0;
534 io->period_samples = fsi_frame2sample(fsi, runtime->period_size);
536 io->sample_width = samples_to_bytes(runtime, 1);
538 io->oerr_num = -1; /* ignore 1st err */
539 io->uerr_num = -1; /* ignore 1st err */
540 fsi_stream_handler_call(io, init, fsi, io);
541 spin_unlock_irqrestore(&master->lock, flags);
544 static void fsi_stream_quit(struct fsi_priv *fsi, struct fsi_stream *io)
546 struct snd_soc_dai *dai = fsi_get_dai(io->substream);
547 struct fsi_master *master = fsi_get_master(fsi);
550 spin_lock_irqsave(&master->lock, flags);
552 if (io->oerr_num > 0)
553 dev_err(dai->dev, "over_run = %d\n", io->oerr_num);
555 if (io->uerr_num > 0)
556 dev_err(dai->dev, "under_run = %d\n", io->uerr_num);
558 fsi_stream_handler_call(io, quit, fsi, io);
559 io->substream = NULL;
560 io->buff_sample_capa = 0;
561 io->buff_sample_pos = 0;
562 io->period_samples = 0;
564 io->sample_width = 0;
568 spin_unlock_irqrestore(&master->lock, flags);
571 static int fsi_stream_transfer(struct fsi_stream *io)
573 struct fsi_priv *fsi = fsi_stream_to_priv(io);
577 return fsi_stream_handler_call(io, transfer, fsi, io);
580 #define fsi_stream_start(fsi, io)\
581 fsi_stream_handler_call(io, start_stop, fsi, io, 1)
583 #define fsi_stream_stop(fsi, io)\
584 fsi_stream_handler_call(io, start_stop, fsi, io, 0)
586 static int fsi_stream_probe(struct fsi_priv *fsi, struct device *dev)
588 struct fsi_stream *io;
592 ret1 = fsi_stream_handler_call(io, probe, fsi, io, dev);
595 ret2 = fsi_stream_handler_call(io, probe, fsi, io, dev);
605 static int fsi_stream_remove(struct fsi_priv *fsi)
607 struct fsi_stream *io;
611 ret1 = fsi_stream_handler_call(io, remove, fsi, io);
614 ret2 = fsi_stream_handler_call(io, remove, fsi, io);
625 * format/bus/dma setting
627 static void fsi_format_bus_setup(struct fsi_priv *fsi, struct fsi_stream *io,
628 u32 bus, struct device *dev)
630 struct fsi_master *master = fsi_get_master(fsi);
631 int is_play = fsi_stream_is_play(fsi, io);
634 if (fsi_version(master) >= 2) {
638 * FSI2 needs DMA/Bus setting
641 case PACKAGE_24BITBUS_FRONT:
644 dev_dbg(dev, "24bit bus / package in front\n");
646 case PACKAGE_16BITBUS_STREAM:
649 dev_dbg(dev, "16bit bus / stream mode\n");
651 case PACKAGE_24BITBUS_BACK:
655 dev_dbg(dev, "24bit bus / package in back\n");
660 fsi_reg_write(fsi, OUT_DMAC, dma);
662 fsi_reg_write(fsi, IN_DMAC, dma);
666 fsi_reg_write(fsi, DO_FMT, fmt);
668 fsi_reg_write(fsi, DI_FMT, fmt);
675 static void fsi_irq_enable(struct fsi_priv *fsi, struct fsi_stream *io)
677 u32 data = AB_IO(1, fsi_get_port_shift(fsi, io));
678 struct fsi_master *master = fsi_get_master(fsi);
680 fsi_core_mask_set(master, imsk, data, data);
681 fsi_core_mask_set(master, iemsk, data, data);
684 static void fsi_irq_disable(struct fsi_priv *fsi, struct fsi_stream *io)
686 u32 data = AB_IO(1, fsi_get_port_shift(fsi, io));
687 struct fsi_master *master = fsi_get_master(fsi);
689 fsi_core_mask_set(master, imsk, data, 0);
690 fsi_core_mask_set(master, iemsk, data, 0);
693 static u32 fsi_irq_get_status(struct fsi_master *master)
695 return fsi_core_read(master, int_st);
698 static void fsi_irq_clear_status(struct fsi_priv *fsi)
701 struct fsi_master *master = fsi_get_master(fsi);
703 data |= AB_IO(1, fsi_get_port_shift(fsi, &fsi->playback));
704 data |= AB_IO(1, fsi_get_port_shift(fsi, &fsi->capture));
706 /* clear interrupt factor */
707 fsi_core_mask_set(master, int_st, data, 0);
711 * SPDIF master clock function
713 * These functions are used later FSI2
715 static void fsi_spdif_clk_ctrl(struct fsi_priv *fsi, int enable)
717 struct fsi_master *master = fsi_get_master(fsi);
721 val = enable ? mask : 0;
724 fsi_core_mask_set(master, a_mclk, mask, val) :
725 fsi_core_mask_set(master, b_mclk, mask, val);
731 static int fsi_clk_init(struct device *dev,
732 struct fsi_priv *fsi,
736 int (*set_rate)(struct device *dev,
737 struct fsi_priv *fsi))
739 struct fsi_clk *clock = &fsi->clock;
740 int is_porta = fsi_is_port_a(fsi);
747 clock->set_rate = set_rate;
749 clock->own = devm_clk_get(dev, NULL);
750 if (IS_ERR(clock->own))
755 clock->xck = devm_clk_get(dev, is_porta ? "xcka" : "xckb");
756 if (IS_ERR(clock->xck)) {
757 dev_err(dev, "can't get xck clock\n");
760 if (clock->xck == clock->own) {
761 dev_err(dev, "cpu doesn't support xck clock\n");
766 /* FSIACLK/FSIBCLK */
768 clock->ick = devm_clk_get(dev, is_porta ? "icka" : "ickb");
769 if (IS_ERR(clock->ick)) {
770 dev_err(dev, "can't get ick clock\n");
773 if (clock->ick == clock->own) {
774 dev_err(dev, "cpu doesn't support ick clock\n");
781 clock->div = devm_clk_get(dev, is_porta ? "diva" : "divb");
782 if (IS_ERR(clock->div)) {
783 dev_err(dev, "can't get div clock\n");
786 if (clock->div == clock->own) {
787 dev_err(dev, "cpu doens't support div clock\n");
795 #define fsi_clk_invalid(fsi) fsi_clk_valid(fsi, 0)
796 static void fsi_clk_valid(struct fsi_priv *fsi, unsigned long rate)
798 fsi->clock.rate = rate;
801 static int fsi_clk_is_valid(struct fsi_priv *fsi)
803 return fsi->clock.set_rate &&
807 static int fsi_clk_enable(struct device *dev,
808 struct fsi_priv *fsi)
810 struct fsi_clk *clock = &fsi->clock;
813 if (!fsi_clk_is_valid(fsi))
816 if (0 == clock->count) {
817 ret = clock->set_rate(dev, fsi);
819 fsi_clk_invalid(fsi);
824 clk_enable(clock->xck);
826 clk_enable(clock->ick);
828 clk_enable(clock->div);
836 static int fsi_clk_disable(struct device *dev,
837 struct fsi_priv *fsi)
839 struct fsi_clk *clock = &fsi->clock;
841 if (!fsi_clk_is_valid(fsi))
844 if (1 == clock->count--) {
846 clk_disable(clock->xck);
848 clk_disable(clock->ick);
850 clk_disable(clock->div);
856 static int fsi_clk_set_ackbpf(struct device *dev,
857 struct fsi_priv *fsi,
858 int ackmd, int bpfmd)
862 /* check ackmd/bpfmd relationship */
864 dev_err(dev, "unsupported rate (%d/%d)\n", ackmd, bpfmd);
886 dev_err(dev, "unsupported ackmd (%d)\n", ackmd);
911 dev_err(dev, "unsupported bpfmd (%d)\n", bpfmd);
915 dev_dbg(dev, "ACKMD/BPFMD = %d/%d\n", ackmd, bpfmd);
917 fsi_reg_mask_set(fsi, CKG1, (ACKMD_MASK | BPFMD_MASK) , data);
923 static int fsi_clk_set_rate_external(struct device *dev,
924 struct fsi_priv *fsi)
926 struct clk *xck = fsi->clock.xck;
927 struct clk *ick = fsi->clock.ick;
928 unsigned long rate = fsi->clock.rate;
933 /* check clock rate */
934 xrate = clk_get_rate(xck);
936 dev_err(dev, "unsupported clock rate\n");
940 clk_set_parent(ick, xck);
941 clk_set_rate(ick, xrate);
943 bpfmd = fsi->chan_num * 32;
944 ackmd = xrate / rate;
946 dev_dbg(dev, "external/rate = %ld/%ld\n", xrate, rate);
948 ret = fsi_clk_set_ackbpf(dev, fsi, ackmd, bpfmd);
950 dev_err(dev, "%s failed", __func__);
955 static int fsi_clk_set_rate_cpg(struct device *dev,
956 struct fsi_priv *fsi)
958 struct clk *ick = fsi->clock.ick;
959 struct clk *div = fsi->clock.div;
960 unsigned long rate = fsi->clock.rate;
961 unsigned long target = 0; /* 12288000 or 11289600 */
962 unsigned long actual, cout;
963 unsigned long diff, min;
964 unsigned long best_cout, best_act;
969 if (!(12288000 % rate))
971 if (!(11289600 % rate))
974 dev_err(dev, "unsupported rate\n");
978 bpfmd = fsi->chan_num * 32;
979 ackmd = target / rate;
980 ret = fsi_clk_set_ackbpf(dev, fsi, ackmd, bpfmd);
982 dev_err(dev, "%s failed", __func__);
989 * [CPG] = cout => [FSI_DIV] = audio => [FSI] => [codec]
991 * But, it needs to find best match of CPG and FSI_DIV
992 * combination, since it is difficult to generate correct
993 * frequency of audio clock from ick clock only.
994 * Because ick is created from its parent clock.
996 * target = rate x [512/256/128/64]fs
997 * cout = round(target x adjustment)
998 * actual = cout / adjustment (by FSI-DIV) ~= target
1004 for (adj = 1; adj < 0xffff; adj++) {
1006 cout = target * adj;
1007 if (cout > 100000000) /* max clock = 100MHz */
1010 /* cout/actual audio clock */
1011 cout = clk_round_rate(ick, cout);
1012 actual = cout / adj;
1014 /* find best frequency */
1015 diff = abs(actual - target);
1023 ret = clk_set_rate(ick, best_cout);
1025 dev_err(dev, "ick clock failed\n");
1029 ret = clk_set_rate(div, clk_round_rate(div, best_act));
1031 dev_err(dev, "div clock failed\n");
1035 dev_dbg(dev, "ick/div = %ld/%ld\n",
1036 clk_get_rate(ick), clk_get_rate(div));
1041 static void fsi_pointer_update(struct fsi_stream *io, int size)
1043 io->buff_sample_pos += size;
1045 if (io->buff_sample_pos >=
1046 io->period_samples * (io->period_pos + 1)) {
1047 struct snd_pcm_substream *substream = io->substream;
1048 struct snd_pcm_runtime *runtime = substream->runtime;
1052 if (io->period_pos >= runtime->periods) {
1053 io->buff_sample_pos = 0;
1057 snd_pcm_period_elapsed(substream);
1062 * pio data transfer handler
1064 static void fsi_pio_push16(struct fsi_priv *fsi, u8 *_buf, int samples)
1068 if (fsi_is_enable_stream(fsi)) {
1072 * fsi_pio_push_init()
1074 u32 *buf = (u32 *)_buf;
1076 for (i = 0; i < samples / 2; i++)
1077 fsi_reg_write(fsi, DODT, buf[i]);
1080 u16 *buf = (u16 *)_buf;
1082 for (i = 0; i < samples; i++)
1083 fsi_reg_write(fsi, DODT, ((u32)*(buf + i) << 8));
1087 static void fsi_pio_pop16(struct fsi_priv *fsi, u8 *_buf, int samples)
1089 u16 *buf = (u16 *)_buf;
1092 for (i = 0; i < samples; i++)
1093 *(buf + i) = (u16)(fsi_reg_read(fsi, DIDT) >> 8);
1096 static void fsi_pio_push32(struct fsi_priv *fsi, u8 *_buf, int samples)
1098 u32 *buf = (u32 *)_buf;
1101 for (i = 0; i < samples; i++)
1102 fsi_reg_write(fsi, DODT, *(buf + i));
1105 static void fsi_pio_pop32(struct fsi_priv *fsi, u8 *_buf, int samples)
1107 u32 *buf = (u32 *)_buf;
1110 for (i = 0; i < samples; i++)
1111 *(buf + i) = fsi_reg_read(fsi, DIDT);
1114 static u8 *fsi_pio_get_area(struct fsi_priv *fsi, struct fsi_stream *io)
1116 struct snd_pcm_runtime *runtime = io->substream->runtime;
1118 return runtime->dma_area +
1119 samples_to_bytes(runtime, io->buff_sample_pos);
1122 static int fsi_pio_transfer(struct fsi_priv *fsi, struct fsi_stream *io,
1123 void (*run16)(struct fsi_priv *fsi, u8 *buf, int samples),
1124 void (*run32)(struct fsi_priv *fsi, u8 *buf, int samples),
1129 if (!fsi_stream_is_working(fsi, io))
1132 buf = fsi_pio_get_area(fsi, io);
1134 switch (io->sample_width) {
1136 run16(fsi, buf, samples);
1139 run32(fsi, buf, samples);
1145 fsi_pointer_update(io, samples);
1150 static int fsi_pio_pop(struct fsi_priv *fsi, struct fsi_stream *io)
1152 int sample_residues; /* samples in FSI fifo */
1153 int sample_space; /* ALSA free samples space */
1156 sample_residues = fsi_get_current_fifo_samples(fsi, io);
1157 sample_space = io->buff_sample_capa - io->buff_sample_pos;
1159 samples = min(sample_residues, sample_space);
1161 return fsi_pio_transfer(fsi, io,
1167 static int fsi_pio_push(struct fsi_priv *fsi, struct fsi_stream *io)
1169 int sample_residues; /* ALSA residue samples */
1170 int sample_space; /* FSI fifo free samples space */
1173 sample_residues = io->buff_sample_capa - io->buff_sample_pos;
1174 sample_space = io->fifo_sample_capa -
1175 fsi_get_current_fifo_samples(fsi, io);
1177 samples = min(sample_residues, sample_space);
1179 return fsi_pio_transfer(fsi, io,
1185 static int fsi_pio_start_stop(struct fsi_priv *fsi, struct fsi_stream *io,
1188 struct fsi_master *master = fsi_get_master(fsi);
1189 u32 clk = fsi_is_port_a(fsi) ? CRA : CRB;
1192 fsi_irq_enable(fsi, io);
1194 fsi_irq_disable(fsi, io);
1196 if (fsi_is_clk_master(fsi))
1197 fsi_master_mask_set(master, CLK_RST, clk, (enable) ? clk : 0);
1202 static int fsi_pio_push_init(struct fsi_priv *fsi, struct fsi_stream *io)
1205 * we can use 16bit stream mode
1206 * when "playback" and "16bit data"
1207 * and platform allows "stream mode"
1211 if (fsi_is_enable_stream(fsi))
1212 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1213 BUSOP_SET(16, PACKAGE_16BITBUS_STREAM);
1215 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1216 BUSOP_SET(16, PACKAGE_24BITBUS_BACK);
1220 static int fsi_pio_pop_init(struct fsi_priv *fsi, struct fsi_stream *io)
1223 * always 24bit bus, package back when "capture"
1225 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1226 BUSOP_SET(16, PACKAGE_24BITBUS_BACK);
1230 static struct fsi_stream_handler fsi_pio_push_handler = {
1231 .init = fsi_pio_push_init,
1232 .transfer = fsi_pio_push,
1233 .start_stop = fsi_pio_start_stop,
1236 static struct fsi_stream_handler fsi_pio_pop_handler = {
1237 .init = fsi_pio_pop_init,
1238 .transfer = fsi_pio_pop,
1239 .start_stop = fsi_pio_start_stop,
1242 static irqreturn_t fsi_interrupt(int irq, void *data)
1244 struct fsi_master *master = data;
1245 u32 int_st = fsi_irq_get_status(master);
1247 /* clear irq status */
1248 fsi_master_mask_set(master, SOFT_RST, IR, 0);
1249 fsi_master_mask_set(master, SOFT_RST, IR, IR);
1251 if (int_st & AB_IO(1, AO_SHIFT))
1252 fsi_stream_transfer(&master->fsia.playback);
1253 if (int_st & AB_IO(1, BO_SHIFT))
1254 fsi_stream_transfer(&master->fsib.playback);
1255 if (int_st & AB_IO(1, AI_SHIFT))
1256 fsi_stream_transfer(&master->fsia.capture);
1257 if (int_st & AB_IO(1, BI_SHIFT))
1258 fsi_stream_transfer(&master->fsib.capture);
1260 fsi_count_fifo_err(&master->fsia);
1261 fsi_count_fifo_err(&master->fsib);
1263 fsi_irq_clear_status(&master->fsia);
1264 fsi_irq_clear_status(&master->fsib);
1270 * dma data transfer handler
1272 static int fsi_dma_init(struct fsi_priv *fsi, struct fsi_stream *io)
1275 * 24bit data : 24bit bus / package in back
1276 * 16bit data : 16bit bus / stream mode
1278 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1279 BUSOP_SET(16, PACKAGE_16BITBUS_STREAM);
1284 static void fsi_dma_complete(void *data)
1286 struct fsi_stream *io = (struct fsi_stream *)data;
1287 struct fsi_priv *fsi = fsi_stream_to_priv(io);
1289 fsi_pointer_update(io, io->period_samples);
1291 fsi_count_fifo_err(fsi);
1294 static int fsi_dma_transfer(struct fsi_priv *fsi, struct fsi_stream *io)
1296 struct snd_soc_dai *dai = fsi_get_dai(io->substream);
1297 struct snd_pcm_substream *substream = io->substream;
1298 struct dma_async_tx_descriptor *desc;
1299 int is_play = fsi_stream_is_play(fsi, io);
1300 enum dma_transfer_direction dir;
1304 dir = DMA_MEM_TO_DEV;
1306 dir = DMA_DEV_TO_MEM;
1308 desc = dmaengine_prep_dma_cyclic(io->chan,
1309 substream->runtime->dma_addr,
1310 snd_pcm_lib_buffer_bytes(substream),
1311 snd_pcm_lib_period_bytes(substream),
1313 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
1315 dev_err(dai->dev, "dmaengine_prep_dma_cyclic() fail\n");
1316 goto fsi_dma_transfer_err;
1319 desc->callback = fsi_dma_complete;
1320 desc->callback_param = io;
1322 if (dmaengine_submit(desc) < 0) {
1323 dev_err(dai->dev, "tx_submit() fail\n");
1324 goto fsi_dma_transfer_err;
1327 dma_async_issue_pending(io->chan);
1332 * In DMAEngine case, codec and FSI cannot be started simultaneously
1333 * since FSI is using the scheduler work queue.
1334 * Therefore, in capture case, probably FSI FIFO will have got
1335 * overflow error in this point.
1336 * in that case, DMA cannot start transfer until error was cleared.
1339 if (ERR_OVER & fsi_reg_read(fsi, DIFF_ST)) {
1340 fsi_reg_mask_set(fsi, DIFF_CTL, FIFO_CLR, FIFO_CLR);
1341 fsi_reg_write(fsi, DIFF_ST, 0);
1347 fsi_dma_transfer_err:
1351 static int fsi_dma_push_start_stop(struct fsi_priv *fsi, struct fsi_stream *io,
1354 struct fsi_master *master = fsi_get_master(fsi);
1355 u32 clk = fsi_is_port_a(fsi) ? CRA : CRB;
1356 u32 enable = start ? DMA_ON : 0;
1358 fsi_reg_mask_set(fsi, OUT_DMAC, DMA_ON, enable);
1360 dmaengine_terminate_all(io->chan);
1362 if (fsi_is_clk_master(fsi))
1363 fsi_master_mask_set(master, CLK_RST, clk, (enable) ? clk : 0);
1368 static int fsi_dma_probe(struct fsi_priv *fsi, struct fsi_stream *io, struct device *dev)
1370 dma_cap_mask_t mask;
1371 int is_play = fsi_stream_is_play(fsi, io);
1374 dma_cap_set(DMA_SLAVE, mask);
1376 io->chan = dma_request_slave_channel_compat(mask,
1377 shdma_chan_filter, (void *)io->dma_id,
1378 dev, is_play ? "tx" : "rx");
1380 struct dma_slave_config cfg;
1383 cfg.slave_id = io->dma_id;
1384 cfg.dst_addr = 0; /* use default addr */
1385 cfg.src_addr = 0; /* use default addr */
1386 cfg.direction = is_play ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM;
1388 ret = dmaengine_slave_config(io->chan, &cfg);
1390 dma_release_channel(io->chan);
1397 /* switch to PIO handler */
1399 fsi->playback.handler = &fsi_pio_push_handler;
1401 fsi->capture.handler = &fsi_pio_pop_handler;
1403 dev_info(dev, "switch handler (dma => pio)\n");
1406 return fsi_stream_probe(fsi, dev);
1412 static int fsi_dma_remove(struct fsi_priv *fsi, struct fsi_stream *io)
1414 fsi_stream_stop(fsi, io);
1417 dma_release_channel(io->chan);
1423 static struct fsi_stream_handler fsi_dma_push_handler = {
1424 .init = fsi_dma_init,
1425 .probe = fsi_dma_probe,
1426 .transfer = fsi_dma_transfer,
1427 .remove = fsi_dma_remove,
1428 .start_stop = fsi_dma_push_start_stop,
1434 static void fsi_fifo_init(struct fsi_priv *fsi,
1435 struct fsi_stream *io,
1438 struct fsi_master *master = fsi_get_master(fsi);
1439 int is_play = fsi_stream_is_play(fsi, io);
1443 /* get on-chip RAM capacity */
1444 shift = fsi_master_read(master, FIFO_SZ);
1445 shift >>= fsi_get_port_shift(fsi, io);
1446 shift &= FIFO_SZ_MASK;
1447 frame_capa = 256 << shift;
1448 dev_dbg(dev, "fifo = %d words\n", frame_capa);
1451 * The maximum number of sample data varies depending
1452 * on the number of channels selected for the format.
1454 * FIFOs are used in 4-channel units in 3-channel mode
1455 * and in 8-channel units in 5- to 7-channel mode
1456 * meaning that more FIFOs than the required size of DPRAM
1459 * ex) if 256 words of DP-RAM is connected
1460 * 1 channel: 256 (256 x 1 = 256)
1461 * 2 channels: 128 (128 x 2 = 256)
1462 * 3 channels: 64 ( 64 x 3 = 192)
1463 * 4 channels: 64 ( 64 x 4 = 256)
1464 * 5 channels: 32 ( 32 x 5 = 160)
1465 * 6 channels: 32 ( 32 x 6 = 192)
1466 * 7 channels: 32 ( 32 x 7 = 224)
1467 * 8 channels: 32 ( 32 x 8 = 256)
1469 for (i = 1; i < fsi->chan_num; i <<= 1)
1471 dev_dbg(dev, "%d channel %d store\n",
1472 fsi->chan_num, frame_capa);
1474 io->fifo_sample_capa = fsi_frame2sample(fsi, frame_capa);
1477 * set interrupt generation factor
1481 fsi_reg_write(fsi, DOFF_CTL, IRQ_HALF);
1482 fsi_reg_mask_set(fsi, DOFF_CTL, FIFO_CLR, FIFO_CLR);
1484 fsi_reg_write(fsi, DIFF_CTL, IRQ_HALF);
1485 fsi_reg_mask_set(fsi, DIFF_CTL, FIFO_CLR, FIFO_CLR);
1489 static int fsi_hw_startup(struct fsi_priv *fsi,
1490 struct fsi_stream *io,
1496 if (fsi_is_clk_master(fsi))
1499 fsi_reg_mask_set(fsi, CKG1, (DIMD | DOMD), data);
1501 /* clock inversion (CKG2) */
1503 if (fsi->bit_clk_inv)
1505 if (fsi->lr_clk_inv)
1507 if (fsi_is_clk_master(fsi))
1509 fsi_reg_write(fsi, CKG2, data);
1512 if (fsi_is_spdif(fsi)) {
1513 fsi_spdif_clk_ctrl(fsi, 1);
1514 fsi_reg_mask_set(fsi, OUT_SEL, DMMD, DMMD);
1521 switch (io->sample_width) {
1523 data = BUSOP_GET(16, io->bus_option);
1526 data = BUSOP_GET(24, io->bus_option);
1529 fsi_format_bus_setup(fsi, io, data, dev);
1532 fsi_irq_disable(fsi, io);
1533 fsi_irq_clear_status(fsi);
1536 fsi_fifo_init(fsi, io, dev);
1538 /* start master clock */
1539 if (fsi_is_clk_master(fsi))
1540 return fsi_clk_enable(dev, fsi);
1545 static int fsi_hw_shutdown(struct fsi_priv *fsi,
1548 /* stop master clock */
1549 if (fsi_is_clk_master(fsi))
1550 return fsi_clk_disable(dev, fsi);
1555 static int fsi_dai_startup(struct snd_pcm_substream *substream,
1556 struct snd_soc_dai *dai)
1558 struct fsi_priv *fsi = fsi_get_priv(substream);
1560 fsi_clk_invalid(fsi);
1565 static void fsi_dai_shutdown(struct snd_pcm_substream *substream,
1566 struct snd_soc_dai *dai)
1568 struct fsi_priv *fsi = fsi_get_priv(substream);
1570 fsi_clk_invalid(fsi);
1573 static int fsi_dai_trigger(struct snd_pcm_substream *substream, int cmd,
1574 struct snd_soc_dai *dai)
1576 struct fsi_priv *fsi = fsi_get_priv(substream);
1577 struct fsi_stream *io = fsi_stream_get(fsi, substream);
1581 case SNDRV_PCM_TRIGGER_START:
1582 fsi_stream_init(fsi, io, substream);
1584 ret = fsi_hw_startup(fsi, io, dai->dev);
1586 ret = fsi_stream_start(fsi, io);
1588 ret = fsi_stream_transfer(io);
1590 case SNDRV_PCM_TRIGGER_STOP:
1592 ret = fsi_hw_shutdown(fsi, dai->dev);
1593 fsi_stream_stop(fsi, io);
1594 fsi_stream_quit(fsi, io);
1601 static int fsi_set_fmt_dai(struct fsi_priv *fsi, unsigned int fmt)
1603 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1604 case SND_SOC_DAIFMT_I2S:
1608 case SND_SOC_DAIFMT_LEFT_J:
1619 static int fsi_set_fmt_spdif(struct fsi_priv *fsi)
1621 struct fsi_master *master = fsi_get_master(fsi);
1623 if (fsi_version(master) < 2)
1626 fsi->fmt = CR_DTMD_SPDIF_PCM | CR_PCM;
1632 static int fsi_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1634 struct fsi_priv *fsi = fsi_get_priv_frm_dai(dai);
1637 /* set master/slave audio interface */
1638 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1639 case SND_SOC_DAIFMT_CBM_CFM:
1641 case SND_SOC_DAIFMT_CBS_CFS:
1642 fsi->clk_master = 1; /* codec is slave, cpu is master */
1648 /* set clock inversion */
1649 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1650 case SND_SOC_DAIFMT_NB_IF:
1651 fsi->bit_clk_inv = 0;
1652 fsi->lr_clk_inv = 1;
1654 case SND_SOC_DAIFMT_IB_NF:
1655 fsi->bit_clk_inv = 1;
1656 fsi->lr_clk_inv = 0;
1658 case SND_SOC_DAIFMT_IB_IF:
1659 fsi->bit_clk_inv = 1;
1660 fsi->lr_clk_inv = 1;
1662 case SND_SOC_DAIFMT_NB_NF:
1664 fsi->bit_clk_inv = 0;
1665 fsi->lr_clk_inv = 0;
1669 if (fsi_is_clk_master(fsi)) {
1671 fsi_clk_init(dai->dev, fsi, 0, 1, 1,
1672 fsi_clk_set_rate_cpg);
1674 fsi_clk_init(dai->dev, fsi, 1, 1, 0,
1675 fsi_clk_set_rate_external);
1679 if (fsi_is_spdif(fsi))
1680 ret = fsi_set_fmt_spdif(fsi);
1682 ret = fsi_set_fmt_dai(fsi, fmt & SND_SOC_DAIFMT_FORMAT_MASK);
1687 static int fsi_dai_hw_params(struct snd_pcm_substream *substream,
1688 struct snd_pcm_hw_params *params,
1689 struct snd_soc_dai *dai)
1691 struct fsi_priv *fsi = fsi_get_priv(substream);
1693 if (fsi_is_clk_master(fsi))
1694 fsi_clk_valid(fsi, params_rate(params));
1699 static const struct snd_soc_dai_ops fsi_dai_ops = {
1700 .startup = fsi_dai_startup,
1701 .shutdown = fsi_dai_shutdown,
1702 .trigger = fsi_dai_trigger,
1703 .set_fmt = fsi_dai_set_fmt,
1704 .hw_params = fsi_dai_hw_params,
1711 static struct snd_pcm_hardware fsi_pcm_hardware = {
1712 .info = SNDRV_PCM_INFO_INTERLEAVED |
1713 SNDRV_PCM_INFO_MMAP |
1714 SNDRV_PCM_INFO_MMAP_VALID |
1715 SNDRV_PCM_INFO_PAUSE,
1716 .buffer_bytes_max = 64 * 1024,
1717 .period_bytes_min = 32,
1718 .period_bytes_max = 8192,
1724 static int fsi_pcm_open(struct snd_pcm_substream *substream)
1726 struct snd_pcm_runtime *runtime = substream->runtime;
1729 snd_soc_set_runtime_hwparams(substream, &fsi_pcm_hardware);
1731 ret = snd_pcm_hw_constraint_integer(runtime,
1732 SNDRV_PCM_HW_PARAM_PERIODS);
1737 static int fsi_hw_params(struct snd_pcm_substream *substream,
1738 struct snd_pcm_hw_params *hw_params)
1740 return snd_pcm_lib_malloc_pages(substream,
1741 params_buffer_bytes(hw_params));
1744 static int fsi_hw_free(struct snd_pcm_substream *substream)
1746 return snd_pcm_lib_free_pages(substream);
1749 static snd_pcm_uframes_t fsi_pointer(struct snd_pcm_substream *substream)
1751 struct fsi_priv *fsi = fsi_get_priv(substream);
1752 struct fsi_stream *io = fsi_stream_get(fsi, substream);
1754 return fsi_sample2frame(fsi, io->buff_sample_pos);
1757 static struct snd_pcm_ops fsi_pcm_ops = {
1758 .open = fsi_pcm_open,
1759 .ioctl = snd_pcm_lib_ioctl,
1760 .hw_params = fsi_hw_params,
1761 .hw_free = fsi_hw_free,
1762 .pointer = fsi_pointer,
1769 #define PREALLOC_BUFFER (32 * 1024)
1770 #define PREALLOC_BUFFER_MAX (32 * 1024)
1772 static void fsi_pcm_free(struct snd_pcm *pcm)
1774 snd_pcm_lib_preallocate_free_for_all(pcm);
1777 static int fsi_pcm_new(struct snd_soc_pcm_runtime *rtd)
1779 return snd_pcm_lib_preallocate_pages_for_all(
1782 rtd->card->snd_card->dev,
1783 PREALLOC_BUFFER, PREALLOC_BUFFER_MAX);
1790 static struct snd_soc_dai_driver fsi_soc_dai[] = {
1795 .formats = FSI_FMTS,
1801 .formats = FSI_FMTS,
1805 .ops = &fsi_dai_ops,
1811 .formats = FSI_FMTS,
1817 .formats = FSI_FMTS,
1821 .ops = &fsi_dai_ops,
1825 static struct snd_soc_platform_driver fsi_soc_platform = {
1826 .ops = &fsi_pcm_ops,
1827 .pcm_new = fsi_pcm_new,
1828 .pcm_free = fsi_pcm_free,
1831 static const struct snd_soc_component_driver fsi_soc_component = {
1838 static void fsi_of_parse(char *name,
1839 struct device_node *np,
1840 struct sh_fsi_port_info *info,
1845 unsigned long flags = 0;
1849 } of_parse_property[] = {
1850 { "spdif-connection", SH_FSI_FMT_SPDIF },
1851 { "stream-mode-support", SH_FSI_ENABLE_STREAM_MODE },
1852 { "use-internal-clock", SH_FSI_CLK_CPG },
1855 for (i = 0; i < ARRAY_SIZE(of_parse_property); i++) {
1856 sprintf(prop, "%s,%s", name, of_parse_property[i].name);
1857 if (of_get_property(np, prop, NULL))
1858 flags |= of_parse_property[i].val;
1860 info->flags = flags;
1862 dev_dbg(dev, "%s flags : %lx\n", name, info->flags);
1865 static void fsi_port_info_init(struct fsi_priv *fsi,
1866 struct sh_fsi_port_info *info)
1868 if (info->flags & SH_FSI_FMT_SPDIF)
1871 if (info->flags & SH_FSI_CLK_CPG)
1874 if (info->flags & SH_FSI_ENABLE_STREAM_MODE)
1875 fsi->enable_stream = 1;
1878 static void fsi_handler_init(struct fsi_priv *fsi,
1879 struct sh_fsi_port_info *info)
1881 fsi->playback.handler = &fsi_pio_push_handler; /* default PIO */
1882 fsi->playback.priv = fsi;
1883 fsi->capture.handler = &fsi_pio_pop_handler; /* default PIO */
1884 fsi->capture.priv = fsi;
1887 fsi->playback.dma_id = info->tx_id;
1888 fsi->playback.handler = &fsi_dma_push_handler;
1892 static struct of_device_id fsi_of_match[];
1893 static int fsi_probe(struct platform_device *pdev)
1895 struct fsi_master *master;
1896 struct device_node *np = pdev->dev.of_node;
1897 struct sh_fsi_platform_info info;
1898 const struct fsi_core *core;
1899 struct fsi_priv *fsi;
1900 struct resource *res;
1904 memset(&info, 0, sizeof(info));
1908 const struct of_device_id *of_id;
1910 of_id = of_match_device(fsi_of_match, &pdev->dev);
1913 fsi_of_parse("fsia", np, &info.port_a, &pdev->dev);
1914 fsi_of_parse("fsib", np, &info.port_b, &pdev->dev);
1917 const struct platform_device_id *id_entry = pdev->id_entry;
1919 core = (struct fsi_core *)id_entry->driver_data;
1921 if (pdev->dev.platform_data)
1922 memcpy(&info, pdev->dev.platform_data, sizeof(info));
1926 dev_err(&pdev->dev, "unknown fsi device\n");
1930 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1931 irq = platform_get_irq(pdev, 0);
1932 if (!res || (int)irq <= 0) {
1933 dev_err(&pdev->dev, "Not enough FSI platform resources.\n");
1937 master = devm_kzalloc(&pdev->dev, sizeof(*master), GFP_KERNEL);
1939 dev_err(&pdev->dev, "Could not allocate master\n");
1943 master->base = devm_ioremap_nocache(&pdev->dev,
1944 res->start, resource_size(res));
1945 if (!master->base) {
1946 dev_err(&pdev->dev, "Unable to ioremap FSI registers.\n");
1950 /* master setting */
1951 master->core = core;
1952 spin_lock_init(&master->lock);
1955 fsi = &master->fsia;
1956 fsi->base = master->base;
1957 fsi->master = master;
1958 fsi_port_info_init(fsi, &info.port_a);
1959 fsi_handler_init(fsi, &info.port_a);
1960 ret = fsi_stream_probe(fsi, &pdev->dev);
1962 dev_err(&pdev->dev, "FSIA stream probe failed\n");
1967 fsi = &master->fsib;
1968 fsi->base = master->base + 0x40;
1969 fsi->master = master;
1970 fsi_port_info_init(fsi, &info.port_b);
1971 fsi_handler_init(fsi, &info.port_b);
1972 ret = fsi_stream_probe(fsi, &pdev->dev);
1974 dev_err(&pdev->dev, "FSIB stream probe failed\n");
1978 pm_runtime_enable(&pdev->dev);
1979 dev_set_drvdata(&pdev->dev, master);
1981 ret = devm_request_irq(&pdev->dev, irq, &fsi_interrupt, 0,
1982 dev_name(&pdev->dev), master);
1984 dev_err(&pdev->dev, "irq request err\n");
1988 ret = snd_soc_register_platform(&pdev->dev, &fsi_soc_platform);
1990 dev_err(&pdev->dev, "cannot snd soc register\n");
1994 ret = snd_soc_register_component(&pdev->dev, &fsi_soc_component,
1995 fsi_soc_dai, ARRAY_SIZE(fsi_soc_dai));
1997 dev_err(&pdev->dev, "cannot snd component register\n");
2004 snd_soc_unregister_platform(&pdev->dev);
2006 pm_runtime_disable(&pdev->dev);
2007 fsi_stream_remove(&master->fsib);
2009 fsi_stream_remove(&master->fsia);
2014 static int fsi_remove(struct platform_device *pdev)
2016 struct fsi_master *master;
2018 master = dev_get_drvdata(&pdev->dev);
2020 pm_runtime_disable(&pdev->dev);
2022 snd_soc_unregister_component(&pdev->dev);
2023 snd_soc_unregister_platform(&pdev->dev);
2025 fsi_stream_remove(&master->fsia);
2026 fsi_stream_remove(&master->fsib);
2031 static void __fsi_suspend(struct fsi_priv *fsi,
2032 struct fsi_stream *io,
2035 if (!fsi_stream_is_working(fsi, io))
2038 fsi_stream_stop(fsi, io);
2039 fsi_hw_shutdown(fsi, dev);
2042 static void __fsi_resume(struct fsi_priv *fsi,
2043 struct fsi_stream *io,
2046 if (!fsi_stream_is_working(fsi, io))
2049 fsi_hw_startup(fsi, io, dev);
2050 fsi_stream_start(fsi, io);
2053 static int fsi_suspend(struct device *dev)
2055 struct fsi_master *master = dev_get_drvdata(dev);
2056 struct fsi_priv *fsia = &master->fsia;
2057 struct fsi_priv *fsib = &master->fsib;
2059 __fsi_suspend(fsia, &fsia->playback, dev);
2060 __fsi_suspend(fsia, &fsia->capture, dev);
2062 __fsi_suspend(fsib, &fsib->playback, dev);
2063 __fsi_suspend(fsib, &fsib->capture, dev);
2068 static int fsi_resume(struct device *dev)
2070 struct fsi_master *master = dev_get_drvdata(dev);
2071 struct fsi_priv *fsia = &master->fsia;
2072 struct fsi_priv *fsib = &master->fsib;
2074 __fsi_resume(fsia, &fsia->playback, dev);
2075 __fsi_resume(fsia, &fsia->capture, dev);
2077 __fsi_resume(fsib, &fsib->playback, dev);
2078 __fsi_resume(fsib, &fsib->capture, dev);
2083 static struct dev_pm_ops fsi_pm_ops = {
2084 .suspend = fsi_suspend,
2085 .resume = fsi_resume,
2088 static struct fsi_core fsi1_core = {
2097 static struct fsi_core fsi2_core = {
2101 .int_st = CPU_INT_ST,
2104 .a_mclk = A_MST_CTLR,
2105 .b_mclk = B_MST_CTLR,
2108 static struct of_device_id fsi_of_match[] = {
2109 { .compatible = "renesas,sh_fsi", .data = &fsi1_core},
2110 { .compatible = "renesas,sh_fsi2", .data = &fsi2_core},
2113 MODULE_DEVICE_TABLE(of, fsi_of_match);
2115 static struct platform_device_id fsi_id_table[] = {
2116 { "sh_fsi", (kernel_ulong_t)&fsi1_core },
2117 { "sh_fsi2", (kernel_ulong_t)&fsi2_core },
2120 MODULE_DEVICE_TABLE(platform, fsi_id_table);
2122 static struct platform_driver fsi_driver = {
2124 .name = "fsi-pcm-audio",
2126 .of_match_table = fsi_of_match,
2129 .remove = fsi_remove,
2130 .id_table = fsi_id_table,
2133 module_platform_driver(fsi_driver);
2135 MODULE_LICENSE("GPL");
2136 MODULE_DESCRIPTION("SuperH onchip FSI audio driver");
2137 MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
2138 MODULE_ALIAS("platform:fsi-pcm-audio");