2 * pxa-ssp.c -- ALSA Soc Audio Layer
4 * Copyright 2005,2008 Wolfson Microelectronics PLC.
5 * Author: Liam Girdwood
6 * Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
14 * o Test network mode for > 16bit sample size
17 #include <linux/init.h>
18 #include <linux/module.h>
19 #include <linux/platform_device.h>
20 #include <linux/clk.h>
25 #include <sound/core.h>
26 #include <sound/pcm.h>
27 #include <sound/initval.h>
28 #include <sound/pcm_params.h>
29 #include <sound/soc.h>
30 #include <sound/pxa2xx-lib.h>
32 #include <mach/hardware.h>
34 #include <mach/regs-ssp.h>
35 #include <mach/audio.h>
38 #include "pxa2xx-pcm.h"
42 * SSP audio private data
45 struct ssp_device *ssp;
56 static void dump_registers(struct ssp_device *ssp)
58 dev_dbg(&ssp->pdev->dev, "SSCR0 0x%08x SSCR1 0x%08x SSTO 0x%08x\n",
59 ssp_read_reg(ssp, SSCR0), ssp_read_reg(ssp, SSCR1),
60 ssp_read_reg(ssp, SSTO));
62 dev_dbg(&ssp->pdev->dev, "SSPSP 0x%08x SSSR 0x%08x SSACD 0x%08x\n",
63 ssp_read_reg(ssp, SSPSP), ssp_read_reg(ssp, SSSR),
64 ssp_read_reg(ssp, SSACD));
67 static void ssp_enable(struct ssp_device *ssp)
71 sscr0 = __raw_readl(ssp->mmio_base + SSCR0) | SSCR0_SSE;
72 __raw_writel(sscr0, ssp->mmio_base + SSCR0);
75 static void ssp_disable(struct ssp_device *ssp)
79 sscr0 = __raw_readl(ssp->mmio_base + SSCR0) & ~SSCR0_SSE;
80 __raw_writel(sscr0, ssp->mmio_base + SSCR0);
83 struct pxa2xx_pcm_dma_data {
84 struct pxa2xx_pcm_dma_params params;
88 static struct pxa2xx_pcm_dma_params *
89 ssp_get_dma_params(struct ssp_device *ssp, int width4, int out)
91 struct pxa2xx_pcm_dma_data *dma;
93 dma = kzalloc(sizeof(struct pxa2xx_pcm_dma_data), GFP_KERNEL);
97 snprintf(dma->name, 20, "SSP%d PCM %s %s", ssp->port_id,
98 width4 ? "32-bit" : "16-bit", out ? "out" : "in");
100 dma->params.name = dma->name;
101 dma->params.drcmr = &DRCMR(out ? ssp->drcmr_tx : ssp->drcmr_rx);
102 dma->params.dcmd = (out ? (DCMD_INCSRCADDR | DCMD_FLOWTRG) :
103 (DCMD_INCTRGADDR | DCMD_FLOWSRC)) |
104 (width4 ? DCMD_WIDTH4 : DCMD_WIDTH2) | DCMD_BURST16;
105 dma->params.dev_addr = ssp->phys_base + SSDR;
110 static int pxa_ssp_startup(struct snd_pcm_substream *substream,
111 struct snd_soc_dai *dai)
113 struct snd_soc_pcm_runtime *rtd = substream->private_data;
114 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
115 struct ssp_priv *priv = cpu_dai->private_data;
116 struct ssp_device *ssp = priv->ssp;
119 if (!cpu_dai->active) {
120 clk_enable(ssp->clk);
124 if (cpu_dai->dma_data) {
125 kfree(cpu_dai->dma_data);
126 cpu_dai->dma_data = NULL;
131 static void pxa_ssp_shutdown(struct snd_pcm_substream *substream,
132 struct snd_soc_dai *dai)
134 struct snd_soc_pcm_runtime *rtd = substream->private_data;
135 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
136 struct ssp_priv *priv = cpu_dai->private_data;
137 struct ssp_device *ssp = priv->ssp;
139 if (!cpu_dai->active) {
141 clk_disable(ssp->clk);
144 if (cpu_dai->dma_data) {
145 kfree(cpu_dai->dma_data);
146 cpu_dai->dma_data = NULL;
152 static int pxa_ssp_suspend(struct snd_soc_dai *cpu_dai)
154 struct ssp_priv *priv = cpu_dai->private_data;
155 struct ssp_device *ssp = priv->ssp;
157 if (!cpu_dai->active)
160 priv->cr0 = __raw_readl(ssp->mmio_base + SSCR0);
161 priv->cr1 = __raw_readl(ssp->mmio_base + SSCR1);
162 priv->to = __raw_readl(ssp->mmio_base + SSTO);
163 priv->psp = __raw_readl(ssp->mmio_base + SSPSP);
166 clk_disable(ssp->clk);
170 static int pxa_ssp_resume(struct snd_soc_dai *cpu_dai)
172 struct ssp_priv *priv = cpu_dai->private_data;
173 struct ssp_device *ssp = priv->ssp;
174 uint32_t sssr = SSSR_ROR | SSSR_TUR | SSSR_BCE;
176 if (!cpu_dai->active)
179 clk_enable(ssp->clk);
181 __raw_writel(sssr, ssp->mmio_base + SSSR);
183 __raw_writel(priv->cr0 & ~SSCR0_SSE, ssp->mmio_base + SSCR0);
184 __raw_writel(priv->cr1, ssp->mmio_base + SSCR1);
185 __raw_writel(priv->to, ssp->mmio_base + SSTO);
186 __raw_writel(priv->psp, ssp->mmio_base + SSPSP);
187 __raw_writel(priv->cr0 | SSCR0_SSE, ssp->mmio_base + SSCR0);
192 #define pxa_ssp_suspend NULL
193 #define pxa_ssp_resume NULL
197 * ssp_set_clkdiv - set SSP clock divider
198 * @div: serial clock rate divider
200 static void ssp_set_scr(struct ssp_device *ssp, u32 div)
202 u32 sscr0 = ssp_read_reg(ssp, SSCR0);
204 if (cpu_is_pxa25x() && ssp->type == PXA25x_SSP) {
205 sscr0 &= ~0x0000ff00;
206 sscr0 |= ((div - 2)/2) << 8; /* 2..512 */
208 sscr0 &= ~0x000fff00;
209 sscr0 |= (div - 1) << 8; /* 1..4096 */
211 ssp_write_reg(ssp, SSCR0, sscr0);
215 * ssp_get_clkdiv - get SSP clock divider
217 static u32 ssp_get_scr(struct ssp_device *ssp)
219 u32 sscr0 = ssp_read_reg(ssp, SSCR0);
222 if (cpu_is_pxa25x() && ssp->type == PXA25x_SSP)
223 div = ((sscr0 >> 8) & 0xff) * 2 + 2;
225 div = ((sscr0 >> 8) & 0xfff) + 1;
230 * Set the SSP ports SYSCLK.
232 static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
233 int clk_id, unsigned int freq, int dir)
235 struct ssp_priv *priv = cpu_dai->private_data;
236 struct ssp_device *ssp = priv->ssp;
239 u32 sscr0 = ssp_read_reg(ssp, SSCR0) &
240 ~(SSCR0_ECS | SSCR0_NCS | SSCR0_MOD | SSCR0_ACS);
242 dev_dbg(&ssp->pdev->dev,
243 "pxa_ssp_set_dai_sysclk id: %d, clk_id %d, freq %u\n",
244 cpu_dai->id, clk_id, freq);
247 case PXA_SSP_CLK_NET_PLL:
250 case PXA_SSP_CLK_PLL:
251 /* Internal PLL is fixed */
253 priv->sysclk = 1843200;
255 priv->sysclk = 13000000;
257 case PXA_SSP_CLK_EXT:
261 case PXA_SSP_CLK_NET:
263 sscr0 |= SSCR0_NCS | SSCR0_MOD;
265 case PXA_SSP_CLK_AUDIO:
274 /* The SSP clock must be disabled when changing SSP clock mode
275 * on PXA2xx. On PXA3xx it must be enabled when doing so. */
276 if (!cpu_is_pxa3xx())
277 clk_disable(ssp->clk);
278 val = ssp_read_reg(ssp, SSCR0) | sscr0;
279 ssp_write_reg(ssp, SSCR0, val);
280 if (!cpu_is_pxa3xx())
281 clk_enable(ssp->clk);
287 * Set the SSP clock dividers.
289 static int pxa_ssp_set_dai_clkdiv(struct snd_soc_dai *cpu_dai,
292 struct ssp_priv *priv = cpu_dai->private_data;
293 struct ssp_device *ssp = priv->ssp;
297 case PXA_SSP_AUDIO_DIV_ACDS:
298 val = (ssp_read_reg(ssp, SSACD) & ~0x7) | SSACD_ACDS(div);
299 ssp_write_reg(ssp, SSACD, val);
301 case PXA_SSP_AUDIO_DIV_SCDB:
302 val = ssp_read_reg(ssp, SSACD);
304 #if defined(CONFIG_PXA3xx)
309 case PXA_SSP_CLK_SCDB_1:
312 case PXA_SSP_CLK_SCDB_4:
314 #if defined(CONFIG_PXA3xx)
315 case PXA_SSP_CLK_SCDB_8:
325 ssp_write_reg(ssp, SSACD, val);
327 case PXA_SSP_DIV_SCR:
328 ssp_set_scr(ssp, div);
338 * Configure the PLL frequency pxa27x and (afaik - pxa320 only)
340 static int pxa_ssp_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id,
341 int source, unsigned int freq_in, unsigned int freq_out)
343 struct ssp_priv *priv = cpu_dai->private_data;
344 struct ssp_device *ssp = priv->ssp;
345 u32 ssacd = ssp_read_reg(ssp, SSACD) & ~0x70;
347 #if defined(CONFIG_PXA3xx)
349 ssp_write_reg(ssp, SSACDD, 0);
376 /* PXA3xx has a clock ditherer which can be used to generate
377 * a wider range of frequencies - calculate a value for it.
379 if (cpu_is_pxa3xx()) {
383 do_div(tmp, freq_out);
386 val = (val << 16) | 64;
387 ssp_write_reg(ssp, SSACDD, val);
391 dev_dbg(&ssp->pdev->dev,
392 "Using SSACDD %x to supply %uHz\n",
401 ssp_write_reg(ssp, SSACD, ssacd);
407 * Set the active slots in TDM/Network mode
409 static int pxa_ssp_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai,
410 unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width)
412 struct ssp_priv *priv = cpu_dai->private_data;
413 struct ssp_device *ssp = priv->ssp;
416 sscr0 = ssp_read_reg(ssp, SSCR0);
417 sscr0 &= ~(SSCR0_MOD | SSCR0_SlotsPerFrm(8) | SSCR0_EDSS | SSCR0_DSS);
421 sscr0 |= SSCR0_EDSS | SSCR0_DataSize(slot_width - 16);
423 sscr0 |= SSCR0_DataSize(slot_width);
426 /* enable network mode */
429 /* set number of active slots */
430 sscr0 |= SSCR0_SlotsPerFrm(slots);
432 /* set active slot mask */
433 ssp_write_reg(ssp, SSTSA, tx_mask);
434 ssp_write_reg(ssp, SSRSA, rx_mask);
436 ssp_write_reg(ssp, SSCR0, sscr0);
442 * Tristate the SSP DAI lines
444 static int pxa_ssp_set_dai_tristate(struct snd_soc_dai *cpu_dai,
447 struct ssp_priv *priv = cpu_dai->private_data;
448 struct ssp_device *ssp = priv->ssp;
451 sscr1 = ssp_read_reg(ssp, SSCR1);
456 ssp_write_reg(ssp, SSCR1, sscr1);
462 * Set up the SSP DAI format.
463 * The SSP Port must be inactive before calling this function as the
464 * physical interface format is changed.
466 static int pxa_ssp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
469 struct ssp_priv *priv = cpu_dai->private_data;
470 struct ssp_device *ssp = priv->ssp;
475 /* check if we need to change anything at all */
476 if (priv->dai_fmt == fmt)
479 /* we can only change the settings if the port is not in use */
480 if (ssp_read_reg(ssp, SSCR0) & SSCR0_SSE) {
481 dev_err(&ssp->pdev->dev,
482 "can't change hardware dai format: stream is in use");
486 /* reset port settings */
487 sscr0 = ssp_read_reg(ssp, SSCR0) &
488 (SSCR0_ECS | SSCR0_NCS | SSCR0_MOD | SSCR0_ACS);
489 sscr1 = SSCR1_RxTresh(8) | SSCR1_TxTresh(7);
492 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
493 case SND_SOC_DAIFMT_CBM_CFM:
494 sscr1 |= SSCR1_SCLKDIR | SSCR1_SFRMDIR;
496 case SND_SOC_DAIFMT_CBM_CFS:
497 sscr1 |= SSCR1_SCLKDIR;
499 case SND_SOC_DAIFMT_CBS_CFS:
505 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
506 case SND_SOC_DAIFMT_NB_NF:
507 sspsp |= SSPSP_SFRMP;
509 case SND_SOC_DAIFMT_NB_IF:
511 case SND_SOC_DAIFMT_IB_IF:
512 sspsp |= SSPSP_SCMODE(2);
514 case SND_SOC_DAIFMT_IB_NF:
515 sspsp |= SSPSP_SCMODE(2) | SSPSP_SFRMP;
521 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
522 case SND_SOC_DAIFMT_I2S:
524 sscr1 |= SSCR1_RWOT | SSCR1_TRAIL;
525 /* See hw_params() */
528 case SND_SOC_DAIFMT_DSP_A:
530 case SND_SOC_DAIFMT_DSP_B:
531 sscr0 |= SSCR0_MOD | SSCR0_PSP;
532 sscr1 |= SSCR1_TRAIL | SSCR1_RWOT;
539 ssp_write_reg(ssp, SSCR0, sscr0);
540 ssp_write_reg(ssp, SSCR1, sscr1);
541 ssp_write_reg(ssp, SSPSP, sspsp);
545 /* Since we are configuring the timings for the format by hand
546 * we have to defer some things until hw_params() where we
547 * know parameters like the sample size.
555 * Set the SSP audio DMA parameters and sample size.
556 * Can be called multiple times by oss emulation.
558 static int pxa_ssp_hw_params(struct snd_pcm_substream *substream,
559 struct snd_pcm_hw_params *params,
560 struct snd_soc_dai *dai)
562 struct snd_soc_pcm_runtime *rtd = substream->private_data;
563 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
564 struct ssp_priv *priv = cpu_dai->private_data;
565 struct ssp_device *ssp = priv->ssp;
566 int chn = params_channels(params);
569 int width = snd_pcm_format_physical_width(params_format(params));
570 int ttsa = ssp_read_reg(ssp, SSTSA) & 0xf;
572 /* generate correct DMA params */
573 if (cpu_dai->dma_data)
574 kfree(cpu_dai->dma_data);
576 /* Network mode with one active slot (ttsa == 1) can be used
577 * to force 16-bit frame width on the wire (for S16_LE), even
578 * with two channels. Use 16-bit DMA transfers for this case.
580 cpu_dai->dma_data = ssp_get_dma_params(ssp,
581 ((chn == 2) && (ttsa != 1)) || (width == 32),
582 substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
584 /* we can only change the settings if the port is not in use */
585 if (ssp_read_reg(ssp, SSCR0) & SSCR0_SSE)
588 /* clear selected SSP bits */
589 sscr0 = ssp_read_reg(ssp, SSCR0) & ~(SSCR0_DSS | SSCR0_EDSS);
590 ssp_write_reg(ssp, SSCR0, sscr0);
593 sscr0 = ssp_read_reg(ssp, SSCR0);
594 switch (params_format(params)) {
595 case SNDRV_PCM_FORMAT_S16_LE:
598 sscr0 |= SSCR0_FPCKE;
600 sscr0 |= SSCR0_DataSize(16);
602 case SNDRV_PCM_FORMAT_S24_LE:
603 sscr0 |= (SSCR0_EDSS | SSCR0_DataSize(8));
605 case SNDRV_PCM_FORMAT_S32_LE:
606 sscr0 |= (SSCR0_EDSS | SSCR0_DataSize(16));
609 ssp_write_reg(ssp, SSCR0, sscr0);
611 switch (priv->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
612 case SND_SOC_DAIFMT_I2S:
613 sspsp = ssp_read_reg(ssp, SSPSP);
615 if ((ssp_get_scr(ssp) == 4) && (width == 16)) {
616 /* This is a special case where the bitclk is 64fs
617 * and we're not dealing with 2*32 bits of audio
620 * The SSP values used for that are all found out by
621 * trying and failing a lot; some of the registers
622 * needed for that mode are only available on PXA3xx.
626 if (!cpu_is_pxa3xx())
629 sspsp |= SSPSP_SFRMWDTH(width * 2);
630 sspsp |= SSPSP_SFRMDLY(width * 4);
631 sspsp |= SSPSP_EDMYSTOP(3);
632 sspsp |= SSPSP_DMYSTOP(3);
633 sspsp |= SSPSP_DMYSTRT(1);
638 /* The frame width is the width the LRCLK is
639 * asserted for; the delay is expressed in
640 * half cycle units. We need the extra cycle
641 * because the data starts clocking out one BCLK
642 * after LRCLK changes polarity.
644 sspsp |= SSPSP_SFRMWDTH(width + 1);
645 sspsp |= SSPSP_SFRMDLY((width + 1) * 2);
646 sspsp |= SSPSP_DMYSTRT(1);
649 ssp_write_reg(ssp, SSPSP, sspsp);
655 /* When we use a network mode, we always require TDM slots
656 * - complain loudly and fail if they've not been set up yet.
658 if ((sscr0 & SSCR0_MOD) && !ttsa) {
659 dev_err(&ssp->pdev->dev, "No TDM timeslot configured\n");
668 static int pxa_ssp_trigger(struct snd_pcm_substream *substream, int cmd,
669 struct snd_soc_dai *dai)
671 struct snd_soc_pcm_runtime *rtd = substream->private_data;
672 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
674 struct ssp_priv *priv = cpu_dai->private_data;
675 struct ssp_device *ssp = priv->ssp;
679 case SNDRV_PCM_TRIGGER_RESUME:
682 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
683 val = ssp_read_reg(ssp, SSCR1);
684 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
688 ssp_write_reg(ssp, SSCR1, val);
689 val = ssp_read_reg(ssp, SSSR);
690 ssp_write_reg(ssp, SSSR, val);
692 case SNDRV_PCM_TRIGGER_START:
693 val = ssp_read_reg(ssp, SSCR1);
694 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
698 ssp_write_reg(ssp, SSCR1, val);
701 case SNDRV_PCM_TRIGGER_STOP:
702 val = ssp_read_reg(ssp, SSCR1);
703 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
707 ssp_write_reg(ssp, SSCR1, val);
709 case SNDRV_PCM_TRIGGER_SUSPEND:
712 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
713 val = ssp_read_reg(ssp, SSCR1);
714 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
718 ssp_write_reg(ssp, SSCR1, val);
730 static int pxa_ssp_probe(struct platform_device *pdev,
731 struct snd_soc_dai *dai)
733 struct ssp_priv *priv;
736 priv = kzalloc(sizeof(struct ssp_priv), GFP_KERNEL);
740 priv->ssp = ssp_request(dai->id + 1, "SoC audio");
741 if (priv->ssp == NULL) {
746 priv->dai_fmt = (unsigned int) -1;
747 dai->private_data = priv;
756 static void pxa_ssp_remove(struct platform_device *pdev,
757 struct snd_soc_dai *dai)
759 struct ssp_priv *priv = dai->private_data;
763 #define PXA_SSP_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
764 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \
765 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | \
766 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
768 #define PXA_SSP_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
769 SNDRV_PCM_FMTBIT_S24_LE | \
770 SNDRV_PCM_FMTBIT_S32_LE)
772 static struct snd_soc_dai_ops pxa_ssp_dai_ops = {
773 .startup = pxa_ssp_startup,
774 .shutdown = pxa_ssp_shutdown,
775 .trigger = pxa_ssp_trigger,
776 .hw_params = pxa_ssp_hw_params,
777 .set_sysclk = pxa_ssp_set_dai_sysclk,
778 .set_clkdiv = pxa_ssp_set_dai_clkdiv,
779 .set_pll = pxa_ssp_set_dai_pll,
780 .set_fmt = pxa_ssp_set_dai_fmt,
781 .set_tdm_slot = pxa_ssp_set_dai_tdm_slot,
782 .set_tristate = pxa_ssp_set_dai_tristate,
785 struct snd_soc_dai pxa_ssp_dai[] = {
787 .name = "pxa2xx-ssp1",
789 .probe = pxa_ssp_probe,
790 .remove = pxa_ssp_remove,
791 .suspend = pxa_ssp_suspend,
792 .resume = pxa_ssp_resume,
796 .rates = PXA_SSP_RATES,
797 .formats = PXA_SSP_FORMATS,
802 .rates = PXA_SSP_RATES,
803 .formats = PXA_SSP_FORMATS,
805 .ops = &pxa_ssp_dai_ops,
807 { .name = "pxa2xx-ssp2",
809 .probe = pxa_ssp_probe,
810 .remove = pxa_ssp_remove,
811 .suspend = pxa_ssp_suspend,
812 .resume = pxa_ssp_resume,
816 .rates = PXA_SSP_RATES,
817 .formats = PXA_SSP_FORMATS,
822 .rates = PXA_SSP_RATES,
823 .formats = PXA_SSP_FORMATS,
825 .ops = &pxa_ssp_dai_ops,
828 .name = "pxa2xx-ssp3",
830 .probe = pxa_ssp_probe,
831 .remove = pxa_ssp_remove,
832 .suspend = pxa_ssp_suspend,
833 .resume = pxa_ssp_resume,
837 .rates = PXA_SSP_RATES,
838 .formats = PXA_SSP_FORMATS,
843 .rates = PXA_SSP_RATES,
844 .formats = PXA_SSP_FORMATS,
846 .ops = &pxa_ssp_dai_ops,
849 .name = "pxa2xx-ssp4",
851 .probe = pxa_ssp_probe,
852 .remove = pxa_ssp_remove,
853 .suspend = pxa_ssp_suspend,
854 .resume = pxa_ssp_resume,
858 .rates = PXA_SSP_RATES,
859 .formats = PXA_SSP_FORMATS,
864 .rates = PXA_SSP_RATES,
865 .formats = PXA_SSP_FORMATS,
867 .ops = &pxa_ssp_dai_ops,
870 EXPORT_SYMBOL_GPL(pxa_ssp_dai);
872 static int __init pxa_ssp_init(void)
874 return snd_soc_register_dais(pxa_ssp_dai, ARRAY_SIZE(pxa_ssp_dai));
876 module_init(pxa_ssp_init);
878 static void __exit pxa_ssp_exit(void)
880 snd_soc_unregister_dais(pxa_ssp_dai, ARRAY_SIZE(pxa_ssp_dai));
882 module_exit(pxa_ssp_exit);
884 /* Module information */
885 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
886 MODULE_DESCRIPTION("PXA SSP/PCM SoC Interface");
887 MODULE_LICENSE("GPL");