2 * omap-mcpdm.c -- OMAP ALSA SoC DAI driver using McPDM port
4 * Copyright (C) 2009 - 2011 Texas Instruments
6 * Author: Misael Lopez Cruz <misael.lopez@ti.com>
7 * Contact: Jorge Eduardo Candelaria <x0107209@ti.com>
8 * Margarita Olaya <magi.olaya@ti.com>
9 * Peter Ujfalusi <peter.ujfalusi@ti.com>
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * version 2 as published by the Free Software Foundation.
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
27 #include <linux/init.h>
28 #include <linux/module.h>
29 #include <linux/platform_device.h>
30 #include <linux/interrupt.h>
31 #include <linux/err.h>
33 #include <linux/irq.h>
34 #include <linux/slab.h>
35 #include <linux/pm_runtime.h>
36 #include <linux/of_device.h>
38 #include <sound/core.h>
39 #include <sound/pcm.h>
40 #include <sound/pcm_params.h>
41 #include <sound/soc.h>
44 #include <plat/omap_hwmod.h>
45 #include "omap-mcpdm.h"
48 #define OMAP44XX_MCPDM_L3_BASE 0x49032000
52 unsigned long phys_base;
53 void __iomem *io_base;
62 /* McPDM FIFO thresholds */
66 /* McPDM dn offsets for rx1, and 2 channels */
71 * Stream DMA parameters
73 static struct omap_pcm_dma_data omap_mcpdm_dai_dma_params[] = {
75 .name = "Audio playback",
76 .dma_req = OMAP44XX_DMA_MCPDM_DL,
77 .data_type = OMAP_DMA_DATA_TYPE_S32,
78 .sync_mode = OMAP_DMA_SYNC_PACKET,
79 .port_addr = OMAP44XX_MCPDM_L3_BASE + MCPDM_REG_DN_DATA,
82 .name = "Audio capture",
83 .dma_req = OMAP44XX_DMA_MCPDM_UP,
84 .data_type = OMAP_DMA_DATA_TYPE_S32,
85 .sync_mode = OMAP_DMA_SYNC_PACKET,
86 .port_addr = OMAP44XX_MCPDM_L3_BASE + MCPDM_REG_UP_DATA,
90 static inline void omap_mcpdm_write(struct omap_mcpdm *mcpdm, u16 reg, u32 val)
92 __raw_writel(val, mcpdm->io_base + reg);
95 static inline int omap_mcpdm_read(struct omap_mcpdm *mcpdm, u16 reg)
97 return __raw_readl(mcpdm->io_base + reg);
101 static void omap_mcpdm_reg_dump(struct omap_mcpdm *mcpdm)
103 dev_dbg(mcpdm->dev, "***********************\n");
104 dev_dbg(mcpdm->dev, "IRQSTATUS_RAW: 0x%04x\n",
105 omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS_RAW));
106 dev_dbg(mcpdm->dev, "IRQSTATUS: 0x%04x\n",
107 omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS));
108 dev_dbg(mcpdm->dev, "IRQENABLE_SET: 0x%04x\n",
109 omap_mcpdm_read(mcpdm, MCPDM_REG_IRQENABLE_SET));
110 dev_dbg(mcpdm->dev, "IRQENABLE_CLR: 0x%04x\n",
111 omap_mcpdm_read(mcpdm, MCPDM_REG_IRQENABLE_CLR));
112 dev_dbg(mcpdm->dev, "IRQWAKE_EN: 0x%04x\n",
113 omap_mcpdm_read(mcpdm, MCPDM_REG_IRQWAKE_EN));
114 dev_dbg(mcpdm->dev, "DMAENABLE_SET: 0x%04x\n",
115 omap_mcpdm_read(mcpdm, MCPDM_REG_DMAENABLE_SET));
116 dev_dbg(mcpdm->dev, "DMAENABLE_CLR: 0x%04x\n",
117 omap_mcpdm_read(mcpdm, MCPDM_REG_DMAENABLE_CLR));
118 dev_dbg(mcpdm->dev, "DMAWAKEEN: 0x%04x\n",
119 omap_mcpdm_read(mcpdm, MCPDM_REG_DMAWAKEEN));
120 dev_dbg(mcpdm->dev, "CTRL: 0x%04x\n",
121 omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL));
122 dev_dbg(mcpdm->dev, "DN_DATA: 0x%04x\n",
123 omap_mcpdm_read(mcpdm, MCPDM_REG_DN_DATA));
124 dev_dbg(mcpdm->dev, "UP_DATA: 0x%04x\n",
125 omap_mcpdm_read(mcpdm, MCPDM_REG_UP_DATA));
126 dev_dbg(mcpdm->dev, "FIFO_CTRL_DN: 0x%04x\n",
127 omap_mcpdm_read(mcpdm, MCPDM_REG_FIFO_CTRL_DN));
128 dev_dbg(mcpdm->dev, "FIFO_CTRL_UP: 0x%04x\n",
129 omap_mcpdm_read(mcpdm, MCPDM_REG_FIFO_CTRL_UP));
130 dev_dbg(mcpdm->dev, "***********************\n");
133 static void omap_mcpdm_reg_dump(struct omap_mcpdm *mcpdm) {}
137 * Enables the transfer through the PDM interface to/from the Phoenix
138 * codec by enabling the corresponding UP or DN channels.
140 static void omap_mcpdm_start(struct omap_mcpdm *mcpdm)
142 u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
144 ctrl |= (MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
145 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
147 ctrl |= mcpdm->dn_channels | mcpdm->up_channels;
148 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
150 ctrl &= ~(MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
151 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
155 * Disables the transfer through the PDM interface to/from the Phoenix
156 * codec by disabling the corresponding UP or DN channels.
158 static void omap_mcpdm_stop(struct omap_mcpdm *mcpdm)
160 u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
162 ctrl |= (MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
163 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
165 ctrl &= ~(mcpdm->dn_channels | mcpdm->up_channels);
166 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
168 ctrl &= ~(MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
169 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
174 * Is the physical McPDM interface active.
176 static inline int omap_mcpdm_active(struct omap_mcpdm *mcpdm)
178 return omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL) &
179 (MCPDM_PDM_DN_MASK | MCPDM_PDM_UP_MASK);
183 * Configures McPDM uplink, and downlink for audio.
184 * This function should be called before omap_mcpdm_start.
186 static void omap_mcpdm_open_streams(struct omap_mcpdm *mcpdm)
188 omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_SET,
189 MCPDM_DN_IRQ_EMPTY | MCPDM_DN_IRQ_FULL |
190 MCPDM_UP_IRQ_EMPTY | MCPDM_UP_IRQ_FULL);
192 /* Enable DN RX1/2 offset cancellation feature, if configured */
193 if (mcpdm->dn_rx_offset) {
194 u32 dn_offset = mcpdm->dn_rx_offset;
196 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, dn_offset);
197 dn_offset |= (MCPDM_DN_OFST_RX1_EN | MCPDM_DN_OFST_RX2_EN);
198 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, dn_offset);
201 omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_DN, mcpdm->dn_threshold);
202 omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_UP, mcpdm->up_threshold);
204 omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_SET,
205 MCPDM_DMA_DN_ENABLE | MCPDM_DMA_UP_ENABLE);
209 * Cleans McPDM uplink, and downlink configuration.
210 * This function should be called when the stream is closed.
212 static void omap_mcpdm_close_streams(struct omap_mcpdm *mcpdm)
214 /* Disable irq request generation for downlink */
215 omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_CLR,
216 MCPDM_DN_IRQ_EMPTY | MCPDM_DN_IRQ_FULL);
218 /* Disable DMA request generation for downlink */
219 omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_CLR, MCPDM_DMA_DN_ENABLE);
221 /* Disable irq request generation for uplink */
222 omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_CLR,
223 MCPDM_UP_IRQ_EMPTY | MCPDM_UP_IRQ_FULL);
225 /* Disable DMA request generation for uplink */
226 omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_CLR, MCPDM_DMA_UP_ENABLE);
228 /* Disable RX1/2 offset cancellation */
229 if (mcpdm->dn_rx_offset)
230 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, 0);
233 static irqreturn_t omap_mcpdm_irq_handler(int irq, void *dev_id)
235 struct omap_mcpdm *mcpdm = dev_id;
238 irq_status = omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS);
240 /* Acknowledge irq event */
241 omap_mcpdm_write(mcpdm, MCPDM_REG_IRQSTATUS, irq_status);
243 if (irq_status & MCPDM_DN_IRQ_FULL)
244 dev_dbg(mcpdm->dev, "DN (playback) FIFO Full\n");
246 if (irq_status & MCPDM_DN_IRQ_EMPTY)
247 dev_dbg(mcpdm->dev, "DN (playback) FIFO Empty\n");
249 if (irq_status & MCPDM_DN_IRQ)
250 dev_dbg(mcpdm->dev, "DN (playback) write request\n");
252 if (irq_status & MCPDM_UP_IRQ_FULL)
253 dev_dbg(mcpdm->dev, "UP (capture) FIFO Full\n");
255 if (irq_status & MCPDM_UP_IRQ_EMPTY)
256 dev_dbg(mcpdm->dev, "UP (capture) FIFO Empty\n");
258 if (irq_status & MCPDM_UP_IRQ)
259 dev_dbg(mcpdm->dev, "UP (capture) write request\n");
264 static int omap_mcpdm_dai_startup(struct snd_pcm_substream *substream,
265 struct snd_soc_dai *dai)
267 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
269 mutex_lock(&mcpdm->mutex);
272 /* Enable watch dog for ES above ES 1.0 to avoid saturation */
273 if (omap_rev() != OMAP4430_REV_ES1_0) {
274 u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
276 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL,
279 omap_mcpdm_open_streams(mcpdm);
282 mutex_unlock(&mcpdm->mutex);
287 static void omap_mcpdm_dai_shutdown(struct snd_pcm_substream *substream,
288 struct snd_soc_dai *dai)
290 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
292 mutex_lock(&mcpdm->mutex);
295 if (omap_mcpdm_active(mcpdm)) {
296 omap_mcpdm_stop(mcpdm);
297 omap_mcpdm_close_streams(mcpdm);
301 mutex_unlock(&mcpdm->mutex);
304 static int omap_mcpdm_dai_hw_params(struct snd_pcm_substream *substream,
305 struct snd_pcm_hw_params *params,
306 struct snd_soc_dai *dai)
308 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
309 int stream = substream->stream;
310 struct omap_pcm_dma_data *dma_data;
314 channels = params_channels(params);
317 if (stream == SNDRV_PCM_STREAM_CAPTURE)
318 /* up to 3 channels for capture */
322 if (stream == SNDRV_PCM_STREAM_CAPTURE)
323 /* up to 3 channels for capture */
334 /* unsupported number of channels */
338 dma_data = &omap_mcpdm_dai_dma_params[stream];
340 /* Configure McPDM channels, and DMA packet size */
341 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
342 mcpdm->dn_channels = link_mask << 3;
343 dma_data->packet_size =
344 (MCPDM_DN_THRES_MAX - mcpdm->dn_threshold) * channels;
346 mcpdm->up_channels = link_mask << 0;
347 dma_data->packet_size = mcpdm->up_threshold * channels;
350 snd_soc_dai_set_dma_data(dai, substream, dma_data);
355 static int omap_mcpdm_prepare(struct snd_pcm_substream *substream,
356 struct snd_soc_dai *dai)
358 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
360 if (!omap_mcpdm_active(mcpdm)) {
361 omap_mcpdm_start(mcpdm);
362 omap_mcpdm_reg_dump(mcpdm);
368 static const struct snd_soc_dai_ops omap_mcpdm_dai_ops = {
369 .startup = omap_mcpdm_dai_startup,
370 .shutdown = omap_mcpdm_dai_shutdown,
371 .hw_params = omap_mcpdm_dai_hw_params,
372 .prepare = omap_mcpdm_prepare,
375 static int omap_mcpdm_probe(struct snd_soc_dai *dai)
377 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
380 pm_runtime_enable(mcpdm->dev);
382 /* Disable lines while request is ongoing */
383 pm_runtime_get_sync(mcpdm->dev);
384 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, 0x00);
386 ret = request_irq(mcpdm->irq, omap_mcpdm_irq_handler,
387 0, "McPDM", (void *)mcpdm);
389 pm_runtime_put_sync(mcpdm->dev);
392 dev_err(mcpdm->dev, "Request for IRQ failed\n");
393 pm_runtime_disable(mcpdm->dev);
396 /* Configure McPDM threshold values */
397 mcpdm->dn_threshold = 2;
398 mcpdm->up_threshold = MCPDM_UP_THRES_MAX - 3;
402 static int omap_mcpdm_remove(struct snd_soc_dai *dai)
404 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
406 free_irq(mcpdm->irq, (void *)mcpdm);
407 pm_runtime_disable(mcpdm->dev);
412 #define OMAP_MCPDM_RATES (SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
413 #define OMAP_MCPDM_FORMATS SNDRV_PCM_FMTBIT_S32_LE
415 static struct snd_soc_dai_driver omap_mcpdm_dai = {
416 .probe = omap_mcpdm_probe,
417 .remove = omap_mcpdm_remove,
418 .probe_order = SND_SOC_COMP_ORDER_LATE,
419 .remove_order = SND_SOC_COMP_ORDER_EARLY,
423 .rates = OMAP_MCPDM_RATES,
424 .formats = OMAP_MCPDM_FORMATS,
430 .rates = OMAP_MCPDM_RATES,
431 .formats = OMAP_MCPDM_FORMATS,
434 .ops = &omap_mcpdm_dai_ops,
437 void omap_mcpdm_configure_dn_offsets(struct snd_soc_pcm_runtime *rtd,
440 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(rtd->cpu_dai);
442 mcpdm->dn_rx_offset = MCPDM_DNOFST_RX1(rx1) | MCPDM_DNOFST_RX2(rx2);
444 EXPORT_SYMBOL_GPL(omap_mcpdm_configure_dn_offsets);
446 static __devinit int asoc_mcpdm_probe(struct platform_device *pdev)
448 struct omap_mcpdm *mcpdm;
449 struct resource *res;
452 mcpdm = kzalloc(sizeof(struct omap_mcpdm), GFP_KERNEL);
456 platform_set_drvdata(pdev, mcpdm);
458 mutex_init(&mcpdm->mutex);
460 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
462 dev_err(&pdev->dev, "no resource\n");
466 if (!request_mem_region(res->start, resource_size(res), "McPDM")) {
471 mcpdm->io_base = ioremap(res->start, resource_size(res));
472 if (!mcpdm->io_base) {
477 mcpdm->irq = platform_get_irq(pdev, 0);
478 if (mcpdm->irq < 0) {
483 mcpdm->dev = &pdev->dev;
485 ret = snd_soc_register_dai(&pdev->dev, &omap_mcpdm_dai);
490 iounmap(mcpdm->io_base);
492 release_mem_region(res->start, resource_size(res));
498 static int __devexit asoc_mcpdm_remove(struct platform_device *pdev)
500 struct omap_mcpdm *mcpdm = platform_get_drvdata(pdev);
501 struct resource *res;
503 snd_soc_unregister_dai(&pdev->dev);
505 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
506 iounmap(mcpdm->io_base);
507 release_mem_region(res->start, resource_size(res));
513 static const struct of_device_id omap_mcpdm_of_match[] = {
514 { .compatible = "ti,omap4-mcpdm", },
517 MODULE_DEVICE_TABLE(of, omap_mcpdm_of_match);
519 static struct platform_driver asoc_mcpdm_driver = {
521 .name = "omap-mcpdm",
522 .owner = THIS_MODULE,
523 .of_match_table = omap_mcpdm_of_match,
526 .probe = asoc_mcpdm_probe,
527 .remove = __devexit_p(asoc_mcpdm_remove),
530 module_platform_driver(asoc_mcpdm_driver);
532 MODULE_ALIAS("platform:omap-mcpdm");
533 MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>");
534 MODULE_DESCRIPTION("OMAP PDM SoC Interface");
535 MODULE_LICENSE("GPL");