2 * omap-mcpdm.c -- OMAP ALSA SoC DAI driver using McPDM port
4 * Copyright (C) 2009 - 2011 Texas Instruments
6 * Author: Misael Lopez Cruz <misael.lopez@ti.com>
7 * Contact: Jorge Eduardo Candelaria <x0107209@ti.com>
8 * Margarita Olaya <magi.olaya@ti.com>
9 * Peter Ujfalusi <peter.ujfalusi@ti.com>
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * version 2 as published by the Free Software Foundation.
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
27 #include <linux/init.h>
28 #include <linux/module.h>
29 #include <linux/platform_device.h>
30 #include <linux/interrupt.h>
31 #include <linux/err.h>
33 #include <linux/irq.h>
34 #include <linux/slab.h>
35 #include <linux/pm_runtime.h>
36 #include <linux/of_device.h>
38 #include <sound/core.h>
39 #include <sound/pcm.h>
40 #include <sound/pcm_params.h>
41 #include <sound/soc.h>
43 #include <plat/omap_hwmod.h>
44 #include "omap-mcpdm.h"
47 #define OMAP44XX_MCPDM_L3_BASE 0x49032000
51 unsigned long phys_base;
52 void __iomem *io_base;
61 /* McPDM FIFO thresholds */
65 /* McPDM dn offsets for rx1, and 2 channels */
70 * Stream DMA parameters
72 static struct omap_pcm_dma_data omap_mcpdm_dai_dma_params[] = {
74 .name = "Audio playback",
77 .name = "Audio capture",
81 static inline void omap_mcpdm_write(struct omap_mcpdm *mcpdm, u16 reg, u32 val)
83 __raw_writel(val, mcpdm->io_base + reg);
86 static inline int omap_mcpdm_read(struct omap_mcpdm *mcpdm, u16 reg)
88 return __raw_readl(mcpdm->io_base + reg);
92 static void omap_mcpdm_reg_dump(struct omap_mcpdm *mcpdm)
94 dev_dbg(mcpdm->dev, "***********************\n");
95 dev_dbg(mcpdm->dev, "IRQSTATUS_RAW: 0x%04x\n",
96 omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS_RAW));
97 dev_dbg(mcpdm->dev, "IRQSTATUS: 0x%04x\n",
98 omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS));
99 dev_dbg(mcpdm->dev, "IRQENABLE_SET: 0x%04x\n",
100 omap_mcpdm_read(mcpdm, MCPDM_REG_IRQENABLE_SET));
101 dev_dbg(mcpdm->dev, "IRQENABLE_CLR: 0x%04x\n",
102 omap_mcpdm_read(mcpdm, MCPDM_REG_IRQENABLE_CLR));
103 dev_dbg(mcpdm->dev, "IRQWAKE_EN: 0x%04x\n",
104 omap_mcpdm_read(mcpdm, MCPDM_REG_IRQWAKE_EN));
105 dev_dbg(mcpdm->dev, "DMAENABLE_SET: 0x%04x\n",
106 omap_mcpdm_read(mcpdm, MCPDM_REG_DMAENABLE_SET));
107 dev_dbg(mcpdm->dev, "DMAENABLE_CLR: 0x%04x\n",
108 omap_mcpdm_read(mcpdm, MCPDM_REG_DMAENABLE_CLR));
109 dev_dbg(mcpdm->dev, "DMAWAKEEN: 0x%04x\n",
110 omap_mcpdm_read(mcpdm, MCPDM_REG_DMAWAKEEN));
111 dev_dbg(mcpdm->dev, "CTRL: 0x%04x\n",
112 omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL));
113 dev_dbg(mcpdm->dev, "DN_DATA: 0x%04x\n",
114 omap_mcpdm_read(mcpdm, MCPDM_REG_DN_DATA));
115 dev_dbg(mcpdm->dev, "UP_DATA: 0x%04x\n",
116 omap_mcpdm_read(mcpdm, MCPDM_REG_UP_DATA));
117 dev_dbg(mcpdm->dev, "FIFO_CTRL_DN: 0x%04x\n",
118 omap_mcpdm_read(mcpdm, MCPDM_REG_FIFO_CTRL_DN));
119 dev_dbg(mcpdm->dev, "FIFO_CTRL_UP: 0x%04x\n",
120 omap_mcpdm_read(mcpdm, MCPDM_REG_FIFO_CTRL_UP));
121 dev_dbg(mcpdm->dev, "***********************\n");
124 static void omap_mcpdm_reg_dump(struct omap_mcpdm *mcpdm) {}
128 * Enables the transfer through the PDM interface to/from the Phoenix
129 * codec by enabling the corresponding UP or DN channels.
131 static void omap_mcpdm_start(struct omap_mcpdm *mcpdm)
133 u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
135 ctrl |= (MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
136 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
138 ctrl |= mcpdm->dn_channels | mcpdm->up_channels;
139 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
141 ctrl &= ~(MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
142 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
146 * Disables the transfer through the PDM interface to/from the Phoenix
147 * codec by disabling the corresponding UP or DN channels.
149 static void omap_mcpdm_stop(struct omap_mcpdm *mcpdm)
151 u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
153 ctrl |= (MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
154 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
156 ctrl &= ~(mcpdm->dn_channels | mcpdm->up_channels);
157 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
159 ctrl &= ~(MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
160 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
165 * Is the physical McPDM interface active.
167 static inline int omap_mcpdm_active(struct omap_mcpdm *mcpdm)
169 return omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL) &
170 (MCPDM_PDM_DN_MASK | MCPDM_PDM_UP_MASK);
174 * Configures McPDM uplink, and downlink for audio.
175 * This function should be called before omap_mcpdm_start.
177 static void omap_mcpdm_open_streams(struct omap_mcpdm *mcpdm)
179 omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_SET,
180 MCPDM_DN_IRQ_EMPTY | MCPDM_DN_IRQ_FULL |
181 MCPDM_UP_IRQ_EMPTY | MCPDM_UP_IRQ_FULL);
183 /* Enable DN RX1/2 offset cancellation feature, if configured */
184 if (mcpdm->dn_rx_offset) {
185 u32 dn_offset = mcpdm->dn_rx_offset;
187 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, dn_offset);
188 dn_offset |= (MCPDM_DN_OFST_RX1_EN | MCPDM_DN_OFST_RX2_EN);
189 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, dn_offset);
192 omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_DN, mcpdm->dn_threshold);
193 omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_UP, mcpdm->up_threshold);
195 omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_SET,
196 MCPDM_DMA_DN_ENABLE | MCPDM_DMA_UP_ENABLE);
200 * Cleans McPDM uplink, and downlink configuration.
201 * This function should be called when the stream is closed.
203 static void omap_mcpdm_close_streams(struct omap_mcpdm *mcpdm)
205 /* Disable irq request generation for downlink */
206 omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_CLR,
207 MCPDM_DN_IRQ_EMPTY | MCPDM_DN_IRQ_FULL);
209 /* Disable DMA request generation for downlink */
210 omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_CLR, MCPDM_DMA_DN_ENABLE);
212 /* Disable irq request generation for uplink */
213 omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_CLR,
214 MCPDM_UP_IRQ_EMPTY | MCPDM_UP_IRQ_FULL);
216 /* Disable DMA request generation for uplink */
217 omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_CLR, MCPDM_DMA_UP_ENABLE);
219 /* Disable RX1/2 offset cancellation */
220 if (mcpdm->dn_rx_offset)
221 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, 0);
224 static irqreturn_t omap_mcpdm_irq_handler(int irq, void *dev_id)
226 struct omap_mcpdm *mcpdm = dev_id;
229 irq_status = omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS);
231 /* Acknowledge irq event */
232 omap_mcpdm_write(mcpdm, MCPDM_REG_IRQSTATUS, irq_status);
234 if (irq_status & MCPDM_DN_IRQ_FULL)
235 dev_dbg(mcpdm->dev, "DN (playback) FIFO Full\n");
237 if (irq_status & MCPDM_DN_IRQ_EMPTY)
238 dev_dbg(mcpdm->dev, "DN (playback) FIFO Empty\n");
240 if (irq_status & MCPDM_DN_IRQ)
241 dev_dbg(mcpdm->dev, "DN (playback) write request\n");
243 if (irq_status & MCPDM_UP_IRQ_FULL)
244 dev_dbg(mcpdm->dev, "UP (capture) FIFO Full\n");
246 if (irq_status & MCPDM_UP_IRQ_EMPTY)
247 dev_dbg(mcpdm->dev, "UP (capture) FIFO Empty\n");
249 if (irq_status & MCPDM_UP_IRQ)
250 dev_dbg(mcpdm->dev, "UP (capture) write request\n");
255 static int omap_mcpdm_dai_startup(struct snd_pcm_substream *substream,
256 struct snd_soc_dai *dai)
258 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
260 mutex_lock(&mcpdm->mutex);
263 /* Enable watch dog for ES above ES 1.0 to avoid saturation */
264 if (omap_rev() != OMAP4430_REV_ES1_0) {
265 u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
267 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL,
270 omap_mcpdm_open_streams(mcpdm);
272 mutex_unlock(&mcpdm->mutex);
274 snd_soc_dai_set_dma_data(dai, substream,
275 &omap_mcpdm_dai_dma_params[substream->stream]);
280 static void omap_mcpdm_dai_shutdown(struct snd_pcm_substream *substream,
281 struct snd_soc_dai *dai)
283 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
285 mutex_lock(&mcpdm->mutex);
288 if (omap_mcpdm_active(mcpdm)) {
289 omap_mcpdm_stop(mcpdm);
290 omap_mcpdm_close_streams(mcpdm);
294 mutex_unlock(&mcpdm->mutex);
297 static int omap_mcpdm_dai_hw_params(struct snd_pcm_substream *substream,
298 struct snd_pcm_hw_params *params,
299 struct snd_soc_dai *dai)
301 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
302 int stream = substream->stream;
303 struct omap_pcm_dma_data *dma_data;
307 channels = params_channels(params);
310 if (stream == SNDRV_PCM_STREAM_CAPTURE)
311 /* up to 3 channels for capture */
315 if (stream == SNDRV_PCM_STREAM_CAPTURE)
316 /* up to 3 channels for capture */
327 /* unsupported number of channels */
331 dma_data = snd_soc_dai_get_dma_data(dai, substream);
333 /* Configure McPDM channels, and DMA packet size */
334 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
335 mcpdm->dn_channels = link_mask << 3;
336 dma_data->packet_size =
337 (MCPDM_DN_THRES_MAX - mcpdm->dn_threshold) * channels;
339 mcpdm->up_channels = link_mask << 0;
340 dma_data->packet_size = mcpdm->up_threshold * channels;
346 static int omap_mcpdm_prepare(struct snd_pcm_substream *substream,
347 struct snd_soc_dai *dai)
349 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
351 if (!omap_mcpdm_active(mcpdm)) {
352 omap_mcpdm_start(mcpdm);
353 omap_mcpdm_reg_dump(mcpdm);
359 static const struct snd_soc_dai_ops omap_mcpdm_dai_ops = {
360 .startup = omap_mcpdm_dai_startup,
361 .shutdown = omap_mcpdm_dai_shutdown,
362 .hw_params = omap_mcpdm_dai_hw_params,
363 .prepare = omap_mcpdm_prepare,
366 static int omap_mcpdm_probe(struct snd_soc_dai *dai)
368 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
371 pm_runtime_enable(mcpdm->dev);
373 /* Disable lines while request is ongoing */
374 pm_runtime_get_sync(mcpdm->dev);
375 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, 0x00);
377 ret = request_irq(mcpdm->irq, omap_mcpdm_irq_handler,
378 0, "McPDM", (void *)mcpdm);
380 pm_runtime_put_sync(mcpdm->dev);
383 dev_err(mcpdm->dev, "Request for IRQ failed\n");
384 pm_runtime_disable(mcpdm->dev);
387 /* Configure McPDM threshold values */
388 mcpdm->dn_threshold = 2;
389 mcpdm->up_threshold = MCPDM_UP_THRES_MAX - 3;
393 static int omap_mcpdm_remove(struct snd_soc_dai *dai)
395 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
397 free_irq(mcpdm->irq, (void *)mcpdm);
398 pm_runtime_disable(mcpdm->dev);
403 #define OMAP_MCPDM_RATES (SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
404 #define OMAP_MCPDM_FORMATS SNDRV_PCM_FMTBIT_S32_LE
406 static struct snd_soc_dai_driver omap_mcpdm_dai = {
407 .probe = omap_mcpdm_probe,
408 .remove = omap_mcpdm_remove,
409 .probe_order = SND_SOC_COMP_ORDER_LATE,
410 .remove_order = SND_SOC_COMP_ORDER_EARLY,
414 .rates = OMAP_MCPDM_RATES,
415 .formats = OMAP_MCPDM_FORMATS,
421 .rates = OMAP_MCPDM_RATES,
422 .formats = OMAP_MCPDM_FORMATS,
425 .ops = &omap_mcpdm_dai_ops,
428 void omap_mcpdm_configure_dn_offsets(struct snd_soc_pcm_runtime *rtd,
431 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(rtd->cpu_dai);
433 mcpdm->dn_rx_offset = MCPDM_DNOFST_RX1(rx1) | MCPDM_DNOFST_RX2(rx2);
435 EXPORT_SYMBOL_GPL(omap_mcpdm_configure_dn_offsets);
437 static __devinit int asoc_mcpdm_probe(struct platform_device *pdev)
439 struct omap_mcpdm *mcpdm;
440 struct resource *res;
442 mcpdm = devm_kzalloc(&pdev->dev, sizeof(struct omap_mcpdm), GFP_KERNEL);
446 platform_set_drvdata(pdev, mcpdm);
448 mutex_init(&mcpdm->mutex);
450 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma");
454 omap_mcpdm_dai_dma_params[0].port_addr = res->start + MCPDM_REG_DN_DATA;
455 omap_mcpdm_dai_dma_params[1].port_addr = res->start + MCPDM_REG_UP_DATA;
457 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
461 res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "dn_link");
465 omap_mcpdm_dai_dma_params[0].dma_req = res->start;
467 res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "up_link");
471 omap_mcpdm_dai_dma_params[1].dma_req = res->start;
473 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu");
477 if (!devm_request_mem_region(&pdev->dev, res->start,
478 resource_size(res), "McPDM"))
481 mcpdm->io_base = devm_ioremap(&pdev->dev, res->start,
486 mcpdm->irq = platform_get_irq(pdev, 0);
490 mcpdm->dev = &pdev->dev;
492 return snd_soc_register_dai(&pdev->dev, &omap_mcpdm_dai);
495 static int __devexit asoc_mcpdm_remove(struct platform_device *pdev)
497 snd_soc_unregister_dai(&pdev->dev);
501 static const struct of_device_id omap_mcpdm_of_match[] = {
502 { .compatible = "ti,omap4-mcpdm", },
505 MODULE_DEVICE_TABLE(of, omap_mcpdm_of_match);
507 static struct platform_driver asoc_mcpdm_driver = {
509 .name = "omap-mcpdm",
510 .owner = THIS_MODULE,
511 .of_match_table = omap_mcpdm_of_match,
514 .probe = asoc_mcpdm_probe,
515 .remove = __devexit_p(asoc_mcpdm_remove),
518 module_platform_driver(asoc_mcpdm_driver);
520 MODULE_ALIAS("platform:omap-mcpdm");
521 MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>");
522 MODULE_DESCRIPTION("OMAP PDM SoC Interface");
523 MODULE_LICENSE("GPL");