sound/soc/omap/omap-mcpdm.c

   1 /*
   2  * omap-mcpdm.c  --  OMAP ALSA SoC DAI driver using McPDM port
   3  *
   4  * Copyright (C) 2009 - 2011 Texas Instruments
   5  *
   6  * Author: Misael Lopez Cruz <misael.lopez@ti.com>
   7  * Contact: Jorge Eduardo Candelaria <x0107209@ti.com>
   8  *          Margarita Olaya <magi.olaya@ti.com>
   9  *          Peter Ujfalusi <peter.ujfalusi@ti.com>
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License
  13  * version 2 as published by the Free Software Foundation.
  14  *
  15  * This program is distributed in the hope that it will be useful, but
  16  * WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18  * General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  23  * 02110-1301 USA
  24  *
  25  */
  26
  27 #include <linux/init.h>
  28 #include <linux/module.h>
  29 #include <linux/platform_device.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/err.h>
  32 #include <linux/io.h>
  33 #include <linux/irq.h>
  34 #include <linux/slab.h>
  35 #include <linux/pm_runtime.h>
  36 #include <linux/of_device.h>
  37
  38 #include <sound/core.h>
  39 #include <sound/pcm.h>
  40 #include <sound/pcm_params.h>
  41 #include <sound/soc.h>
  42
  43 #include "omap-mcpdm.h"
  44 #include "omap-pcm.h"
  45
  46 struct omap_mcpdm {
  47         struct device *dev;
  48         unsigned long phys_base;
  49         void __iomem *io_base;
  50         int irq;
  51
  52         struct mutex mutex;
  53
  54         /* channel data */
  55         u32 dn_channels;
  56         u32 up_channels;
  57
  58         /* McPDM FIFO thresholds */
  59         u32 dn_threshold;
  60         u32 up_threshold;
  61
  62         /* McPDM dn offsets for rx1, and 2 channels */
  63         u32 dn_rx_offset;
  64 };
  65
  66 /*
  67  * Stream DMA parameters
  68  */
  69 static struct omap_pcm_dma_data omap_mcpdm_dai_dma_params[] = {
  70         {
  71                 .name = "Audio playback",
  72         },
  73         {
  74                 .name = "Audio capture",
  75         },
  76 };
  77
  78 static inline void omap_mcpdm_write(struct omap_mcpdm *mcpdm, u16 reg, u32 val)
  79 {
  80         __raw_writel(val, mcpdm->io_base + reg);
  81 }
  82
  83 static inline int omap_mcpdm_read(struct omap_mcpdm *mcpdm, u16 reg)
  84 {
  85         return __raw_readl(mcpdm->io_base + reg);
  86 }
  87
  88 #ifdef DEBUG
  89 static void omap_mcpdm_reg_dump(struct omap_mcpdm *mcpdm)
  90 {
  91         dev_dbg(mcpdm->dev, "***********************\n");
  92         dev_dbg(mcpdm->dev, "IRQSTATUS_RAW:  0x%04x\n",
  93                         omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS_RAW));
  94         dev_dbg(mcpdm->dev, "IRQSTATUS:  0x%04x\n",
  95                         omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS));
  96         dev_dbg(mcpdm->dev, "IRQENABLE_SET:  0x%04x\n",
  97                         omap_mcpdm_read(mcpdm, MCPDM_REG_IRQENABLE_SET));
  98         dev_dbg(mcpdm->dev, "IRQENABLE_CLR:  0x%04x\n",
  99                         omap_mcpdm_read(mcpdm, MCPDM_REG_IRQENABLE_CLR));
 100         dev_dbg(mcpdm->dev, "IRQWAKE_EN: 0x%04x\n",
 101                         omap_mcpdm_read(mcpdm, MCPDM_REG_IRQWAKE_EN));
 102         dev_dbg(mcpdm->dev, "DMAENABLE_SET: 0x%04x\n",
 103                         omap_mcpdm_read(mcpdm, MCPDM_REG_DMAENABLE_SET));
 104         dev_dbg(mcpdm->dev, "DMAENABLE_CLR:  0x%04x\n",
 105                         omap_mcpdm_read(mcpdm, MCPDM_REG_DMAENABLE_CLR));
 106         dev_dbg(mcpdm->dev, "DMAWAKEEN:  0x%04x\n",
 107                         omap_mcpdm_read(mcpdm, MCPDM_REG_DMAWAKEEN));
 108         dev_dbg(mcpdm->dev, "CTRL:  0x%04x\n",
 109                         omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL));
 110         dev_dbg(mcpdm->dev, "DN_DATA:  0x%04x\n",
 111                         omap_mcpdm_read(mcpdm, MCPDM_REG_DN_DATA));
 112         dev_dbg(mcpdm->dev, "UP_DATA: 0x%04x\n",
 113                         omap_mcpdm_read(mcpdm, MCPDM_REG_UP_DATA));
 114         dev_dbg(mcpdm->dev, "FIFO_CTRL_DN: 0x%04x\n",
 115                         omap_mcpdm_read(mcpdm, MCPDM_REG_FIFO_CTRL_DN));
 116         dev_dbg(mcpdm->dev, "FIFO_CTRL_UP:  0x%04x\n",
 117                         omap_mcpdm_read(mcpdm, MCPDM_REG_FIFO_CTRL_UP));
 118         dev_dbg(mcpdm->dev, "***********************\n");
 119 }
 120 #else
 121 static void omap_mcpdm_reg_dump(struct omap_mcpdm *mcpdm) {}
 122 #endif
 123
 124 /*
 125  * Enables the transfer through the PDM interface to/from the Phoenix
 126  * codec by enabling the corresponding UP or DN channels.
 127  */
 128 static void omap_mcpdm_start(struct omap_mcpdm *mcpdm)
 129 {
 130         u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
 131
 132         ctrl |= (MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
 133         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 134
 135         ctrl |= mcpdm->dn_channels | mcpdm->up_channels;
 136         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 137
 138         ctrl &= ~(MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
 139         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 140 }
 141
 142 /*
 143  * Disables the transfer through the PDM interface to/from the Phoenix
 144  * codec by disabling the corresponding UP or DN channels.
 145  */
 146 static void omap_mcpdm_stop(struct omap_mcpdm *mcpdm)
 147 {
 148         u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
 149
 150         ctrl |= (MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
 151         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 152
 153         ctrl &= ~(mcpdm->dn_channels | mcpdm->up_channels);
 154         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 155
 156         ctrl &= ~(MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
 157         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 158
 159 }
 160
 161 /*
 162  * Is the physical McPDM interface active.
 163  */
 164 static inline int omap_mcpdm_active(struct omap_mcpdm *mcpdm)
 165 {
 166         return omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL) &
 167                                         (MCPDM_PDM_DN_MASK | MCPDM_PDM_UP_MASK);
 168 }
 169
 170 /*
 171  * Configures McPDM uplink, and downlink for audio.
 172  * This function should be called before omap_mcpdm_start.
 173  */
 174 static void omap_mcpdm_open_streams(struct omap_mcpdm *mcpdm)
 175 {
 176         omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_SET,
 177                         MCPDM_DN_IRQ_EMPTY | MCPDM_DN_IRQ_FULL |
 178                         MCPDM_UP_IRQ_EMPTY | MCPDM_UP_IRQ_FULL);
 179
 180         /* Enable DN RX1/2 offset cancellation feature, if configured */
 181         if (mcpdm->dn_rx_offset) {
 182                 u32 dn_offset = mcpdm->dn_rx_offset;
 183
 184                 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, dn_offset);
 185                 dn_offset |= (MCPDM_DN_OFST_RX1_EN | MCPDM_DN_OFST_RX2_EN);
 186                 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, dn_offset);
 187         }
 188
 189         omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_DN, mcpdm->dn_threshold);
 190         omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_UP, mcpdm->up_threshold);
 191
 192         omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_SET,
 193                         MCPDM_DMA_DN_ENABLE | MCPDM_DMA_UP_ENABLE);
 194 }
 195
 196 /*
 197  * Cleans McPDM uplink, and downlink configuration.
 198  * This function should be called when the stream is closed.
 199  */
 200 static void omap_mcpdm_close_streams(struct omap_mcpdm *mcpdm)
 201 {
 202         /* Disable irq request generation for downlink */
 203         omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_CLR,
 204                         MCPDM_DN_IRQ_EMPTY | MCPDM_DN_IRQ_FULL);
 205
 206         /* Disable DMA request generation for downlink */
 207         omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_CLR, MCPDM_DMA_DN_ENABLE);
 208
 209         /* Disable irq request generation for uplink */
 210         omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_CLR,
 211                         MCPDM_UP_IRQ_EMPTY | MCPDM_UP_IRQ_FULL);
 212
 213         /* Disable DMA request generation for uplink */
 214         omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_CLR, MCPDM_DMA_UP_ENABLE);
 215
 216         /* Disable RX1/2 offset cancellation */
 217         if (mcpdm->dn_rx_offset)
 218                 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, 0);
 219 }
 220
 221 static irqreturn_t omap_mcpdm_irq_handler(int irq, void *dev_id)
 222 {
 223         struct omap_mcpdm *mcpdm = dev_id;
 224         int irq_status;
 225
 226         irq_status = omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS);
 227
 228         /* Acknowledge irq event */
 229         omap_mcpdm_write(mcpdm, MCPDM_REG_IRQSTATUS, irq_status);
 230
 231         if (irq_status & MCPDM_DN_IRQ_FULL)
 232                 dev_dbg(mcpdm->dev, "DN (playback) FIFO Full\n");
 233
 234         if (irq_status & MCPDM_DN_IRQ_EMPTY)
 235                 dev_dbg(mcpdm->dev, "DN (playback) FIFO Empty\n");
 236
 237         if (irq_status & MCPDM_DN_IRQ)
 238                 dev_dbg(mcpdm->dev, "DN (playback) write request\n");
 239
 240         if (irq_status & MCPDM_UP_IRQ_FULL)
 241                 dev_dbg(mcpdm->dev, "UP (capture) FIFO Full\n");
 242
 243         if (irq_status & MCPDM_UP_IRQ_EMPTY)
 244                 dev_dbg(mcpdm->dev, "UP (capture) FIFO Empty\n");
 245
 246         if (irq_status & MCPDM_UP_IRQ)
 247                 dev_dbg(mcpdm->dev, "UP (capture) write request\n");
 248
 249         return IRQ_HANDLED;
 250 }
 251
 252 static int omap_mcpdm_dai_startup(struct snd_pcm_substream *substream,
 253                                   struct snd_soc_dai *dai)
 254 {
 255         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 256
 257         mutex_lock(&mcpdm->mutex);
 258
 259         if (!dai->active) {
 260                 u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
 261
 262                 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl | MCPDM_WD_EN);
 263                 omap_mcpdm_open_streams(mcpdm);
 264         }
 265         mutex_unlock(&mcpdm->mutex);
 266
 267         snd_soc_dai_set_dma_data(dai, substream,
 268                                  &omap_mcpdm_dai_dma_params[substream->stream]);
 269
 270         return 0;
 271 }
 272
 273 static void omap_mcpdm_dai_shutdown(struct snd_pcm_substream *substream,
 274                                   struct snd_soc_dai *dai)
 275 {
 276         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 277
 278         mutex_lock(&mcpdm->mutex);
 279
 280         if (!dai->active) {
 281                 if (omap_mcpdm_active(mcpdm)) {
 282                         omap_mcpdm_stop(mcpdm);
 283                         omap_mcpdm_close_streams(mcpdm);
 284                 }
 285         }
 286
 287         mutex_unlock(&mcpdm->mutex);
 288 }
 289
 290 static int omap_mcpdm_dai_hw_params(struct snd_pcm_substream *substream,
 291                                     struct snd_pcm_hw_params *params,
 292                                     struct snd_soc_dai *dai)
 293 {
 294         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 295         int stream = substream->stream;
 296         struct omap_pcm_dma_data *dma_data;
 297         int channels;
 298         int link_mask = 0;
 299
 300         channels = params_channels(params);
 301         switch (channels) {
 302         case 5:
 303                 if (stream == SNDRV_PCM_STREAM_CAPTURE)
 304                         /* up to 3 channels for capture */
 305                         return -EINVAL;
 306                 link_mask |= 1 << 4;
 307         case 4:
 308                 if (stream == SNDRV_PCM_STREAM_CAPTURE)
 309                         /* up to 3 channels for capture */
 310                         return -EINVAL;
 311                 link_mask |= 1 << 3;
 312         case 3:
 313                 link_mask |= 1 << 2;
 314         case 2:
 315                 link_mask |= 1 << 1;
 316         case 1:
 317                 link_mask |= 1 << 0;
 318                 break;
 319         default:
 320                 /* unsupported number of channels */
 321                 return -EINVAL;
 322         }
 323
 324         dma_data = snd_soc_dai_get_dma_data(dai, substream);
 325
 326         /* Configure McPDM channels, and DMA packet size */
 327         if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
 328                 mcpdm->dn_channels = link_mask << 3;
 329                 dma_data->packet_size =
 330                         (MCPDM_DN_THRES_MAX - mcpdm->dn_threshold) * channels;
 331         } else {
 332                 mcpdm->up_channels = link_mask << 0;
 333                 dma_data->packet_size = mcpdm->up_threshold * channels;
 334         }
 335
 336         return 0;
 337 }
 338
 339 static int omap_mcpdm_prepare(struct snd_pcm_substream *substream,
 340                                   struct snd_soc_dai *dai)
 341 {
 342         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 343
 344         if (!omap_mcpdm_active(mcpdm)) {
 345                 omap_mcpdm_start(mcpdm);
 346                 omap_mcpdm_reg_dump(mcpdm);
 347         }
 348
 349         return 0;
 350 }
 351
 352 static const struct snd_soc_dai_ops omap_mcpdm_dai_ops = {
 353         .startup        = omap_mcpdm_dai_startup,
 354         .shutdown       = omap_mcpdm_dai_shutdown,
 355         .hw_params      = omap_mcpdm_dai_hw_params,
 356         .prepare        = omap_mcpdm_prepare,
 357 };
 358
 359 static int omap_mcpdm_probe(struct snd_soc_dai *dai)
 360 {
 361         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 362         int ret;
 363
 364         pm_runtime_enable(mcpdm->dev);
 365
 366         /* Disable lines while request is ongoing */
 367         pm_runtime_get_sync(mcpdm->dev);
 368         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, 0x00);
 369
 370         ret = request_irq(mcpdm->irq, omap_mcpdm_irq_handler,
 371                                 0, "McPDM", (void *)mcpdm);
 372
 373         pm_runtime_put_sync(mcpdm->dev);
 374
 375         if (ret) {
 376                 dev_err(mcpdm->dev, "Request for IRQ failed\n");
 377                 pm_runtime_disable(mcpdm->dev);
 378         }
 379
 380         /* Configure McPDM threshold values */
 381         mcpdm->dn_threshold = 2;
 382         mcpdm->up_threshold = MCPDM_UP_THRES_MAX - 3;
 383         return ret;
 384 }
 385
 386 static int omap_mcpdm_remove(struct snd_soc_dai *dai)
 387 {
 388         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 389
 390         free_irq(mcpdm->irq, (void *)mcpdm);
 391         pm_runtime_disable(mcpdm->dev);
 392
 393         return 0;
 394 }
 395
 396 #define OMAP_MCPDM_RATES        (SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
 397 #define OMAP_MCPDM_FORMATS      SNDRV_PCM_FMTBIT_S32_LE
 398
 399 static struct snd_soc_dai_driver omap_mcpdm_dai = {
 400         .probe = omap_mcpdm_probe,
 401         .remove = omap_mcpdm_remove,
 402         .probe_order = SND_SOC_COMP_ORDER_LATE,
 403         .remove_order = SND_SOC_COMP_ORDER_EARLY,
 404         .playback = {
 405                 .channels_min = 1,
 406                 .channels_max = 5,
 407                 .rates = OMAP_MCPDM_RATES,
 408                 .formats = OMAP_MCPDM_FORMATS,
 409                 .sig_bits = 24,
 410         },
 411         .capture = {
 412                 .channels_min = 1,
 413                 .channels_max = 3,
 414                 .rates = OMAP_MCPDM_RATES,
 415                 .formats = OMAP_MCPDM_FORMATS,
 416                 .sig_bits = 24,
 417         },
 418         .ops = &omap_mcpdm_dai_ops,
 419 };
 420
 421 void omap_mcpdm_configure_dn_offsets(struct snd_soc_pcm_runtime *rtd,
 422                                     u8 rx1, u8 rx2)
 423 {
 424         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(rtd->cpu_dai);
 425
 426         mcpdm->dn_rx_offset = MCPDM_DNOFST_RX1(rx1) | MCPDM_DNOFST_RX2(rx2);
 427 }
 428 EXPORT_SYMBOL_GPL(omap_mcpdm_configure_dn_offsets);
 429
 430 static __devinit int asoc_mcpdm_probe(struct platform_device *pdev)
 431 {
 432         struct omap_mcpdm *mcpdm;
 433         struct resource *res;
 434
 435         mcpdm = devm_kzalloc(&pdev->dev, sizeof(struct omap_mcpdm), GFP_KERNEL);
 436         if (!mcpdm)
 437                 return -ENOMEM;
 438
 439         platform_set_drvdata(pdev, mcpdm);
 440
 441         mutex_init(&mcpdm->mutex);
 442
 443         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma");
 444         if (res == NULL)
 445                 return -ENOMEM;
 446
 447         omap_mcpdm_dai_dma_params[0].port_addr = res->start + MCPDM_REG_DN_DATA;
 448         omap_mcpdm_dai_dma_params[1].port_addr = res->start + MCPDM_REG_UP_DATA;
 449
 450         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 451         if (res == NULL)
 452                 return -ENOMEM;
 453
 454         res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "dn_link");
 455         if (!res)
 456                 return -ENODEV;
 457
 458         omap_mcpdm_dai_dma_params[0].dma_req = res->start;
 459
 460         res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "up_link");
 461         if (!res)
 462                 return -ENODEV;
 463
 464         omap_mcpdm_dai_dma_params[1].dma_req = res->start;
 465
 466         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu");
 467         if (res == NULL)
 468                 return -ENOMEM;
 469
 470         if (!devm_request_mem_region(&pdev->dev, res->start,
 471                                      resource_size(res), "McPDM"))
 472                 return -EBUSY;
 473
 474         mcpdm->io_base = devm_ioremap(&pdev->dev, res->start,
 475                                       resource_size(res));
 476         if (!mcpdm->io_base)
 477                 return -ENOMEM;
 478
 479         mcpdm->irq = platform_get_irq(pdev, 0);
 480         if (mcpdm->irq < 0)
 481                 return mcpdm->irq;
 482
 483         mcpdm->dev = &pdev->dev;
 484
 485         return snd_soc_register_dai(&pdev->dev, &omap_mcpdm_dai);
 486 }
 487
 488 static int __devexit asoc_mcpdm_remove(struct platform_device *pdev)
 489 {
 490         snd_soc_unregister_dai(&pdev->dev);
 491         return 0;
 492 }
 493
 494 static const struct of_device_id omap_mcpdm_of_match[] = {
 495         { .compatible = "ti,omap4-mcpdm", },
 496         { }
 497 };
 498 MODULE_DEVICE_TABLE(of, omap_mcpdm_of_match);
 499
 500 static struct platform_driver asoc_mcpdm_driver = {
 501         .driver = {
 502                 .name   = "omap-mcpdm",
 503                 .owner  = THIS_MODULE,
 504                 .of_match_table = omap_mcpdm_of_match,
 505         },
 506
 507         .probe  = asoc_mcpdm_probe,
 508         .remove = __devexit_p(asoc_mcpdm_remove),
 509 };
 510
 511 module_platform_driver(asoc_mcpdm_driver);
 512
 513 MODULE_ALIAS("platform:omap-mcpdm");
 514 MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>");
 515 MODULE_DESCRIPTION("OMAP PDM SoC Interface");
 516 MODULE_LICENSE("GPL");