sound/soc/omap/omap-mcpdm.c

   1 /*
   2  * omap-mcpdm.c  --  OMAP ALSA SoC DAI driver using McPDM port
   3  *
   4  * Copyright (C) 2009 - 2011 Texas Instruments
   5  *
   6  * Author: Misael Lopez Cruz <misael.lopez@ti.com>
   7  * Contact: Jorge Eduardo Candelaria <x0107209@ti.com>
   8  *          Margarita Olaya <magi.olaya@ti.com>
   9  *          Peter Ujfalusi <peter.ujfalusi@ti.com>
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License
  13  * version 2 as published by the Free Software Foundation.
  14  *
  15  * This program is distributed in the hope that it will be useful, but
  16  * WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18  * General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  23  * 02110-1301 USA
  24  *
  25  */
  26
  27 #include <linux/init.h>
  28 #include <linux/module.h>
  29 #include <linux/platform_device.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/err.h>
  32 #include <linux/io.h>
  33 #include <linux/irq.h>
  34 #include <linux/slab.h>
  35 #include <linux/pm_runtime.h>
  36 #include <linux/of_device.h>
  37
  38 #include <sound/core.h>
  39 #include <sound/pcm.h>
  40 #include <sound/pcm_params.h>
  41 #include <sound/soc.h>
  42
  43 #include <plat/omap_hwmod.h>
  44 #include "omap-mcpdm.h"
  45 #include "omap-pcm.h"
  46
  47 #define OMAP44XX_MCPDM_L3_BASE          0x49032000
  48
  49 struct omap_mcpdm {
  50         struct device *dev;
  51         unsigned long phys_base;
  52         void __iomem *io_base;
  53         int irq;
  54
  55         struct mutex mutex;
  56
  57         /* channel data */
  58         u32 dn_channels;
  59         u32 up_channels;
  60
  61         /* McPDM FIFO thresholds */
  62         u32 dn_threshold;
  63         u32 up_threshold;
  64
  65         /* McPDM dn offsets for rx1, and 2 channels */
  66         u32 dn_rx_offset;
  67 };
  68
  69 /*
  70  * Stream DMA parameters
  71  */
  72 static struct omap_pcm_dma_data omap_mcpdm_dai_dma_params[] = {
  73         {
  74                 .name = "Audio playback",
  75         },
  76         {
  77                 .name = "Audio capture",
  78         },
  79 };
  80
  81 static inline void omap_mcpdm_write(struct omap_mcpdm *mcpdm, u16 reg, u32 val)
  82 {
  83         __raw_writel(val, mcpdm->io_base + reg);
  84 }
  85
  86 static inline int omap_mcpdm_read(struct omap_mcpdm *mcpdm, u16 reg)
  87 {
  88         return __raw_readl(mcpdm->io_base + reg);
  89 }
  90
  91 #ifdef DEBUG
  92 static void omap_mcpdm_reg_dump(struct omap_mcpdm *mcpdm)
  93 {
  94         dev_dbg(mcpdm->dev, "***********************\n");
  95         dev_dbg(mcpdm->dev, "IRQSTATUS_RAW:  0x%04x\n",
  96                         omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS_RAW));
  97         dev_dbg(mcpdm->dev, "IRQSTATUS:  0x%04x\n",
  98                         omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS));
  99         dev_dbg(mcpdm->dev, "IRQENABLE_SET:  0x%04x\n",
 100                         omap_mcpdm_read(mcpdm, MCPDM_REG_IRQENABLE_SET));
 101         dev_dbg(mcpdm->dev, "IRQENABLE_CLR:  0x%04x\n",
 102                         omap_mcpdm_read(mcpdm, MCPDM_REG_IRQENABLE_CLR));
 103         dev_dbg(mcpdm->dev, "IRQWAKE_EN: 0x%04x\n",
 104                         omap_mcpdm_read(mcpdm, MCPDM_REG_IRQWAKE_EN));
 105         dev_dbg(mcpdm->dev, "DMAENABLE_SET: 0x%04x\n",
 106                         omap_mcpdm_read(mcpdm, MCPDM_REG_DMAENABLE_SET));
 107         dev_dbg(mcpdm->dev, "DMAENABLE_CLR:  0x%04x\n",
 108                         omap_mcpdm_read(mcpdm, MCPDM_REG_DMAENABLE_CLR));
 109         dev_dbg(mcpdm->dev, "DMAWAKEEN:  0x%04x\n",
 110                         omap_mcpdm_read(mcpdm, MCPDM_REG_DMAWAKEEN));
 111         dev_dbg(mcpdm->dev, "CTRL:  0x%04x\n",
 112                         omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL));
 113         dev_dbg(mcpdm->dev, "DN_DATA:  0x%04x\n",
 114                         omap_mcpdm_read(mcpdm, MCPDM_REG_DN_DATA));
 115         dev_dbg(mcpdm->dev, "UP_DATA: 0x%04x\n",
 116                         omap_mcpdm_read(mcpdm, MCPDM_REG_UP_DATA));
 117         dev_dbg(mcpdm->dev, "FIFO_CTRL_DN: 0x%04x\n",
 118                         omap_mcpdm_read(mcpdm, MCPDM_REG_FIFO_CTRL_DN));
 119         dev_dbg(mcpdm->dev, "FIFO_CTRL_UP:  0x%04x\n",
 120                         omap_mcpdm_read(mcpdm, MCPDM_REG_FIFO_CTRL_UP));
 121         dev_dbg(mcpdm->dev, "***********************\n");
 122 }
 123 #else
 124 static void omap_mcpdm_reg_dump(struct omap_mcpdm *mcpdm) {}
 125 #endif
 126
 127 /*
 128  * Enables the transfer through the PDM interface to/from the Phoenix
 129  * codec by enabling the corresponding UP or DN channels.
 130  */
 131 static void omap_mcpdm_start(struct omap_mcpdm *mcpdm)
 132 {
 133         u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
 134
 135         ctrl |= (MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
 136         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 137
 138         ctrl |= mcpdm->dn_channels | mcpdm->up_channels;
 139         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 140
 141         ctrl &= ~(MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
 142         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 143 }
 144
 145 /*
 146  * Disables the transfer through the PDM interface to/from the Phoenix
 147  * codec by disabling the corresponding UP or DN channels.
 148  */
 149 static void omap_mcpdm_stop(struct omap_mcpdm *mcpdm)
 150 {
 151         u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
 152
 153         ctrl |= (MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
 154         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 155
 156         ctrl &= ~(mcpdm->dn_channels | mcpdm->up_channels);
 157         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 158
 159         ctrl &= ~(MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
 160         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 161
 162 }
 163
 164 /*
 165  * Is the physical McPDM interface active.
 166  */
 167 static inline int omap_mcpdm_active(struct omap_mcpdm *mcpdm)
 168 {
 169         return omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL) &
 170                                         (MCPDM_PDM_DN_MASK | MCPDM_PDM_UP_MASK);
 171 }
 172
 173 /*
 174  * Configures McPDM uplink, and downlink for audio.
 175  * This function should be called before omap_mcpdm_start.
 176  */
 177 static void omap_mcpdm_open_streams(struct omap_mcpdm *mcpdm)
 178 {
 179         omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_SET,
 180                         MCPDM_DN_IRQ_EMPTY | MCPDM_DN_IRQ_FULL |
 181                         MCPDM_UP_IRQ_EMPTY | MCPDM_UP_IRQ_FULL);
 182
 183         /* Enable DN RX1/2 offset cancellation feature, if configured */
 184         if (mcpdm->dn_rx_offset) {
 185                 u32 dn_offset = mcpdm->dn_rx_offset;
 186
 187                 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, dn_offset);
 188                 dn_offset |= (MCPDM_DN_OFST_RX1_EN | MCPDM_DN_OFST_RX2_EN);
 189                 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, dn_offset);
 190         }
 191
 192         omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_DN, mcpdm->dn_threshold);
 193         omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_UP, mcpdm->up_threshold);
 194
 195         omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_SET,
 196                         MCPDM_DMA_DN_ENABLE | MCPDM_DMA_UP_ENABLE);
 197 }
 198
 199 /*
 200  * Cleans McPDM uplink, and downlink configuration.
 201  * This function should be called when the stream is closed.
 202  */
 203 static void omap_mcpdm_close_streams(struct omap_mcpdm *mcpdm)
 204 {
 205         /* Disable irq request generation for downlink */
 206         omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_CLR,
 207                         MCPDM_DN_IRQ_EMPTY | MCPDM_DN_IRQ_FULL);
 208
 209         /* Disable DMA request generation for downlink */
 210         omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_CLR, MCPDM_DMA_DN_ENABLE);
 211
 212         /* Disable irq request generation for uplink */
 213         omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_CLR,
 214                         MCPDM_UP_IRQ_EMPTY | MCPDM_UP_IRQ_FULL);
 215
 216         /* Disable DMA request generation for uplink */
 217         omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_CLR, MCPDM_DMA_UP_ENABLE);
 218
 219         /* Disable RX1/2 offset cancellation */
 220         if (mcpdm->dn_rx_offset)
 221                 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, 0);
 222 }
 223
 224 static irqreturn_t omap_mcpdm_irq_handler(int irq, void *dev_id)
 225 {
 226         struct omap_mcpdm *mcpdm = dev_id;
 227         int irq_status;
 228
 229         irq_status = omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS);
 230
 231         /* Acknowledge irq event */
 232         omap_mcpdm_write(mcpdm, MCPDM_REG_IRQSTATUS, irq_status);
 233
 234         if (irq_status & MCPDM_DN_IRQ_FULL)
 235                 dev_dbg(mcpdm->dev, "DN (playback) FIFO Full\n");
 236
 237         if (irq_status & MCPDM_DN_IRQ_EMPTY)
 238                 dev_dbg(mcpdm->dev, "DN (playback) FIFO Empty\n");
 239
 240         if (irq_status & MCPDM_DN_IRQ)
 241                 dev_dbg(mcpdm->dev, "DN (playback) write request\n");
 242
 243         if (irq_status & MCPDM_UP_IRQ_FULL)
 244                 dev_dbg(mcpdm->dev, "UP (capture) FIFO Full\n");
 245
 246         if (irq_status & MCPDM_UP_IRQ_EMPTY)
 247                 dev_dbg(mcpdm->dev, "UP (capture) FIFO Empty\n");
 248
 249         if (irq_status & MCPDM_UP_IRQ)
 250                 dev_dbg(mcpdm->dev, "UP (capture) write request\n");
 251
 252         return IRQ_HANDLED;
 253 }
 254
 255 static int omap_mcpdm_dai_startup(struct snd_pcm_substream *substream,
 256                                   struct snd_soc_dai *dai)
 257 {
 258         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 259
 260         mutex_lock(&mcpdm->mutex);
 261
 262         if (!dai->active) {
 263                 /* Enable watch dog for ES above ES 1.0 to avoid saturation */
 264                 if (omap_rev() != OMAP4430_REV_ES1_0) {
 265                         u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
 266
 267                         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL,
 268                                          ctrl | MCPDM_WD_EN);
 269                 }
 270                 omap_mcpdm_open_streams(mcpdm);
 271         }
 272         mutex_unlock(&mcpdm->mutex);
 273
 274         snd_soc_dai_set_dma_data(dai, substream,
 275                                  &omap_mcpdm_dai_dma_params[substream->stream]);
 276
 277         return 0;
 278 }
 279
 280 static void omap_mcpdm_dai_shutdown(struct snd_pcm_substream *substream,
 281                                   struct snd_soc_dai *dai)
 282 {
 283         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 284
 285         mutex_lock(&mcpdm->mutex);
 286
 287         if (!dai->active) {
 288                 if (omap_mcpdm_active(mcpdm)) {
 289                         omap_mcpdm_stop(mcpdm);
 290                         omap_mcpdm_close_streams(mcpdm);
 291                 }
 292         }
 293
 294         mutex_unlock(&mcpdm->mutex);
 295 }
 296
 297 static int omap_mcpdm_dai_hw_params(struct snd_pcm_substream *substream,
 298                                     struct snd_pcm_hw_params *params,
 299                                     struct snd_soc_dai *dai)
 300 {
 301         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 302         int stream = substream->stream;
 303         struct omap_pcm_dma_data *dma_data;
 304         int channels;
 305         int link_mask = 0;
 306
 307         channels = params_channels(params);
 308         switch (channels) {
 309         case 5:
 310                 if (stream == SNDRV_PCM_STREAM_CAPTURE)
 311                         /* up to 3 channels for capture */
 312                         return -EINVAL;
 313                 link_mask |= 1 << 4;
 314         case 4:
 315                 if (stream == SNDRV_PCM_STREAM_CAPTURE)
 316                         /* up to 3 channels for capture */
 317                         return -EINVAL;
 318                 link_mask |= 1 << 3;
 319         case 3:
 320                 link_mask |= 1 << 2;
 321         case 2:
 322                 link_mask |= 1 << 1;
 323         case 1:
 324                 link_mask |= 1 << 0;
 325                 break;
 326         default:
 327                 /* unsupported number of channels */
 328                 return -EINVAL;
 329         }
 330
 331         dma_data = snd_soc_dai_get_dma_data(dai, substream);
 332
 333         /* Configure McPDM channels, and DMA packet size */
 334         if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
 335                 mcpdm->dn_channels = link_mask << 3;
 336                 dma_data->packet_size =
 337                         (MCPDM_DN_THRES_MAX - mcpdm->dn_threshold) * channels;
 338         } else {
 339                 mcpdm->up_channels = link_mask << 0;
 340                 dma_data->packet_size = mcpdm->up_threshold * channels;
 341         }
 342
 343         return 0;
 344 }
 345
 346 static int omap_mcpdm_prepare(struct snd_pcm_substream *substream,
 347                                   struct snd_soc_dai *dai)
 348 {
 349         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 350
 351         if (!omap_mcpdm_active(mcpdm)) {
 352                 omap_mcpdm_start(mcpdm);
 353                 omap_mcpdm_reg_dump(mcpdm);
 354         }
 355
 356         return 0;
 357 }
 358
 359 static const struct snd_soc_dai_ops omap_mcpdm_dai_ops = {
 360         .startup        = omap_mcpdm_dai_startup,
 361         .shutdown       = omap_mcpdm_dai_shutdown,
 362         .hw_params      = omap_mcpdm_dai_hw_params,
 363         .prepare        = omap_mcpdm_prepare,
 364 };
 365
 366 static int omap_mcpdm_probe(struct snd_soc_dai *dai)
 367 {
 368         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 369         int ret;
 370
 371         pm_runtime_enable(mcpdm->dev);
 372
 373         /* Disable lines while request is ongoing */
 374         pm_runtime_get_sync(mcpdm->dev);
 375         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, 0x00);
 376
 377         ret = request_irq(mcpdm->irq, omap_mcpdm_irq_handler,
 378                                 0, "McPDM", (void *)mcpdm);
 379
 380         pm_runtime_put_sync(mcpdm->dev);
 381
 382         if (ret) {
 383                 dev_err(mcpdm->dev, "Request for IRQ failed\n");
 384                 pm_runtime_disable(mcpdm->dev);
 385         }
 386
 387         /* Configure McPDM threshold values */
 388         mcpdm->dn_threshold = 2;
 389         mcpdm->up_threshold = MCPDM_UP_THRES_MAX - 3;
 390         return ret;
 391 }
 392
 393 static int omap_mcpdm_remove(struct snd_soc_dai *dai)
 394 {
 395         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 396
 397         free_irq(mcpdm->irq, (void *)mcpdm);
 398         pm_runtime_disable(mcpdm->dev);
 399
 400         return 0;
 401 }
 402
 403 #define OMAP_MCPDM_RATES        (SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
 404 #define OMAP_MCPDM_FORMATS      SNDRV_PCM_FMTBIT_S32_LE
 405
 406 static struct snd_soc_dai_driver omap_mcpdm_dai = {
 407         .probe = omap_mcpdm_probe,
 408         .remove = omap_mcpdm_remove,
 409         .probe_order = SND_SOC_COMP_ORDER_LATE,
 410         .remove_order = SND_SOC_COMP_ORDER_EARLY,
 411         .playback = {
 412                 .channels_min = 1,
 413                 .channels_max = 5,
 414                 .rates = OMAP_MCPDM_RATES,
 415                 .formats = OMAP_MCPDM_FORMATS,
 416                 .sig_bits = 24,
 417         },
 418         .capture = {
 419                 .channels_min = 1,
 420                 .channels_max = 3,
 421                 .rates = OMAP_MCPDM_RATES,
 422                 .formats = OMAP_MCPDM_FORMATS,
 423                 .sig_bits = 24,
 424         },
 425         .ops = &omap_mcpdm_dai_ops,
 426 };
 427
 428 void omap_mcpdm_configure_dn_offsets(struct snd_soc_pcm_runtime *rtd,
 429                                     u8 rx1, u8 rx2)
 430 {
 431         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(rtd->cpu_dai);
 432
 433         mcpdm->dn_rx_offset = MCPDM_DNOFST_RX1(rx1) | MCPDM_DNOFST_RX2(rx2);
 434 }
 435 EXPORT_SYMBOL_GPL(omap_mcpdm_configure_dn_offsets);
 436
 437 static __devinit int asoc_mcpdm_probe(struct platform_device *pdev)
 438 {
 439         struct omap_mcpdm *mcpdm;
 440         struct resource *res;
 441
 442         mcpdm = devm_kzalloc(&pdev->dev, sizeof(struct omap_mcpdm), GFP_KERNEL);
 443         if (!mcpdm)
 444                 return -ENOMEM;
 445
 446         platform_set_drvdata(pdev, mcpdm);
 447
 448         mutex_init(&mcpdm->mutex);
 449
 450         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma");
 451         if (res == NULL)
 452                 return -ENOMEM;
 453
 454         omap_mcpdm_dai_dma_params[0].port_addr = res->start + MCPDM_REG_DN_DATA;
 455         omap_mcpdm_dai_dma_params[1].port_addr = res->start + MCPDM_REG_UP_DATA;
 456
 457         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 458         if (res == NULL)
 459                 return -ENOMEM;
 460
 461         res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "dn_link");
 462         if (!res)
 463                 return -ENODEV;
 464
 465         omap_mcpdm_dai_dma_params[0].dma_req = res->start;
 466
 467         res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "up_link");
 468         if (!res)
 469                 return -ENODEV;
 470
 471         omap_mcpdm_dai_dma_params[1].dma_req = res->start;
 472
 473         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu");
 474         if (res == NULL)
 475                 return -ENOMEM;
 476
 477         if (!devm_request_mem_region(&pdev->dev, res->start,
 478                                      resource_size(res), "McPDM"))
 479                 return -EBUSY;
 480
 481         mcpdm->io_base = devm_ioremap(&pdev->dev, res->start,
 482                                       resource_size(res));
 483         if (!mcpdm->io_base)
 484                 return -ENOMEM;
 485
 486         mcpdm->irq = platform_get_irq(pdev, 0);
 487         if (mcpdm->irq < 0)
 488                 return mcpdm->irq;
 489
 490         mcpdm->dev = &pdev->dev;
 491
 492         return snd_soc_register_dai(&pdev->dev, &omap_mcpdm_dai);
 493 }
 494
 495 static int __devexit asoc_mcpdm_remove(struct platform_device *pdev)
 496 {
 497         snd_soc_unregister_dai(&pdev->dev);
 498         return 0;
 499 }
 500
 501 static const struct of_device_id omap_mcpdm_of_match[] = {
 502         { .compatible = "ti,omap4-mcpdm", },
 503         { }
 504 };
 505 MODULE_DEVICE_TABLE(of, omap_mcpdm_of_match);
 506
 507 static struct platform_driver asoc_mcpdm_driver = {
 508         .driver = {
 509                 .name   = "omap-mcpdm",
 510                 .owner  = THIS_MODULE,
 511                 .of_match_table = omap_mcpdm_of_match,
 512         },
 513
 514         .probe  = asoc_mcpdm_probe,
 515         .remove = __devexit_p(asoc_mcpdm_remove),
 516 };
 517
 518 module_platform_driver(asoc_mcpdm_driver);
 519
 520 MODULE_ALIAS("platform:omap-mcpdm");
 521 MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>");
 522 MODULE_DESCRIPTION("OMAP PDM SoC Interface");
 523 MODULE_LICENSE("GPL");