2 * TAS5086 ASoC codec driver
4 * Copyright (c) 2013 Daniel Mack <zonque@gmail.com>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 * - implement DAPM and input muxing
18 * - implement modulation limit
19 * - implement non-default PWM start
21 * Note that this chip has a very unusual register layout, specifically
22 * because the registers are of unequal size, and multi-byte registers
23 * require bulk writes to take effect. Regmap does not support that kind
26 * Currently, the driver does not touch any of the registers >= 0x20, so
27 * it doesn't matter because the entire map can be accessed as 8-bit
28 * array. In case more features will be added in the future
29 * that require access to higher registers, the entire regmap H/W I/O
30 * routines have to be open-coded.
33 #include <linux/module.h>
34 #include <linux/slab.h>
35 #include <linux/delay.h>
36 #include <linux/gpio.h>
37 #include <linux/i2c.h>
38 #include <linux/regmap.h>
39 #include <linux/spi/spi.h>
40 #include <linux/of_device.h>
41 #include <linux/of_gpio.h>
42 #include <sound/pcm.h>
43 #include <sound/pcm_params.h>
44 #include <sound/soc.h>
45 #include <sound/tlv.h>
46 #include <sound/tas5086.h>
48 #define TAS5086_PCM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
49 SNDRV_PCM_FMTBIT_S20_3LE | \
50 SNDRV_PCM_FMTBIT_S24_3LE)
52 #define TAS5086_PCM_RATES (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
53 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | \
54 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 | \
55 SNDRV_PCM_RATE_192000)
60 #define TAS5086_CLOCK_CONTROL 0x00 /* Clock control register */
61 #define TAS5086_CLOCK_RATE(val) (val << 5)
62 #define TAS5086_CLOCK_RATE_MASK (0x7 << 5)
63 #define TAS5086_CLOCK_RATIO(val) (val << 2)
64 #define TAS5086_CLOCK_RATIO_MASK (0x7 << 2)
65 #define TAS5086_CLOCK_SCLK_RATIO_48 (1 << 1)
66 #define TAS5086_CLOCK_VALID (1 << 0)
68 #define TAS5086_DEEMPH_MASK 0x03
69 #define TAS5086_SOFT_MUTE_ALL 0x3f
71 #define TAS5086_DEV_ID 0x01 /* Device ID register */
72 #define TAS5086_ERROR_STATUS 0x02 /* Error status register */
73 #define TAS5086_SYS_CONTROL_1 0x03 /* System control register 1 */
74 #define TAS5086_SERIAL_DATA_IF 0x04 /* Serial data interface register */
75 #define TAS5086_SYS_CONTROL_2 0x05 /* System control register 2 */
76 #define TAS5086_SOFT_MUTE 0x06 /* Soft mute register */
77 #define TAS5086_MASTER_VOL 0x07 /* Master volume */
78 #define TAS5086_CHANNEL_VOL(X) (0x08 + (X)) /* Channel 1-6 volume */
79 #define TAS5086_VOLUME_CONTROL 0x09 /* Volume control register */
80 #define TAS5086_MOD_LIMIT 0x10 /* Modulation limit register */
81 #define TAS5086_PWM_START 0x18 /* PWM start register */
82 #define TAS5086_SURROUND 0x19 /* Surround register */
83 #define TAS5086_SPLIT_CAP_CHARGE 0x1a /* Split cap charge period register */
84 #define TAS5086_OSC_TRIM 0x1b /* Oscillator trim register */
85 #define TAS5086_BKNDERR 0x1c
88 * Default TAS5086 power-up configuration
90 static const struct reg_default tas5086_reg_defaults[] = {
122 static bool tas5086_accessible_reg(struct device *dev, unsigned int reg)
124 return !((reg == 0x0f) || (reg >= 0x11 && reg <= 0x17));
127 static bool tas5086_volatile_reg(struct device *dev, unsigned int reg)
131 case TAS5086_ERROR_STATUS:
138 static bool tas5086_writeable_reg(struct device *dev, unsigned int reg)
140 return tas5086_accessible_reg(dev, reg) && (reg != TAS5086_DEV_ID);
143 struct tas5086_private {
144 struct regmap *regmap;
145 unsigned int mclk, sclk;
148 /* Current sample rate for de-emphasis control */
150 /* GPIO driving Reset pin, if any */
154 static int tas5086_deemph[] = { 0, 32000, 44100, 48000 };
156 static int tas5086_set_deemph(struct snd_soc_codec *codec)
158 struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
162 for (i = 0; i < ARRAY_SIZE(tas5086_deemph); i++)
163 if (tas5086_deemph[i] == priv->rate)
166 return regmap_update_bits(priv->regmap, TAS5086_SYS_CONTROL_1,
167 TAS5086_DEEMPH_MASK, val);
170 static int tas5086_get_deemph(struct snd_kcontrol *kcontrol,
171 struct snd_ctl_elem_value *ucontrol)
173 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
174 struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
176 ucontrol->value.enumerated.item[0] = priv->deemph;
181 static int tas5086_put_deemph(struct snd_kcontrol *kcontrol,
182 struct snd_ctl_elem_value *ucontrol)
184 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
185 struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
187 priv->deemph = ucontrol->value.enumerated.item[0];
189 return tas5086_set_deemph(codec);
193 static int tas5086_set_dai_sysclk(struct snd_soc_dai *codec_dai,
194 int clk_id, unsigned int freq, int dir)
196 struct snd_soc_codec *codec = codec_dai->codec;
197 struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
200 case TAS5086_CLK_IDX_MCLK:
203 case TAS5086_CLK_IDX_SCLK:
211 static int tas5086_set_dai_fmt(struct snd_soc_dai *codec_dai,
214 struct snd_soc_codec *codec = codec_dai->codec;
215 struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
217 /* The TAS5086 can only be slave to all clocks */
218 if ((format & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS) {
219 dev_err(codec->dev, "Invalid clocking mode\n");
223 /* we need to refer to the data format from hw_params() */
224 priv->format = format;
229 static const int tas5086_sample_rates[] = {
230 32000, 38000, 44100, 48000, 88200, 96000, 176400, 192000
233 static const int tas5086_ratios[] = {
234 64, 128, 192, 256, 384, 512
237 static int index_in_array(const int *array, int len, int needle)
241 for (i = 0; i < len; i++)
242 if (array[i] == needle)
248 static int tas5086_hw_params(struct snd_pcm_substream *substream,
249 struct snd_pcm_hw_params *params,
250 struct snd_soc_dai *dai)
252 struct snd_soc_codec *codec = dai->codec;
253 struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
257 priv->rate = params_rate(params);
259 /* Look up the sample rate and refer to the offset in the list */
260 val = index_in_array(tas5086_sample_rates,
261 ARRAY_SIZE(tas5086_sample_rates), priv->rate);
264 dev_err(codec->dev, "Invalid sample rate\n");
268 ret = regmap_update_bits(priv->regmap, TAS5086_CLOCK_CONTROL,
269 TAS5086_CLOCK_RATE_MASK,
270 TAS5086_CLOCK_RATE(val));
274 /* MCLK / Fs ratio */
275 val = index_in_array(tas5086_ratios, ARRAY_SIZE(tas5086_ratios),
276 priv->mclk / priv->rate);
278 dev_err(codec->dev, "Inavlid MCLK / Fs ratio\n");
282 ret = regmap_update_bits(priv->regmap, TAS5086_CLOCK_CONTROL,
283 TAS5086_CLOCK_RATIO_MASK,
284 TAS5086_CLOCK_RATIO(val));
289 ret = regmap_update_bits(priv->regmap, TAS5086_CLOCK_CONTROL,
290 TAS5086_CLOCK_SCLK_RATIO_48,
291 (priv->sclk == 48 * priv->rate) ?
292 TAS5086_CLOCK_SCLK_RATIO_48 : 0);
297 * The chip has a very unituitive register mapping and muxes information
298 * about data format and sample depth into the same register, but not on
299 * a logical bit-boundary. Hence, we have to refer to the format passed
300 * in the set_dai_fmt() callback and set up everything from here.
302 * First, determine the 'base' value, using the format ...
304 switch (priv->format & SND_SOC_DAIFMT_FORMAT_MASK) {
305 case SND_SOC_DAIFMT_RIGHT_J:
308 case SND_SOC_DAIFMT_I2S:
311 case SND_SOC_DAIFMT_LEFT_J:
315 dev_err(codec->dev, "Invalid DAI format\n");
319 /* ... then add the offset for the sample bit depth. */
320 switch (params_format(params)) {
321 case SNDRV_PCM_FORMAT_S16_LE:
324 case SNDRV_PCM_FORMAT_S20_3LE:
327 case SNDRV_PCM_FORMAT_S24_3LE:
331 dev_err(codec->dev, "Invalid bit width\n");
335 ret = regmap_write(priv->regmap, TAS5086_SERIAL_DATA_IF, val);
339 /* clock is considered valid now */
340 ret = regmap_update_bits(priv->regmap, TAS5086_CLOCK_CONTROL,
341 TAS5086_CLOCK_VALID, TAS5086_CLOCK_VALID);
345 return tas5086_set_deemph(codec);
348 static int tas5086_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
350 struct snd_soc_codec *codec = dai->codec;
351 struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
352 unsigned int val = 0;
355 val = TAS5086_SOFT_MUTE_ALL;
357 return regmap_write(priv->regmap, TAS5086_SOFT_MUTE, val);
360 /* TAS5086 controls */
361 static const DECLARE_TLV_DB_SCALE(tas5086_dac_tlv, -10350, 50, 1);
363 static const struct snd_kcontrol_new tas5086_controls[] = {
364 SOC_SINGLE_TLV("Master Playback Volume", TAS5086_MASTER_VOL,
365 0, 0xff, 1, tas5086_dac_tlv),
366 SOC_DOUBLE_R_TLV("Channel 1/2 Playback Volume",
367 TAS5086_CHANNEL_VOL(0), TAS5086_CHANNEL_VOL(1),
368 0, 0xff, 1, tas5086_dac_tlv),
369 SOC_DOUBLE_R_TLV("Channel 3/4 Playback Volume",
370 TAS5086_CHANNEL_VOL(2), TAS5086_CHANNEL_VOL(3),
371 0, 0xff, 1, tas5086_dac_tlv),
372 SOC_DOUBLE_R_TLV("Channel 5/6 Playback Volume",
373 TAS5086_CHANNEL_VOL(4), TAS5086_CHANNEL_VOL(5),
374 0, 0xff, 1, tas5086_dac_tlv),
375 SOC_SINGLE_BOOL_EXT("De-emphasis Switch", 0,
376 tas5086_get_deemph, tas5086_put_deemph),
379 static const struct snd_soc_dai_ops tas5086_dai_ops = {
380 .hw_params = tas5086_hw_params,
381 .set_sysclk = tas5086_set_dai_sysclk,
382 .set_fmt = tas5086_set_dai_fmt,
383 .mute_stream = tas5086_mute_stream,
386 static struct snd_soc_dai_driver tas5086_dai = {
387 .name = "tas5086-hifi",
389 .stream_name = "Playback",
392 .rates = TAS5086_PCM_RATES,
393 .formats = TAS5086_PCM_FORMATS,
395 .ops = &tas5086_dai_ops,
399 static int tas5086_soc_resume(struct snd_soc_codec *codec)
401 struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
403 /* Restore codec state */
404 return regcache_sync(priv->regmap);
407 #define tas5086_soc_resume NULL
408 #endif /* CONFIG_PM */
411 static const struct of_device_id tas5086_dt_ids[] = {
412 { .compatible = "ti,tas5086", },
415 MODULE_DEVICE_TABLE(of, tas5086_dt_ids);
418 /* charge period values in microseconds */
419 static const int tas5086_charge_period[] = {
420 13000, 16900, 23400, 31200, 41600, 54600, 72800, 96200,
421 130000, 156000, 234000, 312000, 416000, 546000, 728000, 962000,
422 1300000, 169000, 2340000, 3120000, 4160000, 5460000, 7280000, 9620000,
425 static int tas5086_probe(struct snd_soc_codec *codec)
427 struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
428 int charge_period = 1300000; /* hardware default is 1300 ms */
431 if (of_match_device(of_match_ptr(tas5086_dt_ids), codec->dev)) {
432 struct device_node *of_node = codec->dev->of_node;
433 of_property_read_u32(of_node, "ti,charge-period", &charge_period);
436 /* lookup and set split-capacitor charge period */
437 if (charge_period == 0) {
438 regmap_write(priv->regmap, TAS5086_SPLIT_CAP_CHARGE, 0);
440 i = index_in_array(tas5086_charge_period,
441 ARRAY_SIZE(tas5086_charge_period),
444 regmap_write(priv->regmap, TAS5086_SPLIT_CAP_CHARGE,
448 "Invalid split-cap charge period of %d ns.\n",
452 /* enable factory trim */
453 ret = regmap_write(priv->regmap, TAS5086_OSC_TRIM, 0x00);
457 /* start all channels */
458 ret = regmap_write(priv->regmap, TAS5086_SYS_CONTROL_2, 0x20);
462 /* set master volume to 0 dB */
463 ret = regmap_write(priv->regmap, TAS5086_MASTER_VOL, 0x30);
467 /* mute all channels for now */
468 ret = regmap_write(priv->regmap, TAS5086_SOFT_MUTE,
469 TAS5086_SOFT_MUTE_ALL);
476 static int tas5086_remove(struct snd_soc_codec *codec)
478 struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
480 if (gpio_is_valid(priv->gpio_nreset))
481 /* Set codec to the reset state */
482 gpio_set_value(priv->gpio_nreset, 0);
487 static struct snd_soc_codec_driver soc_codec_dev_tas5086 = {
488 .probe = tas5086_probe,
489 .remove = tas5086_remove,
490 .resume = tas5086_soc_resume,
491 .controls = tas5086_controls,
492 .num_controls = ARRAY_SIZE(tas5086_controls),
495 static const struct i2c_device_id tas5086_i2c_id[] = {
499 MODULE_DEVICE_TABLE(i2c, tas5086_i2c_id);
501 static const struct regmap_config tas5086_regmap = {
504 .max_register = ARRAY_SIZE(tas5086_reg_defaults),
505 .reg_defaults = tas5086_reg_defaults,
506 .num_reg_defaults = ARRAY_SIZE(tas5086_reg_defaults),
507 .cache_type = REGCACHE_RBTREE,
508 .volatile_reg = tas5086_volatile_reg,
509 .writeable_reg = tas5086_writeable_reg,
510 .readable_reg = tas5086_accessible_reg,
513 static int tas5086_i2c_probe(struct i2c_client *i2c,
514 const struct i2c_device_id *id)
516 struct tas5086_private *priv;
517 struct device *dev = &i2c->dev;
518 int gpio_nreset = -EINVAL;
521 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
525 priv->regmap = devm_regmap_init_i2c(i2c, &tas5086_regmap);
526 if (IS_ERR(priv->regmap)) {
527 ret = PTR_ERR(priv->regmap);
528 dev_err(&i2c->dev, "Failed to create regmap: %d\n", ret);
532 i2c_set_clientdata(i2c, priv);
534 if (of_match_device(of_match_ptr(tas5086_dt_ids), dev)) {
535 struct device_node *of_node = dev->of_node;
536 gpio_nreset = of_get_named_gpio(of_node, "reset-gpio", 0);
539 if (gpio_is_valid(gpio_nreset))
540 if (devm_gpio_request(dev, gpio_nreset, "TAS5086 Reset"))
541 gpio_nreset = -EINVAL;
543 if (gpio_is_valid(gpio_nreset)) {
544 /* Reset codec - minimum assertion time is 400ns */
545 gpio_direction_output(gpio_nreset, 0);
547 gpio_set_value(gpio_nreset, 1);
549 /* Codec needs ~15ms to wake up */
553 priv->gpio_nreset = gpio_nreset;
555 /* The TAS5086 always returns 0x03 in its TAS5086_DEV_ID register */
556 ret = regmap_read(priv->regmap, TAS5086_DEV_ID, &i);
562 "Failed to identify TAS5086 codec (got %02x)\n", i);
566 return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_tas5086,
570 static int tas5086_i2c_remove(struct i2c_client *i2c)
572 snd_soc_unregister_codec(&i2c->dev);
576 static struct i2c_driver tas5086_i2c_driver = {
579 .owner = THIS_MODULE,
580 .of_match_table = of_match_ptr(tas5086_dt_ids),
582 .id_table = tas5086_i2c_id,
583 .probe = tas5086_i2c_probe,
584 .remove = tas5086_i2c_remove,
587 module_i2c_driver(tas5086_i2c_driver);
589 MODULE_AUTHOR("Daniel Mack <zonque@gmail.com>");
590 MODULE_DESCRIPTION("Texas Instruments TAS5086 ALSA SoC Codec Driver");
591 MODULE_LICENSE("GPL");