sound/soc/codecs/rt5645.c

   1 /*
   2  * rt5645.c  --  RT5645 ALSA SoC audio codec driver
   3  *
   4  * Copyright 2013 Realtek Semiconductor Corp.
   5  * Author: Bard Liao <bardliao@realtek.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/module.h>
  13 #include <linux/moduleparam.h>
  14 #include <linux/init.h>
  15 #include <linux/delay.h>
  16 #include <linux/pm.h>
  17 #include <linux/i2c.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/spi/spi.h>
  20 #include <linux/gpio.h>
  21 #include <sound/core.h>
  22 #include <sound/pcm.h>
  23 #include <sound/pcm_params.h>
  24 #include <sound/jack.h>
  25 #include <sound/soc.h>
  26 #include <sound/soc-dapm.h>
  27 #include <sound/initval.h>
  28 #include <sound/tlv.h>
  29
  30 #include "rl6231.h"
  31 #include "rt5645.h"
  32
  33 #define RT5645_DEVICE_ID 0x6308
  34
  35 #define RT5645_PR_RANGE_BASE (0xff + 1)
  36 #define RT5645_PR_SPACING 0x100
  37
  38 #define RT5645_PR_BASE (RT5645_PR_RANGE_BASE + (0 * RT5645_PR_SPACING))
  39
  40 static const struct regmap_range_cfg rt5645_ranges[] = {
  41         {
  42                 .name = "PR",
  43                 .range_min = RT5645_PR_BASE,
  44                 .range_max = RT5645_PR_BASE + 0xf8,
  45                 .selector_reg = RT5645_PRIV_INDEX,
  46                 .selector_mask = 0xff,
  47                 .selector_shift = 0x0,
  48                 .window_start = RT5645_PRIV_DATA,
  49                 .window_len = 0x1,
  50         },
  51 };
  52
  53 static const struct reg_default init_list[] = {
  54         {RT5645_PR_BASE + 0x3d, 0x3600},
  55         {RT5645_PR_BASE + 0x1c, 0xfd20},
  56         {RT5645_PR_BASE + 0x20, 0x611f},
  57         {RT5645_PR_BASE + 0x21, 0x4040},
  58         {RT5645_PR_BASE + 0x23, 0x0004},
  59 };
  60 #define RT5645_INIT_REG_LEN ARRAY_SIZE(init_list)
  61
  62 static const struct reg_default rt5645_reg[] = {
  63         { 0x00, 0x0000 },
  64         { 0x01, 0xc8c8 },
  65         { 0x02, 0xc8c8 },
  66         { 0x03, 0xc8c8 },
  67         { 0x0a, 0x0002 },
  68         { 0x0b, 0x2827 },
  69         { 0x0c, 0xe000 },
  70         { 0x0d, 0x0000 },
  71         { 0x0e, 0x0000 },
  72         { 0x0f, 0x0808 },
  73         { 0x14, 0x3333 },
  74         { 0x16, 0x4b00 },
  75         { 0x18, 0x018b },
  76         { 0x19, 0xafaf },
  77         { 0x1a, 0xafaf },
  78         { 0x1b, 0x0001 },
  79         { 0x1c, 0x2f2f },
  80         { 0x1d, 0x2f2f },
  81         { 0x1e, 0x0000 },
  82         { 0x20, 0x0000 },
  83         { 0x27, 0x7060 },
  84         { 0x28, 0x7070 },
  85         { 0x29, 0x8080 },
  86         { 0x2a, 0x5656 },
  87         { 0x2b, 0x5454 },
  88         { 0x2c, 0xaaa0 },
  89         { 0x2f, 0x1002 },
  90         { 0x31, 0x5000 },
  91         { 0x32, 0x0000 },
  92         { 0x33, 0x0000 },
  93         { 0x34, 0x0000 },
  94         { 0x35, 0x0000 },
  95         { 0x3b, 0x0000 },
  96         { 0x3c, 0x007f },
  97         { 0x3d, 0x0000 },
  98         { 0x3e, 0x007f },
  99         { 0x3f, 0x0000 },
 100         { 0x40, 0x001f },
 101         { 0x41, 0x0000 },
 102         { 0x42, 0x001f },
 103         { 0x45, 0x6000 },
 104         { 0x46, 0x003e },
 105         { 0x47, 0x003e },
 106         { 0x48, 0xf807 },
 107         { 0x4a, 0x0004 },
 108         { 0x4d, 0x0000 },
 109         { 0x4e, 0x0000 },
 110         { 0x4f, 0x01ff },
 111         { 0x50, 0x0000 },
 112         { 0x51, 0x0000 },
 113         { 0x52, 0x01ff },
 114         { 0x53, 0xf000 },
 115         { 0x56, 0x0111 },
 116         { 0x57, 0x0064 },
 117         { 0x58, 0xef0e },
 118         { 0x59, 0xf0f0 },
 119         { 0x5a, 0xef0e },
 120         { 0x5b, 0xf0f0 },
 121         { 0x5c, 0xef0e },
 122         { 0x5d, 0xf0f0 },
 123         { 0x5e, 0xf000 },
 124         { 0x5f, 0x0000 },
 125         { 0x61, 0x0300 },
 126         { 0x62, 0x0000 },
 127         { 0x63, 0x00c2 },
 128         { 0x64, 0x0000 },
 129         { 0x65, 0x0000 },
 130         { 0x66, 0x0000 },
 131         { 0x6a, 0x0000 },
 132         { 0x6c, 0x0aaa },
 133         { 0x70, 0x8000 },
 134         { 0x71, 0x8000 },
 135         { 0x72, 0x8000 },
 136         { 0x73, 0x7770 },
 137         { 0x74, 0x3e00 },
 138         { 0x75, 0x2409 },
 139         { 0x76, 0x000a },
 140         { 0x77, 0x0c00 },
 141         { 0x78, 0x0000 },
 142         { 0x79, 0x0123 },
 143         { 0x80, 0x0000 },
 144         { 0x81, 0x0000 },
 145         { 0x82, 0x0000 },
 146         { 0x83, 0x0000 },
 147         { 0x84, 0x0000 },
 148         { 0x85, 0x0000 },
 149         { 0x8a, 0x0000 },
 150         { 0x8e, 0x0004 },
 151         { 0x8f, 0x1100 },
 152         { 0x90, 0x0646 },
 153         { 0x91, 0x0c06 },
 154         { 0x93, 0x0000 },
 155         { 0x94, 0x0200 },
 156         { 0x95, 0x0000 },
 157         { 0x9a, 0x2184 },
 158         { 0x9b, 0x010a },
 159         { 0x9c, 0x0aea },
 160         { 0x9d, 0x000c },
 161         { 0x9e, 0x0400 },
 162         { 0xa0, 0xa0a8 },
 163         { 0xa1, 0x0059 },
 164         { 0xa2, 0x0001 },
 165         { 0xae, 0x6000 },
 166         { 0xaf, 0x0000 },
 167         { 0xb0, 0x6000 },
 168         { 0xb1, 0x0000 },
 169         { 0xb2, 0x0000 },
 170         { 0xb3, 0x001f },
 171         { 0xb4, 0x020c },
 172         { 0xb5, 0x1f00 },
 173         { 0xb6, 0x0000 },
 174         { 0xbb, 0x0000 },
 175         { 0xbc, 0x0000 },
 176         { 0xbd, 0x0000 },
 177         { 0xbe, 0x0000 },
 178         { 0xbf, 0x3100 },
 179         { 0xc0, 0x0000 },
 180         { 0xc1, 0x0000 },
 181         { 0xc2, 0x0000 },
 182         { 0xc3, 0x2000 },
 183         { 0xcd, 0x0000 },
 184         { 0xce, 0x0000 },
 185         { 0xcf, 0x1813 },
 186         { 0xd0, 0x0690 },
 187         { 0xd1, 0x1c17 },
 188         { 0xd3, 0xb320 },
 189         { 0xd4, 0x0000 },
 190         { 0xd6, 0x0400 },
 191         { 0xd9, 0x0809 },
 192         { 0xda, 0x0000 },
 193         { 0xdb, 0x0003 },
 194         { 0xdc, 0x0049 },
 195         { 0xdd, 0x001b },
 196         { 0xe6, 0x8000 },
 197         { 0xe7, 0x0200 },
 198         { 0xec, 0xb300 },
 199         { 0xed, 0x0000 },
 200         { 0xf0, 0x001f },
 201         { 0xf1, 0x020c },
 202         { 0xf2, 0x1f00 },
 203         { 0xf3, 0x0000 },
 204         { 0xf4, 0x4000 },
 205         { 0xf8, 0x0000 },
 206         { 0xf9, 0x0000 },
 207         { 0xfa, 0x2060 },
 208         { 0xfb, 0x4040 },
 209         { 0xfc, 0x0000 },
 210         { 0xfd, 0x0002 },
 211         { 0xfe, 0x10ec },
 212         { 0xff, 0x6308 },
 213 };
 214
 215 static int rt5645_reset(struct snd_soc_codec *codec)
 216 {
 217         return snd_soc_write(codec, RT5645_RESET, 0);
 218 }
 219
 220 static bool rt5645_volatile_register(struct device *dev, unsigned int reg)
 221 {
 222         int i;
 223
 224         for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
 225                 if (reg >= rt5645_ranges[i].range_min &&
 226                         reg <= rt5645_ranges[i].range_max) {
 227                         return true;
 228                 }
 229         }
 230
 231         switch (reg) {
 232         case RT5645_RESET:
 233         case RT5645_PRIV_DATA:
 234         case RT5645_IN1_CTRL1:
 235         case RT5645_IN1_CTRL2:
 236         case RT5645_IN1_CTRL3:
 237         case RT5645_A_JD_CTRL1:
 238         case RT5645_ADC_EQ_CTRL1:
 239         case RT5645_EQ_CTRL1:
 240         case RT5645_ALC_CTRL_1:
 241         case RT5645_IRQ_CTRL2:
 242         case RT5645_IRQ_CTRL3:
 243         case RT5645_INT_IRQ_ST:
 244         case RT5645_IL_CMD:
 245         case RT5645_VENDOR_ID:
 246         case RT5645_VENDOR_ID1:
 247         case RT5645_VENDOR_ID2:
 248                 return true;
 249         default:
 250                 return false;
 251         }
 252 }
 253
 254 static bool rt5645_readable_register(struct device *dev, unsigned int reg)
 255 {
 256         int i;
 257
 258         for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
 259                 if (reg >= rt5645_ranges[i].range_min &&
 260                         reg <= rt5645_ranges[i].range_max) {
 261                         return true;
 262                 }
 263         }
 264
 265         switch (reg) {
 266         case RT5645_RESET:
 267         case RT5645_SPK_VOL:
 268         case RT5645_HP_VOL:
 269         case RT5645_LOUT1:
 270         case RT5645_IN1_CTRL1:
 271         case RT5645_IN1_CTRL2:
 272         case RT5645_IN1_CTRL3:
 273         case RT5645_IN2_CTRL:
 274         case RT5645_INL1_INR1_VOL:
 275         case RT5645_SPK_FUNC_LIM:
 276         case RT5645_ADJ_HPF_CTRL:
 277         case RT5645_DAC1_DIG_VOL:
 278         case RT5645_DAC2_DIG_VOL:
 279         case RT5645_DAC_CTRL:
 280         case RT5645_STO1_ADC_DIG_VOL:
 281         case RT5645_MONO_ADC_DIG_VOL:
 282         case RT5645_ADC_BST_VOL1:
 283         case RT5645_ADC_BST_VOL2:
 284         case RT5645_STO1_ADC_MIXER:
 285         case RT5645_MONO_ADC_MIXER:
 286         case RT5645_AD_DA_MIXER:
 287         case RT5645_STO_DAC_MIXER:
 288         case RT5645_MONO_DAC_MIXER:
 289         case RT5645_DIG_MIXER:
 290         case RT5645_DIG_INF1_DATA:
 291         case RT5645_PDM_OUT_CTRL:
 292         case RT5645_REC_L1_MIXER:
 293         case RT5645_REC_L2_MIXER:
 294         case RT5645_REC_R1_MIXER:
 295         case RT5645_REC_R2_MIXER:
 296         case RT5645_HPMIXL_CTRL:
 297         case RT5645_HPOMIXL_CTRL:
 298         case RT5645_HPMIXR_CTRL:
 299         case RT5645_HPOMIXR_CTRL:
 300         case RT5645_HPO_MIXER:
 301         case RT5645_SPK_L_MIXER:
 302         case RT5645_SPK_R_MIXER:
 303         case RT5645_SPO_MIXER:
 304         case RT5645_SPO_CLSD_RATIO:
 305         case RT5645_OUT_L1_MIXER:
 306         case RT5645_OUT_R1_MIXER:
 307         case RT5645_OUT_L_GAIN1:
 308         case RT5645_OUT_L_GAIN2:
 309         case RT5645_OUT_R_GAIN1:
 310         case RT5645_OUT_R_GAIN2:
 311         case RT5645_LOUT_MIXER:
 312         case RT5645_HAPTIC_CTRL1:
 313         case RT5645_HAPTIC_CTRL2:
 314         case RT5645_HAPTIC_CTRL3:
 315         case RT5645_HAPTIC_CTRL4:
 316         case RT5645_HAPTIC_CTRL5:
 317         case RT5645_HAPTIC_CTRL6:
 318         case RT5645_HAPTIC_CTRL7:
 319         case RT5645_HAPTIC_CTRL8:
 320         case RT5645_HAPTIC_CTRL9:
 321         case RT5645_HAPTIC_CTRL10:
 322         case RT5645_PWR_DIG1:
 323         case RT5645_PWR_DIG2:
 324         case RT5645_PWR_ANLG1:
 325         case RT5645_PWR_ANLG2:
 326         case RT5645_PWR_MIXER:
 327         case RT5645_PWR_VOL:
 328         case RT5645_PRIV_INDEX:
 329         case RT5645_PRIV_DATA:
 330         case RT5645_I2S1_SDP:
 331         case RT5645_I2S2_SDP:
 332         case RT5645_ADDA_CLK1:
 333         case RT5645_ADDA_CLK2:
 334         case RT5645_DMIC_CTRL1:
 335         case RT5645_DMIC_CTRL2:
 336         case RT5645_TDM_CTRL_1:
 337         case RT5645_TDM_CTRL_2:
 338         case RT5645_TDM_CTRL_3:
 339         case RT5645_GLB_CLK:
 340         case RT5645_PLL_CTRL1:
 341         case RT5645_PLL_CTRL2:
 342         case RT5645_ASRC_1:
 343         case RT5645_ASRC_2:
 344         case RT5645_ASRC_3:
 345         case RT5645_ASRC_4:
 346         case RT5645_DEPOP_M1:
 347         case RT5645_DEPOP_M2:
 348         case RT5645_DEPOP_M3:
 349         case RT5645_MICBIAS:
 350         case RT5645_A_JD_CTRL1:
 351         case RT5645_VAD_CTRL4:
 352         case RT5645_CLSD_OUT_CTRL:
 353         case RT5645_ADC_EQ_CTRL1:
 354         case RT5645_ADC_EQ_CTRL2:
 355         case RT5645_EQ_CTRL1:
 356         case RT5645_EQ_CTRL2:
 357         case RT5645_ALC_CTRL_1:
 358         case RT5645_ALC_CTRL_2:
 359         case RT5645_ALC_CTRL_3:
 360         case RT5645_ALC_CTRL_4:
 361         case RT5645_ALC_CTRL_5:
 362         case RT5645_JD_CTRL:
 363         case RT5645_IRQ_CTRL1:
 364         case RT5645_IRQ_CTRL2:
 365         case RT5645_IRQ_CTRL3:
 366         case RT5645_INT_IRQ_ST:
 367         case RT5645_GPIO_CTRL1:
 368         case RT5645_GPIO_CTRL2:
 369         case RT5645_GPIO_CTRL3:
 370         case RT5645_BASS_BACK:
 371         case RT5645_MP3_PLUS1:
 372         case RT5645_MP3_PLUS2:
 373         case RT5645_ADJ_HPF1:
 374         case RT5645_ADJ_HPF2:
 375         case RT5645_HP_CALIB_AMP_DET:
 376         case RT5645_SV_ZCD1:
 377         case RT5645_SV_ZCD2:
 378         case RT5645_IL_CMD:
 379         case RT5645_IL_CMD2:
 380         case RT5645_IL_CMD3:
 381         case RT5645_DRC1_HL_CTRL1:
 382         case RT5645_DRC2_HL_CTRL1:
 383         case RT5645_ADC_MONO_HP_CTRL1:
 384         case RT5645_ADC_MONO_HP_CTRL2:
 385         case RT5645_DRC2_CTRL1:
 386         case RT5645_DRC2_CTRL2:
 387         case RT5645_DRC2_CTRL3:
 388         case RT5645_DRC2_CTRL4:
 389         case RT5645_DRC2_CTRL5:
 390         case RT5645_JD_CTRL3:
 391         case RT5645_JD_CTRL4:
 392         case RT5645_GEN_CTRL1:
 393         case RT5645_GEN_CTRL2:
 394         case RT5645_GEN_CTRL3:
 395         case RT5645_VENDOR_ID:
 396         case RT5645_VENDOR_ID1:
 397         case RT5645_VENDOR_ID2:
 398                 return true;
 399         default:
 400                 return false;
 401         }
 402 }
 403
 404 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
 405 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
 406 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
 407 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
 408 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
 409
 410 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
 411 static unsigned int bst_tlv[] = {
 412         TLV_DB_RANGE_HEAD(7),
 413         0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
 414         1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
 415         2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
 416         3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
 417         6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
 418         7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
 419         8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
 420 };
 421
 422 static const char * const rt5645_tdm_data_swap_select[] = {
 423         "L/R", "R/L", "L/L", "R/R"
 424 };
 425
 426 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot0_1_enum,
 427         RT5645_TDM_CTRL_1, 6, rt5645_tdm_data_swap_select);
 428
 429 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot2_3_enum,
 430         RT5645_TDM_CTRL_1, 4, rt5645_tdm_data_swap_select);
 431
 432 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot4_5_enum,
 433         RT5645_TDM_CTRL_1, 2, rt5645_tdm_data_swap_select);
 434
 435 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot6_7_enum,
 436         RT5645_TDM_CTRL_1, 0, rt5645_tdm_data_swap_select);
 437
 438 static const char * const rt5645_tdm_adc_data_select[] = {
 439         "1/2/R", "2/1/R", "R/1/2", "R/2/1"
 440 };
 441
 442 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_sel_enum,
 443                                 RT5645_TDM_CTRL_1, 8,
 444                                 rt5645_tdm_adc_data_select);
 445
 446 static const struct snd_kcontrol_new rt5645_snd_controls[] = {
 447         /* Speaker Output Volume */
 448         SOC_DOUBLE("Speaker Channel Switch", RT5645_SPK_VOL,
 449                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 450         SOC_DOUBLE_TLV("Speaker Playback Volume", RT5645_SPK_VOL,
 451                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
 452
 453         /* Headphone Output Volume */
 454         SOC_DOUBLE("HP Channel Switch", RT5645_HP_VOL,
 455                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 456         SOC_DOUBLE_TLV("HP Playback Volume", RT5645_HP_VOL,
 457                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
 458
 459         /* OUTPUT Control */
 460         SOC_DOUBLE("OUT Playback Switch", RT5645_LOUT1,
 461                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 462         SOC_DOUBLE("OUT Channel Switch", RT5645_LOUT1,
 463                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 464         SOC_DOUBLE_TLV("OUT Playback Volume", RT5645_LOUT1,
 465                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
 466
 467         /* DAC Digital Volume */
 468         SOC_DOUBLE("DAC2 Playback Switch", RT5645_DAC_CTRL,
 469                 RT5645_M_DAC_L2_VOL_SFT, RT5645_M_DAC_R2_VOL_SFT, 1, 1),
 470         SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5645_DAC1_DIG_VOL,
 471                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 175, 0, dac_vol_tlv),
 472         SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5645_DAC2_DIG_VOL,
 473                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 175, 0, dac_vol_tlv),
 474
 475         /* IN1/IN2 Control */
 476         SOC_SINGLE_TLV("IN1 Boost", RT5645_IN1_CTRL1,
 477                 RT5645_BST_SFT1, 8, 0, bst_tlv),
 478         SOC_SINGLE_TLV("IN2 Boost", RT5645_IN2_CTRL,
 479                 RT5645_BST_SFT2, 8, 0, bst_tlv),
 480
 481         /* INL/INR Volume Control */
 482         SOC_DOUBLE_TLV("IN Capture Volume", RT5645_INL1_INR1_VOL,
 483                 RT5645_INL_VOL_SFT, RT5645_INR_VOL_SFT, 31, 1, in_vol_tlv),
 484
 485         /* ADC Digital Volume Control */
 486         SOC_DOUBLE("ADC Capture Switch", RT5645_STO1_ADC_DIG_VOL,
 487                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 488         SOC_DOUBLE_TLV("ADC Capture Volume", RT5645_STO1_ADC_DIG_VOL,
 489                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 127, 0, adc_vol_tlv),
 490         SOC_DOUBLE("Mono ADC Capture Switch", RT5645_MONO_ADC_DIG_VOL,
 491                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 492         SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5645_MONO_ADC_DIG_VOL,
 493                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 127, 0, adc_vol_tlv),
 494
 495         /* ADC Boost Volume Control */
 496         SOC_DOUBLE_TLV("STO1 ADC Boost Gain", RT5645_ADC_BST_VOL1,
 497                 RT5645_STO1_ADC_L_BST_SFT, RT5645_STO1_ADC_R_BST_SFT, 3, 0,
 498                 adc_bst_tlv),
 499         SOC_DOUBLE_TLV("STO2 ADC Boost Gain", RT5645_ADC_BST_VOL1,
 500                 RT5645_STO2_ADC_L_BST_SFT, RT5645_STO2_ADC_R_BST_SFT, 3, 0,
 501                 adc_bst_tlv),
 502
 503         /* I2S2 function select */
 504         SOC_SINGLE("I2S2 Func Switch", RT5645_GPIO_CTRL1, RT5645_I2S2_SEL_SFT,
 505                 1, 1),
 506
 507         /* TDM */
 508         SOC_ENUM("TDM Adc Slot0 1 Data", rt5645_tdm_adc_slot0_1_enum),
 509         SOC_ENUM("TDM Adc Slot2 3 Data", rt5645_tdm_adc_slot2_3_enum),
 510         SOC_ENUM("TDM Adc Slot4 5 Data", rt5645_tdm_adc_slot4_5_enum),
 511         SOC_ENUM("TDM Adc Slot6 7 Data", rt5645_tdm_adc_slot6_7_enum),
 512         SOC_ENUM("TDM IF1 ADC DATA Sel", rt5645_tdm_adc_sel_enum),
 513         SOC_SINGLE("TDM IF1_DAC1_L Sel", RT5645_TDM_CTRL_3, 12, 7, 0),
 514         SOC_SINGLE("TDM IF1_DAC1_R Sel", RT5645_TDM_CTRL_3, 8, 7, 0),
 515         SOC_SINGLE("TDM IF1_DAC2_L Sel", RT5645_TDM_CTRL_3, 4, 7, 0),
 516         SOC_SINGLE("TDM IF1_DAC2_R Sel", RT5645_TDM_CTRL_3, 0, 7, 0),
 517 };
 518
 519 /**
 520  * set_dmic_clk - Set parameter of dmic.
 521  *
 522  * @w: DAPM widget.
 523  * @kcontrol: The kcontrol of this widget.
 524  * @event: Event id.
 525  *
 526  */
 527 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
 528         struct snd_kcontrol *kcontrol, int event)
 529 {
 530         struct snd_soc_codec *codec = w->codec;
 531         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
 532         int idx = -EINVAL;
 533
 534         idx = rl6231_calc_dmic_clk(rt5645->sysclk);
 535
 536         if (idx < 0)
 537                 dev_err(codec->dev, "Failed to set DMIC clock\n");
 538         else
 539                 snd_soc_update_bits(codec, RT5645_DMIC_CTRL1,
 540                         RT5645_DMIC_CLK_MASK, idx << RT5645_DMIC_CLK_SFT);
 541         return idx;
 542 }
 543
 544 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
 545                          struct snd_soc_dapm_widget *sink)
 546 {
 547         unsigned int val;
 548
 549         val = snd_soc_read(source->codec, RT5645_GLB_CLK);
 550         val &= RT5645_SCLK_SRC_MASK;
 551         if (val == RT5645_SCLK_SRC_PLL1)
 552                 return 1;
 553         else
 554                 return 0;
 555 }
 556
 557 /* Digital Mixer */
 558 static const struct snd_kcontrol_new rt5645_sto1_adc_l_mix[] = {
 559         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
 560                         RT5645_M_ADC_L1_SFT, 1, 1),
 561         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
 562                         RT5645_M_ADC_L2_SFT, 1, 1),
 563 };
 564
 565 static const struct snd_kcontrol_new rt5645_sto1_adc_r_mix[] = {
 566         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
 567                         RT5645_M_ADC_R1_SFT, 1, 1),
 568         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
 569                         RT5645_M_ADC_R2_SFT, 1, 1),
 570 };
 571
 572 static const struct snd_kcontrol_new rt5645_mono_adc_l_mix[] = {
 573         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
 574                         RT5645_M_MONO_ADC_L1_SFT, 1, 1),
 575         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
 576                         RT5645_M_MONO_ADC_L2_SFT, 1, 1),
 577 };
 578
 579 static const struct snd_kcontrol_new rt5645_mono_adc_r_mix[] = {
 580         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
 581                         RT5645_M_MONO_ADC_R1_SFT, 1, 1),
 582         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
 583                         RT5645_M_MONO_ADC_R2_SFT, 1, 1),
 584 };
 585
 586 static const struct snd_kcontrol_new rt5645_dac_l_mix[] = {
 587         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
 588                         RT5645_M_ADCMIX_L_SFT, 1, 1),
 589         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER,
 590                         RT5645_M_DAC1_L_SFT, 1, 1),
 591 };
 592
 593 static const struct snd_kcontrol_new rt5645_dac_r_mix[] = {
 594         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
 595                         RT5645_M_ADCMIX_R_SFT, 1, 1),
 596         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER,
 597                         RT5645_M_DAC1_R_SFT, 1, 1),
 598 };
 599
 600 static const struct snd_kcontrol_new rt5645_sto_dac_l_mix[] = {
 601         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
 602                         RT5645_M_DAC_L1_SFT, 1, 1),
 603         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_STO_DAC_MIXER,
 604                         RT5645_M_DAC_L2_SFT, 1, 1),
 605         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
 606                         RT5645_M_DAC_R1_STO_L_SFT, 1, 1),
 607 };
 608
 609 static const struct snd_kcontrol_new rt5645_sto_dac_r_mix[] = {
 610         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
 611                         RT5645_M_DAC_R1_SFT, 1, 1),
 612         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_STO_DAC_MIXER,
 613                         RT5645_M_DAC_R2_SFT, 1, 1),
 614         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
 615                         RT5645_M_DAC_L1_STO_R_SFT, 1, 1),
 616 };
 617
 618 static const struct snd_kcontrol_new rt5645_mono_dac_l_mix[] = {
 619         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_MONO_DAC_MIXER,
 620                         RT5645_M_DAC_L1_MONO_L_SFT, 1, 1),
 621         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
 622                         RT5645_M_DAC_L2_MONO_L_SFT, 1, 1),
 623         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
 624                         RT5645_M_DAC_R2_MONO_L_SFT, 1, 1),
 625 };
 626
 627 static const struct snd_kcontrol_new rt5645_mono_dac_r_mix[] = {
 628         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_MONO_DAC_MIXER,
 629                         RT5645_M_DAC_R1_MONO_R_SFT, 1, 1),
 630         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
 631                         RT5645_M_DAC_R2_MONO_R_SFT, 1, 1),
 632         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
 633                         RT5645_M_DAC_L2_MONO_R_SFT, 1, 1),
 634 };
 635
 636 static const struct snd_kcontrol_new rt5645_dig_l_mix[] = {
 637         SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5645_DIG_MIXER,
 638                         RT5645_M_STO_L_DAC_L_SFT, 1, 1),
 639         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
 640                         RT5645_M_DAC_L2_DAC_L_SFT, 1, 1),
 641         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
 642                         RT5645_M_DAC_R2_DAC_L_SFT, 1, 1),
 643 };
 644
 645 static const struct snd_kcontrol_new rt5645_dig_r_mix[] = {
 646         SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5645_DIG_MIXER,
 647                         RT5645_M_STO_R_DAC_R_SFT, 1, 1),
 648         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
 649                         RT5645_M_DAC_R2_DAC_R_SFT, 1, 1),
 650         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
 651                         RT5645_M_DAC_L2_DAC_R_SFT, 1, 1),
 652 };
 653
 654 /* Analog Input Mixer */
 655 static const struct snd_kcontrol_new rt5645_rec_l_mix[] = {
 656         SOC_DAPM_SINGLE("HPOL Switch", RT5645_REC_L2_MIXER,
 657                         RT5645_M_HP_L_RM_L_SFT, 1, 1),
 658         SOC_DAPM_SINGLE("INL Switch", RT5645_REC_L2_MIXER,
 659                         RT5645_M_IN_L_RM_L_SFT, 1, 1),
 660         SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_L2_MIXER,
 661                         RT5645_M_BST2_RM_L_SFT, 1, 1),
 662         SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_L2_MIXER,
 663                         RT5645_M_BST1_RM_L_SFT, 1, 1),
 664         SOC_DAPM_SINGLE("OUT MIXL Switch", RT5645_REC_L2_MIXER,
 665                         RT5645_M_OM_L_RM_L_SFT, 1, 1),
 666 };
 667
 668 static const struct snd_kcontrol_new rt5645_rec_r_mix[] = {
 669         SOC_DAPM_SINGLE("HPOR Switch", RT5645_REC_R2_MIXER,
 670                         RT5645_M_HP_R_RM_R_SFT, 1, 1),
 671         SOC_DAPM_SINGLE("INR Switch", RT5645_REC_R2_MIXER,
 672                         RT5645_M_IN_R_RM_R_SFT, 1, 1),
 673         SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_R2_MIXER,
 674                         RT5645_M_BST2_RM_R_SFT, 1, 1),
 675         SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_R2_MIXER,
 676                         RT5645_M_BST1_RM_R_SFT, 1, 1),
 677         SOC_DAPM_SINGLE("OUT MIXR Switch", RT5645_REC_R2_MIXER,
 678                         RT5645_M_OM_R_RM_R_SFT, 1, 1),
 679 };
 680
 681 static const struct snd_kcontrol_new rt5645_spk_l_mix[] = {
 682         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPK_L_MIXER,
 683                         RT5645_M_DAC_L1_SM_L_SFT, 1, 1),
 684         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_SPK_L_MIXER,
 685                         RT5645_M_DAC_L2_SM_L_SFT, 1, 1),
 686         SOC_DAPM_SINGLE("INL Switch", RT5645_SPK_L_MIXER,
 687                         RT5645_M_IN_L_SM_L_SFT, 1, 1),
 688         SOC_DAPM_SINGLE("BST1 Switch", RT5645_SPK_L_MIXER,
 689                         RT5645_M_BST1_L_SM_L_SFT, 1, 1),
 690 };
 691
 692 static const struct snd_kcontrol_new rt5645_spk_r_mix[] = {
 693         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPK_R_MIXER,
 694                         RT5645_M_DAC_R1_SM_R_SFT, 1, 1),
 695         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_SPK_R_MIXER,
 696                         RT5645_M_DAC_R2_SM_R_SFT, 1, 1),
 697         SOC_DAPM_SINGLE("INR Switch", RT5645_SPK_R_MIXER,
 698                         RT5645_M_IN_R_SM_R_SFT, 1, 1),
 699         SOC_DAPM_SINGLE("BST2 Switch", RT5645_SPK_R_MIXER,
 700                         RT5645_M_BST2_R_SM_R_SFT, 1, 1),
 701 };
 702
 703 static const struct snd_kcontrol_new rt5645_out_l_mix[] = {
 704         SOC_DAPM_SINGLE("BST1 Switch", RT5645_OUT_L1_MIXER,
 705                         RT5645_M_BST1_OM_L_SFT, 1, 1),
 706         SOC_DAPM_SINGLE("INL Switch", RT5645_OUT_L1_MIXER,
 707                         RT5645_M_IN_L_OM_L_SFT, 1, 1),
 708         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_OUT_L1_MIXER,
 709                         RT5645_M_DAC_L2_OM_L_SFT, 1, 1),
 710         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_OUT_L1_MIXER,
 711                         RT5645_M_DAC_L1_OM_L_SFT, 1, 1),
 712 };
 713
 714 static const struct snd_kcontrol_new rt5645_out_r_mix[] = {
 715         SOC_DAPM_SINGLE("BST2 Switch", RT5645_OUT_R1_MIXER,
 716                         RT5645_M_BST2_OM_R_SFT, 1, 1),
 717         SOC_DAPM_SINGLE("INR Switch", RT5645_OUT_R1_MIXER,
 718                         RT5645_M_IN_R_OM_R_SFT, 1, 1),
 719         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_OUT_R1_MIXER,
 720                         RT5645_M_DAC_R2_OM_R_SFT, 1, 1),
 721         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_OUT_R1_MIXER,
 722                         RT5645_M_DAC_R1_OM_R_SFT, 1, 1),
 723 };
 724
 725 static const struct snd_kcontrol_new rt5645_spo_l_mix[] = {
 726         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
 727                         RT5645_M_DAC_R1_SPM_L_SFT, 1, 1),
 728         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPO_MIXER,
 729                         RT5645_M_DAC_L1_SPM_L_SFT, 1, 1),
 730         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
 731                         RT5645_M_SV_R_SPM_L_SFT, 1, 1),
 732         SOC_DAPM_SINGLE("SPKVOL L Switch", RT5645_SPO_MIXER,
 733                         RT5645_M_SV_L_SPM_L_SFT, 1, 1),
 734 };
 735
 736 static const struct snd_kcontrol_new rt5645_spo_r_mix[] = {
 737         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
 738                         RT5645_M_DAC_R1_SPM_R_SFT, 1, 1),
 739         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
 740                         RT5645_M_SV_R_SPM_R_SFT, 1, 1),
 741 };
 742
 743 static const struct snd_kcontrol_new rt5645_hpo_mix[] = {
 744         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPO_MIXER,
 745                         RT5645_M_DAC1_HM_SFT, 1, 1),
 746         SOC_DAPM_SINGLE("HPVOL Switch", RT5645_HPO_MIXER,
 747                         RT5645_M_HPVOL_HM_SFT, 1, 1),
 748 };
 749
 750 static const struct snd_kcontrol_new rt5645_hpvoll_mix[] = {
 751         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXL_CTRL,
 752                         RT5645_M_DAC1_HV_SFT, 1, 1),
 753         SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXL_CTRL,
 754                         RT5645_M_DAC2_HV_SFT, 1, 1),
 755         SOC_DAPM_SINGLE("INL Switch", RT5645_HPOMIXL_CTRL,
 756                         RT5645_M_IN_HV_SFT, 1, 1),
 757         SOC_DAPM_SINGLE("BST1 Switch", RT5645_HPOMIXL_CTRL,
 758                         RT5645_M_BST1_HV_SFT, 1, 1),
 759 };
 760
 761 static const struct snd_kcontrol_new rt5645_hpvolr_mix[] = {
 762         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXR_CTRL,
 763                         RT5645_M_DAC1_HV_SFT, 1, 1),
 764         SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXR_CTRL,
 765                         RT5645_M_DAC2_HV_SFT, 1, 1),
 766         SOC_DAPM_SINGLE("INR Switch", RT5645_HPOMIXR_CTRL,
 767                         RT5645_M_IN_HV_SFT, 1, 1),
 768         SOC_DAPM_SINGLE("BST2 Switch", RT5645_HPOMIXR_CTRL,
 769                         RT5645_M_BST2_HV_SFT, 1, 1),
 770 };
 771
 772 static const struct snd_kcontrol_new rt5645_lout_mix[] = {
 773         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_LOUT_MIXER,
 774                         RT5645_M_DAC_L1_LM_SFT, 1, 1),
 775         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_LOUT_MIXER,
 776                         RT5645_M_DAC_R1_LM_SFT, 1, 1),
 777         SOC_DAPM_SINGLE("OUTMIX L Switch", RT5645_LOUT_MIXER,
 778                         RT5645_M_OV_L_LM_SFT, 1, 1),
 779         SOC_DAPM_SINGLE("OUTMIX R Switch", RT5645_LOUT_MIXER,
 780                         RT5645_M_OV_R_LM_SFT, 1, 1),
 781 };
 782
 783 /*DAC1 L/R source*/ /* MX-29 [9:8] [11:10] */
 784 static const char * const rt5645_dac1_src[] = {
 785         "IF1 DAC", "IF2 DAC", "IF3 DAC"
 786 };
 787
 788 static SOC_ENUM_SINGLE_DECL(
 789         rt5645_dac1l_enum, RT5645_AD_DA_MIXER,
 790         RT5645_DAC1_L_SEL_SFT, rt5645_dac1_src);
 791
 792 static const struct snd_kcontrol_new rt5645_dac1l_mux =
 793         SOC_DAPM_ENUM("DAC1 L source", rt5645_dac1l_enum);
 794
 795 static SOC_ENUM_SINGLE_DECL(
 796         rt5645_dac1r_enum, RT5645_AD_DA_MIXER,
 797         RT5645_DAC1_R_SEL_SFT, rt5645_dac1_src);
 798
 799 static const struct snd_kcontrol_new rt5645_dac1r_mux =
 800         SOC_DAPM_ENUM("DAC1 R source", rt5645_dac1r_enum);
 801
 802 /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
 803 static const char * const rt5645_dac12_src[] = {
 804         "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "VAD_ADC"
 805 };
 806
 807 static SOC_ENUM_SINGLE_DECL(
 808         rt5645_dac2l_enum, RT5645_DAC_CTRL,
 809         RT5645_DAC2_L_SEL_SFT, rt5645_dac12_src);
 810
 811 static const struct snd_kcontrol_new rt5645_dac_l2_mux =
 812         SOC_DAPM_ENUM("DAC2 L source", rt5645_dac2l_enum);
 813
 814 static const char * const rt5645_dacr2_src[] = {
 815         "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "Haptic"
 816 };
 817
 818 static SOC_ENUM_SINGLE_DECL(
 819         rt5645_dac2r_enum, RT5645_DAC_CTRL,
 820         RT5645_DAC2_R_SEL_SFT, rt5645_dacr2_src);
 821
 822 static const struct snd_kcontrol_new rt5645_dac_r2_mux =
 823         SOC_DAPM_ENUM("DAC2 R source", rt5645_dac2r_enum);
 824
 825
 826 /* INL/R source */
 827 static const char * const rt5645_inl_src[] = {
 828         "IN2P", "MonoP"
 829 };
 830
 831 static SOC_ENUM_SINGLE_DECL(
 832         rt5645_inl_enum, RT5645_INL1_INR1_VOL,
 833         RT5645_INL_SEL_SFT, rt5645_inl_src);
 834
 835 static const struct snd_kcontrol_new rt5645_inl_mux =
 836         SOC_DAPM_ENUM("INL source", rt5645_inl_enum);
 837
 838 static const char * const rt5645_inr_src[] = {
 839         "IN2N", "MonoN"
 840 };
 841
 842 static SOC_ENUM_SINGLE_DECL(
 843         rt5645_inr_enum, RT5645_INL1_INR1_VOL,
 844         RT5645_INR_SEL_SFT, rt5645_inr_src);
 845
 846 static const struct snd_kcontrol_new rt5645_inr_mux =
 847         SOC_DAPM_ENUM("INR source", rt5645_inr_enum);
 848
 849 /* Stereo1 ADC source */
 850 /* MX-27 [12] */
 851 static const char * const rt5645_stereo_adc1_src[] = {
 852         "DAC MIX", "ADC"
 853 };
 854
 855 static SOC_ENUM_SINGLE_DECL(
 856         rt5645_stereo1_adc1_enum, RT5645_STO1_ADC_MIXER,
 857         RT5645_ADC_1_SRC_SFT, rt5645_stereo_adc1_src);
 858
 859 static const struct snd_kcontrol_new rt5645_sto_adc1_mux =
 860         SOC_DAPM_ENUM("Stereo1 ADC1 Mux", rt5645_stereo1_adc1_enum);
 861
 862 /* MX-27 [11] */
 863 static const char * const rt5645_stereo_adc2_src[] = {
 864         "DAC MIX", "DMIC"
 865 };
 866
 867 static SOC_ENUM_SINGLE_DECL(
 868         rt5645_stereo1_adc2_enum, RT5645_STO1_ADC_MIXER,
 869         RT5645_ADC_2_SRC_SFT, rt5645_stereo_adc2_src);
 870
 871 static const struct snd_kcontrol_new rt5645_sto_adc2_mux =
 872         SOC_DAPM_ENUM("Stereo1 ADC2 Mux", rt5645_stereo1_adc2_enum);
 873
 874 /* MX-27 [8] */
 875 static const char * const rt5645_stereo_dmic_src[] = {
 876         "DMIC1", "DMIC2"
 877 };
 878
 879 static SOC_ENUM_SINGLE_DECL(
 880         rt5645_stereo1_dmic_enum, RT5645_STO1_ADC_MIXER,
 881         RT5645_DMIC_SRC_SFT, rt5645_stereo_dmic_src);
 882
 883 static const struct snd_kcontrol_new rt5645_sto1_dmic_mux =
 884         SOC_DAPM_ENUM("Stereo1 DMIC source", rt5645_stereo1_dmic_enum);
 885
 886 /* Mono ADC source */
 887 /* MX-28 [12] */
 888 static const char * const rt5645_mono_adc_l1_src[] = {
 889         "Mono DAC MIXL", "ADC"
 890 };
 891
 892 static SOC_ENUM_SINGLE_DECL(
 893         rt5645_mono_adc_l1_enum, RT5645_MONO_ADC_MIXER,
 894         RT5645_MONO_ADC_L1_SRC_SFT, rt5645_mono_adc_l1_src);
 895
 896 static const struct snd_kcontrol_new rt5645_mono_adc_l1_mux =
 897         SOC_DAPM_ENUM("Mono ADC1 left source", rt5645_mono_adc_l1_enum);
 898 /* MX-28 [11] */
 899 static const char * const rt5645_mono_adc_l2_src[] = {
 900         "Mono DAC MIXL", "DMIC"
 901 };
 902
 903 static SOC_ENUM_SINGLE_DECL(
 904         rt5645_mono_adc_l2_enum, RT5645_MONO_ADC_MIXER,
 905         RT5645_MONO_ADC_L2_SRC_SFT, rt5645_mono_adc_l2_src);
 906
 907 static const struct snd_kcontrol_new rt5645_mono_adc_l2_mux =
 908         SOC_DAPM_ENUM("Mono ADC2 left source", rt5645_mono_adc_l2_enum);
 909
 910 /* MX-28 [8] */
 911 static const char * const rt5645_mono_dmic_src[] = {
 912         "DMIC1", "DMIC2"
 913 };
 914
 915 static SOC_ENUM_SINGLE_DECL(
 916         rt5645_mono_dmic_l_enum, RT5645_MONO_ADC_MIXER,
 917         RT5645_MONO_DMIC_L_SRC_SFT, rt5645_mono_dmic_src);
 918
 919 static const struct snd_kcontrol_new rt5645_mono_dmic_l_mux =
 920         SOC_DAPM_ENUM("Mono DMIC left source", rt5645_mono_dmic_l_enum);
 921 /* MX-28 [1:0] */
 922 static SOC_ENUM_SINGLE_DECL(
 923         rt5645_mono_dmic_r_enum, RT5645_MONO_ADC_MIXER,
 924         RT5645_MONO_DMIC_R_SRC_SFT, rt5645_mono_dmic_src);
 925
 926 static const struct snd_kcontrol_new rt5645_mono_dmic_r_mux =
 927         SOC_DAPM_ENUM("Mono DMIC Right source", rt5645_mono_dmic_r_enum);
 928 /* MX-28 [4] */
 929 static const char * const rt5645_mono_adc_r1_src[] = {
 930         "Mono DAC MIXR", "ADC"
 931 };
 932
 933 static SOC_ENUM_SINGLE_DECL(
 934         rt5645_mono_adc_r1_enum, RT5645_MONO_ADC_MIXER,
 935         RT5645_MONO_ADC_R1_SRC_SFT, rt5645_mono_adc_r1_src);
 936
 937 static const struct snd_kcontrol_new rt5645_mono_adc_r1_mux =
 938         SOC_DAPM_ENUM("Mono ADC1 right source", rt5645_mono_adc_r1_enum);
 939 /* MX-28 [3] */
 940 static const char * const rt5645_mono_adc_r2_src[] = {
 941         "Mono DAC MIXR", "DMIC"
 942 };
 943
 944 static SOC_ENUM_SINGLE_DECL(
 945         rt5645_mono_adc_r2_enum, RT5645_MONO_ADC_MIXER,
 946         RT5645_MONO_ADC_R2_SRC_SFT, rt5645_mono_adc_r2_src);
 947
 948 static const struct snd_kcontrol_new rt5645_mono_adc_r2_mux =
 949         SOC_DAPM_ENUM("Mono ADC2 right source", rt5645_mono_adc_r2_enum);
 950
 951 /* MX-77 [9:8] */
 952 static const char * const rt5645_if1_adc_in_src[] = {
 953         "IF_ADC1", "IF_ADC2", "VAD_ADC"
 954 };
 955
 956 static SOC_ENUM_SINGLE_DECL(
 957         rt5645_if1_adc_in_enum, RT5645_TDM_CTRL_1,
 958         RT5645_IF1_ADC_IN_SFT, rt5645_if1_adc_in_src);
 959
 960 static const struct snd_kcontrol_new rt5645_if1_adc_in_mux =
 961         SOC_DAPM_ENUM("IF1 ADC IN source", rt5645_if1_adc_in_enum);
 962
 963 /* MX-2F [13:12] */
 964 static const char * const rt5645_if2_adc_in_src[] = {
 965         "IF_ADC1", "IF_ADC2", "VAD_ADC"
 966 };
 967
 968 static SOC_ENUM_SINGLE_DECL(
 969         rt5645_if2_adc_in_enum, RT5645_DIG_INF1_DATA,
 970         RT5645_IF2_ADC_IN_SFT, rt5645_if2_adc_in_src);
 971
 972 static const struct snd_kcontrol_new rt5645_if2_adc_in_mux =
 973         SOC_DAPM_ENUM("IF2 ADC IN source", rt5645_if2_adc_in_enum);
 974
 975 /* MX-2F [1:0] */
 976 static const char * const rt5645_if3_adc_in_src[] = {
 977         "IF_ADC1", "IF_ADC2", "VAD_ADC"
 978 };
 979
 980 static SOC_ENUM_SINGLE_DECL(
 981         rt5645_if3_adc_in_enum, RT5645_DIG_INF1_DATA,
 982         RT5645_IF3_ADC_IN_SFT, rt5645_if3_adc_in_src);
 983
 984 static const struct snd_kcontrol_new rt5645_if3_adc_in_mux =
 985         SOC_DAPM_ENUM("IF3 ADC IN source", rt5645_if3_adc_in_enum);
 986
 987 /* MX-31 [15] [13] [11] [9] */
 988 static const char * const rt5645_pdm_src[] = {
 989         "Mono DAC", "Stereo DAC"
 990 };
 991
 992 static SOC_ENUM_SINGLE_DECL(
 993         rt5645_pdm1_l_enum, RT5645_PDM_OUT_CTRL,
 994         RT5645_PDM1_L_SFT, rt5645_pdm_src);
 995
 996 static const struct snd_kcontrol_new rt5645_pdm1_l_mux =
 997         SOC_DAPM_ENUM("PDM1 L source", rt5645_pdm1_l_enum);
 998
 999 static SOC_ENUM_SINGLE_DECL(
1000         rt5645_pdm1_r_enum, RT5645_PDM_OUT_CTRL,
1001         RT5645_PDM1_R_SFT, rt5645_pdm_src);
1002
1003 static const struct snd_kcontrol_new rt5645_pdm1_r_mux =
1004         SOC_DAPM_ENUM("PDM1 R source", rt5645_pdm1_r_enum);
1005
1006 /* MX-9D [9:8] */
1007 static const char * const rt5645_vad_adc_src[] = {
1008         "Sto1 ADC L", "Mono ADC L", "Mono ADC R"
1009 };
1010
1011 static SOC_ENUM_SINGLE_DECL(
1012         rt5645_vad_adc_enum, RT5645_VAD_CTRL4,
1013         RT5645_VAD_SEL_SFT, rt5645_vad_adc_src);
1014
1015 static const struct snd_kcontrol_new rt5645_vad_adc_mux =
1016         SOC_DAPM_ENUM("VAD ADC source", rt5645_vad_adc_enum);
1017
1018 static const struct snd_kcontrol_new spk_l_vol_control =
1019         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1020                 RT5645_L_MUTE_SFT, 1, 1);
1021
1022 static const struct snd_kcontrol_new spk_r_vol_control =
1023         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1024                 RT5645_R_MUTE_SFT, 1, 1);
1025
1026 static const struct snd_kcontrol_new hp_l_vol_control =
1027         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1028                 RT5645_L_MUTE_SFT, 1, 1);
1029
1030 static const struct snd_kcontrol_new hp_r_vol_control =
1031         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1032                 RT5645_R_MUTE_SFT, 1, 1);
1033
1034 static const struct snd_kcontrol_new pdm1_l_vol_control =
1035         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1036                 RT5645_M_PDM1_L, 1, 1);
1037
1038 static const struct snd_kcontrol_new pdm1_r_vol_control =
1039         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1040                 RT5645_M_PDM1_R, 1, 1);
1041
1042 static void hp_amp_power(struct snd_soc_codec *codec, int on)
1043 {
1044         static int hp_amp_power_count;
1045         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1046
1047         if (on) {
1048                 if (hp_amp_power_count <= 0) {
1049                         /* depop parameters */
1050                         snd_soc_update_bits(codec, RT5645_DEPOP_M2,
1051                                 RT5645_DEPOP_MASK, RT5645_DEPOP_MAN);
1052                         snd_soc_write(codec, RT5645_DEPOP_M1, 0x000d);
1053                         regmap_write(rt5645->regmap, RT5645_PR_BASE +
1054                                 RT5645_HP_DCC_INT1, 0x9f01);
1055                         mdelay(150);
1056                         /* headphone amp power on */
1057                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1058                                 RT5645_PWR_FV1 | RT5645_PWR_FV2 , 0);
1059                         snd_soc_update_bits(codec, RT5645_PWR_VOL,
1060                                 RT5645_PWR_HV_L | RT5645_PWR_HV_R,
1061                                 RT5645_PWR_HV_L | RT5645_PWR_HV_R);
1062                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1063                                 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1064                                 RT5645_PWR_HA,
1065                                 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1066                                 RT5645_PWR_HA);
1067                         mdelay(5);
1068                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1069                                 RT5645_PWR_FV1 | RT5645_PWR_FV2,
1070                                 RT5645_PWR_FV1 | RT5645_PWR_FV2);
1071
1072                         snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1073                                 RT5645_HP_CO_MASK | RT5645_HP_SG_MASK,
1074                                 RT5645_HP_CO_EN | RT5645_HP_SG_EN);
1075                         regmap_write(rt5645->regmap, RT5645_PR_BASE +
1076                                 0x14, 0x1aaa);
1077                         regmap_write(rt5645->regmap, RT5645_PR_BASE +
1078                                 0x24, 0x0430);
1079                 }
1080                 hp_amp_power_count++;
1081         } else {
1082                 hp_amp_power_count--;
1083                 if (hp_amp_power_count <= 0) {
1084                         snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1085                                 RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1086                                 RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1087                                 RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1088                         /* headphone amp power down */
1089                         snd_soc_write(codec, RT5645_DEPOP_M1, 0x0000);
1090                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1091                                 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1092                                 RT5645_PWR_HA, 0);
1093                 }
1094         }
1095 }
1096
1097 static int rt5645_hp_event(struct snd_soc_dapm_widget *w,
1098         struct snd_kcontrol *kcontrol, int event)
1099 {
1100         struct snd_soc_codec *codec = w->codec;
1101         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1102
1103         switch (event) {
1104         case SND_SOC_DAPM_POST_PMU:
1105                 hp_amp_power(codec, 1);
1106                 /* headphone unmute sequence */
1107                 snd_soc_update_bits(codec, RT5645_DEPOP_M3, RT5645_CP_FQ1_MASK |
1108                         RT5645_CP_FQ2_MASK | RT5645_CP_FQ3_MASK,
1109                         (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ1_SFT) |
1110                         (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1111                         (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ3_SFT));
1112                 regmap_write(rt5645->regmap,
1113                         RT5645_PR_BASE + RT5645_MAMP_INT_REG2, 0xfc00);
1114                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1115                         RT5645_SMT_TRIG_MASK, RT5645_SMT_TRIG_EN);
1116                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1117                         RT5645_RSTN_MASK, RT5645_RSTN_EN);
1118                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1119                         RT5645_RSTN_MASK | RT5645_HP_L_SMT_MASK |
1120                         RT5645_HP_R_SMT_MASK, RT5645_RSTN_DIS |
1121                         RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1122                 msleep(40);
1123                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1124                         RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1125                         RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1126                         RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1127                 break;
1128
1129         case SND_SOC_DAPM_PRE_PMD:
1130                 /* headphone mute sequence */
1131                 snd_soc_update_bits(codec, RT5645_DEPOP_M3,
1132                         RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1133                         RT5645_CP_FQ3_MASK,
1134                         (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ1_SFT) |
1135                         (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1136                         (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ3_SFT));
1137                 regmap_write(rt5645->regmap,
1138                         RT5645_PR_BASE + RT5645_MAMP_INT_REG2, 0xfc00);
1139                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1140                         RT5645_HP_SG_MASK, RT5645_HP_SG_EN);
1141                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1142                         RT5645_RSTP_MASK, RT5645_RSTP_EN);
1143                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1144                         RT5645_RSTP_MASK | RT5645_HP_L_SMT_MASK |
1145                         RT5645_HP_R_SMT_MASK, RT5645_RSTP_DIS |
1146                         RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1147                 msleep(30);
1148                 hp_amp_power(codec, 0);
1149                 break;
1150
1151         default:
1152                 return 0;
1153         }
1154
1155         return 0;
1156 }
1157
1158 static int rt5645_spk_event(struct snd_soc_dapm_widget *w,
1159         struct snd_kcontrol *kcontrol, int event)
1160 {
1161         struct snd_soc_codec *codec = w->codec;
1162
1163         switch (event) {
1164         case SND_SOC_DAPM_POST_PMU:
1165                 snd_soc_update_bits(codec, RT5645_PWR_DIG1,
1166                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1167                         RT5645_PWR_CLS_D_L,
1168                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1169                         RT5645_PWR_CLS_D_L);
1170                 break;
1171
1172         case SND_SOC_DAPM_PRE_PMD:
1173                 snd_soc_update_bits(codec, RT5645_PWR_DIG1,
1174                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1175                         RT5645_PWR_CLS_D_L, 0);
1176                 break;
1177
1178         default:
1179                 return 0;
1180         }
1181
1182         return 0;
1183 }
1184
1185 static int rt5645_lout_event(struct snd_soc_dapm_widget *w,
1186         struct snd_kcontrol *kcontrol, int event)
1187 {
1188         struct snd_soc_codec *codec = w->codec;
1189
1190         switch (event) {
1191         case SND_SOC_DAPM_POST_PMU:
1192                 hp_amp_power(codec, 1);
1193                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1194                         RT5645_PWR_LM, RT5645_PWR_LM);
1195                 snd_soc_update_bits(codec, RT5645_LOUT1,
1196                         RT5645_L_MUTE | RT5645_R_MUTE, 0);
1197                 break;
1198
1199         case SND_SOC_DAPM_PRE_PMD:
1200                 snd_soc_update_bits(codec, RT5645_LOUT1,
1201                         RT5645_L_MUTE | RT5645_R_MUTE,
1202                         RT5645_L_MUTE | RT5645_R_MUTE);
1203                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1204                         RT5645_PWR_LM, 0);
1205                 hp_amp_power(codec, 0);
1206                 break;
1207
1208         default:
1209                 return 0;
1210         }
1211
1212         return 0;
1213 }
1214
1215 static int rt5645_bst2_event(struct snd_soc_dapm_widget *w,
1216         struct snd_kcontrol *kcontrol, int event)
1217 {
1218         struct snd_soc_codec *codec = w->codec;
1219
1220         switch (event) {
1221         case SND_SOC_DAPM_POST_PMU:
1222                 snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
1223                         RT5645_PWR_BST2_P, RT5645_PWR_BST2_P);
1224                 break;
1225
1226         case SND_SOC_DAPM_PRE_PMD:
1227                 snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
1228                         RT5645_PWR_BST2_P, 0);
1229                 break;
1230
1231         default:
1232                 return 0;
1233         }
1234
1235         return 0;
1236 }
1237
1238 static const struct snd_soc_dapm_widget rt5645_dapm_widgets[] = {
1239         SND_SOC_DAPM_SUPPLY("LDO2", RT5645_PWR_MIXER,
1240                 RT5645_PWR_LDO2_BIT, 0, NULL, 0),
1241         SND_SOC_DAPM_SUPPLY("PLL1", RT5645_PWR_ANLG2,
1242                 RT5645_PWR_PLL_BIT, 0, NULL, 0),
1243
1244         SND_SOC_DAPM_SUPPLY("JD Power", RT5645_PWR_ANLG2,
1245                 RT5645_PWR_JD1_BIT, 0, NULL, 0),
1246         SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5645_PWR_VOL,
1247                 RT5645_PWR_MIC_DET_BIT, 0, NULL, 0),
1248
1249         /* Input Side */
1250         /* micbias */
1251         SND_SOC_DAPM_MICBIAS("micbias1", RT5645_PWR_ANLG2,
1252                         RT5645_PWR_MB1_BIT, 0),
1253         SND_SOC_DAPM_MICBIAS("micbias2", RT5645_PWR_ANLG2,
1254                         RT5645_PWR_MB2_BIT, 0),
1255         /* Input Lines */
1256         SND_SOC_DAPM_INPUT("DMIC L1"),
1257         SND_SOC_DAPM_INPUT("DMIC R1"),
1258         SND_SOC_DAPM_INPUT("DMIC L2"),
1259         SND_SOC_DAPM_INPUT("DMIC R2"),
1260
1261         SND_SOC_DAPM_INPUT("IN1P"),
1262         SND_SOC_DAPM_INPUT("IN1N"),
1263         SND_SOC_DAPM_INPUT("IN2P"),
1264         SND_SOC_DAPM_INPUT("IN2N"),
1265
1266         SND_SOC_DAPM_INPUT("Haptic Generator"),
1267
1268         SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1269         SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1270         SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1271                 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1272         SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5645_DMIC_CTRL1,
1273                 RT5645_DMIC_1_EN_SFT, 0, NULL, 0),
1274         SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5645_DMIC_CTRL1,
1275                 RT5645_DMIC_2_EN_SFT, 0, NULL, 0),
1276         /* Boost */
1277         SND_SOC_DAPM_PGA("BST1", RT5645_PWR_ANLG2,
1278                 RT5645_PWR_BST1_BIT, 0, NULL, 0),
1279         SND_SOC_DAPM_PGA_E("BST2", RT5645_PWR_ANLG2,
1280                 RT5645_PWR_BST2_BIT, 0, NULL, 0, rt5645_bst2_event,
1281                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1282         /* Input Volume */
1283         SND_SOC_DAPM_PGA("INL VOL", RT5645_PWR_VOL,
1284                 RT5645_PWR_IN_L_BIT, 0, NULL, 0),
1285         SND_SOC_DAPM_PGA("INR VOL", RT5645_PWR_VOL,
1286                 RT5645_PWR_IN_R_BIT, 0, NULL, 0),
1287         /* REC Mixer */
1288         SND_SOC_DAPM_MIXER("RECMIXL", RT5645_PWR_MIXER, RT5645_PWR_RM_L_BIT,
1289                         0, rt5645_rec_l_mix, ARRAY_SIZE(rt5645_rec_l_mix)),
1290         SND_SOC_DAPM_MIXER("RECMIXR", RT5645_PWR_MIXER, RT5645_PWR_RM_R_BIT,
1291                         0, rt5645_rec_r_mix, ARRAY_SIZE(rt5645_rec_r_mix)),
1292         /* ADCs */
1293         SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0),
1294         SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0),
1295
1296         SND_SOC_DAPM_SUPPLY("ADC L power", RT5645_PWR_DIG1,
1297                 RT5645_PWR_ADC_L_BIT, 0, NULL, 0),
1298         SND_SOC_DAPM_SUPPLY("ADC R power", RT5645_PWR_DIG1,
1299                 RT5645_PWR_ADC_R_BIT, 0, NULL, 0),
1300
1301         /* ADC Mux */
1302         SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
1303                 &rt5645_sto1_dmic_mux),
1304         SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1305                 &rt5645_sto_adc2_mux),
1306         SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1307                 &rt5645_sto_adc2_mux),
1308         SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1309                 &rt5645_sto_adc1_mux),
1310         SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1311                 &rt5645_sto_adc1_mux),
1312         SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
1313                 &rt5645_mono_dmic_l_mux),
1314         SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
1315                 &rt5645_mono_dmic_r_mux),
1316         SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1317                 &rt5645_mono_adc_l2_mux),
1318         SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1319                 &rt5645_mono_adc_l1_mux),
1320         SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1321                 &rt5645_mono_adc_r1_mux),
1322         SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1323                 &rt5645_mono_adc_r2_mux),
1324         /* ADC Mixer */
1325
1326         SND_SOC_DAPM_SUPPLY_S("adc stereo1 filter", 1, RT5645_PWR_DIG2,
1327                 RT5645_PWR_ADC_S1F_BIT, 0, NULL, 0),
1328         SND_SOC_DAPM_SUPPLY_S("adc stereo2 filter", 1, RT5645_PWR_DIG2,
1329                 RT5645_PWR_ADC_S2F_BIT, 0, NULL, 0),
1330         SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0,
1331                 rt5645_sto1_adc_l_mix, ARRAY_SIZE(rt5645_sto1_adc_l_mix),
1332                 NULL, 0),
1333         SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0,
1334                 rt5645_sto1_adc_r_mix, ARRAY_SIZE(rt5645_sto1_adc_r_mix),
1335                 NULL, 0),
1336         SND_SOC_DAPM_SUPPLY_S("adc mono left filter", 1, RT5645_PWR_DIG2,
1337                 RT5645_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1338         SND_SOC_DAPM_MIXER_E("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1339                 rt5645_mono_adc_l_mix, ARRAY_SIZE(rt5645_mono_adc_l_mix),
1340                 NULL, 0),
1341         SND_SOC_DAPM_SUPPLY_S("adc mono right filter", 1, RT5645_PWR_DIG2,
1342                 RT5645_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1343         SND_SOC_DAPM_MIXER_E("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1344                 rt5645_mono_adc_r_mix, ARRAY_SIZE(rt5645_mono_adc_r_mix),
1345                 NULL, 0),
1346
1347         /* ADC PGA */
1348         SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1349         SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1350         SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1351         SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1352         SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1353         SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1354         SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1355         SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1356         SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1357         SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
1358
1359         /* IF1 2 Mux */
1360         SND_SOC_DAPM_MUX("IF1 ADC Mux", SND_SOC_NOPM,
1361                 0, 0, &rt5645_if1_adc_in_mux),
1362         SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM,
1363                 0, 0, &rt5645_if2_adc_in_mux),
1364
1365         /* Digital Interface */
1366         SND_SOC_DAPM_SUPPLY("I2S1", RT5645_PWR_DIG1,
1367                 RT5645_PWR_I2S1_BIT, 0, NULL, 0),
1368         SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1369         SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1370         SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1371         SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1372         SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1373         SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1374         SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1375         SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1376         SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1377         SND_SOC_DAPM_SUPPLY("I2S2", RT5645_PWR_DIG1,
1378                 RT5645_PWR_I2S2_BIT, 0, NULL, 0),
1379         SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1380         SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1381         SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1382         SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1383
1384         /* Digital Interface Select */
1385         SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM,
1386                 0, 0, &rt5645_vad_adc_mux),
1387
1388         /* Audio Interface */
1389         SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1390         SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1391         SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1392         SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1393
1394         /* Output Side */
1395         /* DAC mixer before sound effect  */
1396         SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
1397                 rt5645_dac_l_mix, ARRAY_SIZE(rt5645_dac_l_mix)),
1398         SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
1399                 rt5645_dac_r_mix, ARRAY_SIZE(rt5645_dac_r_mix)),
1400
1401         /* DAC2 channel Mux */
1402         SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_l2_mux),
1403         SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_r2_mux),
1404         SND_SOC_DAPM_PGA("DAC L2 Volume", RT5645_PWR_DIG1,
1405                 RT5645_PWR_DAC_L2_BIT, 0, NULL, 0),
1406         SND_SOC_DAPM_PGA("DAC R2 Volume", RT5645_PWR_DIG1,
1407                 RT5645_PWR_DAC_R2_BIT, 0, NULL, 0),
1408
1409         SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1l_mux),
1410         SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1r_mux),
1411
1412         /* DAC Mixer */
1413         SND_SOC_DAPM_SUPPLY_S("dac stereo1 filter", 1, RT5645_PWR_DIG2,
1414                 RT5645_PWR_DAC_S1F_BIT, 0, NULL, 0),
1415         SND_SOC_DAPM_SUPPLY_S("dac mono left filter", 1, RT5645_PWR_DIG2,
1416                 RT5645_PWR_DAC_MF_L_BIT, 0, NULL, 0),
1417         SND_SOC_DAPM_SUPPLY_S("dac mono right filter", 1, RT5645_PWR_DIG2,
1418                 RT5645_PWR_DAC_MF_R_BIT, 0, NULL, 0),
1419         SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1420                 rt5645_sto_dac_l_mix, ARRAY_SIZE(rt5645_sto_dac_l_mix)),
1421         SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1422                 rt5645_sto_dac_r_mix, ARRAY_SIZE(rt5645_sto_dac_r_mix)),
1423         SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1424                 rt5645_mono_dac_l_mix, ARRAY_SIZE(rt5645_mono_dac_l_mix)),
1425         SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1426                 rt5645_mono_dac_r_mix, ARRAY_SIZE(rt5645_mono_dac_r_mix)),
1427         SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1428                 rt5645_dig_l_mix, ARRAY_SIZE(rt5645_dig_l_mix)),
1429         SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1430                 rt5645_dig_r_mix, ARRAY_SIZE(rt5645_dig_r_mix)),
1431
1432         /* DACs */
1433         SND_SOC_DAPM_DAC("DAC L1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L1_BIT,
1434                 0),
1435         SND_SOC_DAPM_DAC("DAC L2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L2_BIT,
1436                 0),
1437         SND_SOC_DAPM_DAC("DAC R1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R1_BIT,
1438                 0),
1439         SND_SOC_DAPM_DAC("DAC R2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R2_BIT,
1440                 0),
1441         /* OUT Mixer */
1442         SND_SOC_DAPM_MIXER("SPK MIXL", RT5645_PWR_MIXER, RT5645_PWR_SM_L_BIT,
1443                 0, rt5645_spk_l_mix, ARRAY_SIZE(rt5645_spk_l_mix)),
1444         SND_SOC_DAPM_MIXER("SPK MIXR", RT5645_PWR_MIXER, RT5645_PWR_SM_R_BIT,
1445                 0, rt5645_spk_r_mix, ARRAY_SIZE(rt5645_spk_r_mix)),
1446         SND_SOC_DAPM_MIXER("OUT MIXL", RT5645_PWR_MIXER, RT5645_PWR_OM_L_BIT,
1447                 0, rt5645_out_l_mix, ARRAY_SIZE(rt5645_out_l_mix)),
1448         SND_SOC_DAPM_MIXER("OUT MIXR", RT5645_PWR_MIXER, RT5645_PWR_OM_R_BIT,
1449                 0, rt5645_out_r_mix, ARRAY_SIZE(rt5645_out_r_mix)),
1450         /* Ouput Volume */
1451         SND_SOC_DAPM_SWITCH("SPKVOL L", RT5645_PWR_VOL, RT5645_PWR_SV_L_BIT, 0,
1452                 &spk_l_vol_control),
1453         SND_SOC_DAPM_SWITCH("SPKVOL R", RT5645_PWR_VOL, RT5645_PWR_SV_R_BIT, 0,
1454                 &spk_r_vol_control),
1455         SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5645_PWR_VOL, RT5645_PWR_HV_L_BIT,
1456                 0, rt5645_hpvoll_mix, ARRAY_SIZE(rt5645_hpvoll_mix)),
1457         SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5645_PWR_VOL, RT5645_PWR_HV_R_BIT,
1458                 0, rt5645_hpvolr_mix, ARRAY_SIZE(rt5645_hpvolr_mix)),
1459         SND_SOC_DAPM_SUPPLY("HPOVOL MIXL Power", RT5645_PWR_MIXER,
1460                 RT5645_PWR_HM_L_BIT, 0, NULL, 0),
1461         SND_SOC_DAPM_SUPPLY("HPOVOL MIXR Power", RT5645_PWR_MIXER,
1462                 RT5645_PWR_HM_R_BIT, 0, NULL, 0),
1463         SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
1464         SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
1465         SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
1466         SND_SOC_DAPM_SWITCH("HPOVOL L", SND_SOC_NOPM, 0, 0, &hp_l_vol_control),
1467         SND_SOC_DAPM_SWITCH("HPOVOL R", SND_SOC_NOPM, 0, 0, &hp_r_vol_control),
1468
1469         /* HPO/LOUT/Mono Mixer */
1470         SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_l_mix,
1471                 ARRAY_SIZE(rt5645_spo_l_mix)),
1472         SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_r_mix,
1473                 ARRAY_SIZE(rt5645_spo_r_mix)),
1474         SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, rt5645_hpo_mix,
1475                 ARRAY_SIZE(rt5645_hpo_mix)),
1476         SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0, rt5645_lout_mix,
1477                 ARRAY_SIZE(rt5645_lout_mix)),
1478
1479         SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0, rt5645_hp_event,
1480                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1481         SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0, rt5645_lout_event,
1482                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1483         SND_SOC_DAPM_PGA_S("SPK amp", 2, SND_SOC_NOPM, 0, 0, rt5645_spk_event,
1484                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1485
1486         /* PDM */
1487         SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5645_PWR_DIG2, RT5645_PWR_PDM1_BIT,
1488                 0, NULL, 0),
1489         SND_SOC_DAPM_MUX("PDM1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_l_mux),
1490         SND_SOC_DAPM_MUX("PDM1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_r_mux),
1491
1492         SND_SOC_DAPM_SWITCH("PDM1 L", SND_SOC_NOPM, 0, 0, &pdm1_l_vol_control),
1493         SND_SOC_DAPM_SWITCH("PDM1 R", SND_SOC_NOPM, 0, 0, &pdm1_r_vol_control),
1494
1495         /* Output Lines */
1496         SND_SOC_DAPM_OUTPUT("HPOL"),
1497         SND_SOC_DAPM_OUTPUT("HPOR"),
1498         SND_SOC_DAPM_OUTPUT("LOUTL"),
1499         SND_SOC_DAPM_OUTPUT("LOUTR"),
1500         SND_SOC_DAPM_OUTPUT("PDM1L"),
1501         SND_SOC_DAPM_OUTPUT("PDM1R"),
1502         SND_SOC_DAPM_OUTPUT("SPOL"),
1503         SND_SOC_DAPM_OUTPUT("SPOR"),
1504 };
1505
1506 static const struct snd_soc_dapm_route rt5645_dapm_routes[] = {
1507         { "IN1P", NULL, "LDO2" },
1508         { "IN2P", NULL, "LDO2" },
1509
1510         { "DMIC1", NULL, "DMIC L1" },
1511         { "DMIC1", NULL, "DMIC R1" },
1512         { "DMIC2", NULL, "DMIC L2" },
1513         { "DMIC2", NULL, "DMIC R2" },
1514
1515         { "BST1", NULL, "IN1P" },
1516         { "BST1", NULL, "IN1N" },
1517         { "BST1", NULL, "JD Power" },
1518         { "BST1", NULL, "Mic Det Power" },
1519         { "BST2", NULL, "IN2P" },
1520         { "BST2", NULL, "IN2N" },
1521
1522         { "INL VOL", NULL, "IN2P" },
1523         { "INR VOL", NULL, "IN2N" },
1524
1525         { "RECMIXL", "HPOL Switch", "HPOL" },
1526         { "RECMIXL", "INL Switch", "INL VOL" },
1527         { "RECMIXL", "BST2 Switch", "BST2" },
1528         { "RECMIXL", "BST1 Switch", "BST1" },
1529         { "RECMIXL", "OUT MIXL Switch", "OUT MIXL" },
1530
1531         { "RECMIXR", "HPOR Switch", "HPOR" },
1532         { "RECMIXR", "INR Switch", "INR VOL" },
1533         { "RECMIXR", "BST2 Switch", "BST2" },
1534         { "RECMIXR", "BST1 Switch", "BST1" },
1535         { "RECMIXR", "OUT MIXR Switch", "OUT MIXR" },
1536
1537         { "ADC L", NULL, "RECMIXL" },
1538         { "ADC L", NULL, "ADC L power" },
1539         { "ADC R", NULL, "RECMIXR" },
1540         { "ADC R", NULL, "ADC R power" },
1541
1542         {"DMIC L1", NULL, "DMIC CLK"},
1543         {"DMIC L1", NULL, "DMIC1 Power"},
1544         {"DMIC R1", NULL, "DMIC CLK"},
1545         {"DMIC R1", NULL, "DMIC1 Power"},
1546         {"DMIC L2", NULL, "DMIC CLK"},
1547         {"DMIC L2", NULL, "DMIC2 Power"},
1548         {"DMIC R2", NULL, "DMIC CLK"},
1549         {"DMIC R2", NULL, "DMIC2 Power"},
1550
1551         { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
1552         { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
1553
1554         { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
1555         { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
1556
1557         { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
1558         { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
1559
1560         { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1561         { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
1562         { "Stereo1 ADC L1 Mux", "ADC", "ADC L" },
1563         { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
1564
1565         { "Stereo1 ADC R1 Mux", "ADC", "ADC R" },
1566         { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
1567         { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1568         { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
1569
1570         { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
1571         { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1572         { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1573         { "Mono ADC L1 Mux", "ADC", "ADC L" },
1574
1575         { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1576         { "Mono ADC R1 Mux", "ADC", "ADC R" },
1577         { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
1578         { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1579
1580         { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
1581         { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
1582         { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
1583         { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
1584
1585         { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
1586         { "Stereo1 ADC MIXL", NULL, "adc stereo1 filter" },
1587         { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
1588
1589         { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
1590         { "Stereo1 ADC MIXR", NULL, "adc stereo1 filter" },
1591         { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
1592
1593         { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
1594         { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
1595         { "Mono ADC MIXL", NULL, "adc mono left filter" },
1596         { "adc mono left filter", NULL, "PLL1", is_sys_clk_from_pll },
1597
1598         { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
1599         { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
1600         { "Mono ADC MIXR", NULL, "adc mono right filter" },
1601         { "adc mono right filter", NULL, "PLL1", is_sys_clk_from_pll },
1602
1603         { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
1604         { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
1605         { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
1606
1607         { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
1608         { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
1609         { "IF_ADC2", NULL, "Mono ADC MIXL" },
1610         { "IF_ADC2", NULL, "Mono ADC MIXR" },
1611         { "VAD_ADC", NULL, "VAD ADC Mux" },
1612
1613         { "IF1 ADC Mux", "IF_ADC1", "IF_ADC1" },
1614         { "IF1 ADC Mux", "IF_ADC2", "IF_ADC2" },
1615         { "IF1 ADC Mux", "VAD_ADC", "VAD_ADC" },
1616
1617         { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
1618         { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
1619         { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
1620
1621         { "IF1 ADC", NULL, "I2S1" },
1622         { "IF1 ADC", NULL, "IF1 ADC Mux" },
1623         { "IF2 ADC", NULL, "I2S2" },
1624         { "IF2 ADC", NULL, "IF2 ADC Mux" },
1625
1626         { "AIF1TX", NULL, "IF1 ADC" },
1627         { "AIF1TX", NULL, "IF2 ADC" },
1628         { "AIF2TX", NULL, "IF2 ADC" },
1629
1630         { "IF1 DAC1", NULL, "AIF1RX" },
1631         { "IF1 DAC2", NULL, "AIF1RX" },
1632         { "IF2 DAC", NULL, "AIF2RX" },
1633
1634         { "IF1 DAC1", NULL, "I2S1" },
1635         { "IF1 DAC2", NULL, "I2S1" },
1636         { "IF2 DAC", NULL, "I2S2" },
1637
1638         { "IF1 DAC2 L", NULL, "IF1 DAC2" },
1639         { "IF1 DAC2 R", NULL, "IF1 DAC2" },
1640         { "IF1 DAC1 L", NULL, "IF1 DAC1" },
1641         { "IF1 DAC1 R", NULL, "IF1 DAC1" },
1642         { "IF2 DAC L", NULL, "IF2 DAC" },
1643         { "IF2 DAC R", NULL, "IF2 DAC" },
1644
1645         { "DAC1 L Mux", "IF1 DAC", "IF1 DAC1 L" },
1646         { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
1647
1648         { "DAC1 R Mux", "IF1 DAC", "IF1 DAC1 R" },
1649         { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
1650
1651         { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
1652         { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
1653         { "DAC1 MIXL", NULL, "dac stereo1 filter" },
1654         { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
1655         { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
1656         { "DAC1 MIXR", NULL, "dac stereo1 filter" },
1657
1658         { "DAC L2 Mux", "IF1 DAC", "IF1 DAC2 L" },
1659         { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
1660         { "DAC L2 Mux", "Mono ADC", "Mono ADC MIXL" },
1661         { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
1662         { "DAC L2 Volume", NULL, "DAC L2 Mux" },
1663         { "DAC L2 Volume", NULL, "dac mono left filter" },
1664
1665         { "DAC R2 Mux", "IF1 DAC", "IF1 DAC2 R" },
1666         { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
1667         { "DAC R2 Mux", "Mono ADC", "Mono ADC MIXR" },
1668         { "DAC R2 Mux", "Haptic", "Haptic Generator" },
1669         { "DAC R2 Volume", NULL, "DAC R2 Mux" },
1670         { "DAC R2 Volume", NULL, "dac mono right filter" },
1671
1672         { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
1673         { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
1674         { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1675         { "Stereo DAC MIXL", NULL, "dac stereo1 filter" },
1676         { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
1677         { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
1678         { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1679         { "Stereo DAC MIXR", NULL, "dac stereo1 filter" },
1680
1681         { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
1682         { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1683         { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
1684         { "Mono DAC MIXL", NULL, "dac mono left filter" },
1685         { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
1686         { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1687         { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
1688         { "Mono DAC MIXR", NULL, "dac mono right filter" },
1689
1690         { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
1691         { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1692         { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
1693         { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
1694         { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1695         { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
1696
1697         { "DAC L1", NULL, "Stereo DAC MIXL" },
1698         { "DAC L1", NULL, "PLL1", is_sys_clk_from_pll },
1699         { "DAC R1", NULL, "Stereo DAC MIXR" },
1700         { "DAC R1", NULL, "PLL1", is_sys_clk_from_pll },
1701         { "DAC L2", NULL, "Mono DAC MIXL" },
1702         { "DAC L2", NULL, "PLL1", is_sys_clk_from_pll },
1703         { "DAC R2", NULL, "Mono DAC MIXR" },
1704         { "DAC R2", NULL, "PLL1", is_sys_clk_from_pll },
1705
1706         { "SPK MIXL", "BST1 Switch", "BST1" },
1707         { "SPK MIXL", "INL Switch", "INL VOL" },
1708         { "SPK MIXL", "DAC L1 Switch", "DAC L1" },
1709         { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
1710         { "SPK MIXR", "BST2 Switch", "BST2" },
1711         { "SPK MIXR", "INR Switch", "INR VOL" },
1712         { "SPK MIXR", "DAC R1 Switch", "DAC R1" },
1713         { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
1714
1715         { "OUT MIXL", "BST1 Switch", "BST1" },
1716         { "OUT MIXL", "INL Switch", "INL VOL" },
1717         { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
1718         { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
1719
1720         { "OUT MIXR", "BST2 Switch", "BST2" },
1721         { "OUT MIXR", "INR Switch", "INR VOL" },
1722         { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
1723         { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
1724
1725         { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
1726         { "HPOVOL MIXL", "DAC2 Switch", "DAC L2" },
1727         { "HPOVOL MIXL", "INL Switch", "INL VOL" },
1728         { "HPOVOL MIXL", "BST1 Switch", "BST1" },
1729         { "HPOVOL MIXL", NULL, "HPOVOL MIXL Power" },
1730         { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
1731         { "HPOVOL MIXR", "DAC2 Switch", "DAC R2" },
1732         { "HPOVOL MIXR", "INR Switch", "INR VOL" },
1733         { "HPOVOL MIXR", "BST2 Switch", "BST2" },
1734         { "HPOVOL MIXR", NULL, "HPOVOL MIXR Power" },
1735
1736         { "DAC 2", NULL, "DAC L2" },
1737         { "DAC 2", NULL, "DAC R2" },
1738         { "DAC 1", NULL, "DAC L1" },
1739         { "DAC 1", NULL, "DAC R1" },
1740         { "HPOVOL L", "Switch", "HPOVOL MIXL" },
1741         { "HPOVOL R", "Switch", "HPOVOL MIXR" },
1742         { "HPOVOL", NULL, "HPOVOL L" },
1743         { "HPOVOL", NULL, "HPOVOL R" },
1744         { "HPO MIX", "DAC1 Switch", "DAC 1" },
1745         { "HPO MIX", "HPVOL Switch", "HPOVOL" },
1746
1747         { "SPKVOL L", "Switch", "SPK MIXL" },
1748         { "SPKVOL R", "Switch", "SPK MIXR" },
1749
1750         { "SPOL MIX", "DAC R1 Switch", "DAC R1" },
1751         { "SPOL MIX", "DAC L1 Switch", "DAC L1" },
1752         { "SPOL MIX", "SPKVOL R Switch", "SPKVOL R" },
1753         { "SPOL MIX", "SPKVOL L Switch", "SPKVOL L" },
1754         { "SPOR MIX", "DAC R1 Switch", "DAC R1" },
1755         { "SPOR MIX", "SPKVOL R Switch", "SPKVOL R" },
1756
1757         { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
1758         { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
1759         { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
1760         { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
1761
1762         { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
1763         { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
1764         { "PDM1 L Mux", NULL, "PDM1 Power" },
1765         { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
1766         { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
1767         { "PDM1 R Mux", NULL, "PDM1 Power" },
1768
1769         { "HP amp", NULL, "HPO MIX" },
1770         { "HP amp", NULL, "JD Power" },
1771         { "HP amp", NULL, "Mic Det Power" },
1772         { "HP amp", NULL, "LDO2" },
1773         { "HPOL", NULL, "HP amp" },
1774         { "HPOR", NULL, "HP amp" },
1775
1776         { "LOUT amp", NULL, "LOUT MIX" },
1777         { "LOUTL", NULL, "LOUT amp" },
1778         { "LOUTR", NULL, "LOUT amp" },
1779
1780         { "PDM1 L", "Switch", "PDM1 L Mux" },
1781         { "PDM1 R", "Switch", "PDM1 R Mux" },
1782
1783         { "PDM1L", NULL, "PDM1 L" },
1784         { "PDM1R", NULL, "PDM1 R" },
1785
1786         { "SPK amp", NULL, "SPOL MIX" },
1787         { "SPK amp", NULL, "SPOR MIX" },
1788         { "SPOL", NULL, "SPK amp" },
1789         { "SPOR", NULL, "SPK amp" },
1790 };
1791
1792 static int rt5645_hw_params(struct snd_pcm_substream *substream,
1793         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1794 {
1795         struct snd_soc_codec *codec = dai->codec;
1796         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1797         unsigned int val_len = 0, val_clk, mask_clk;
1798         int pre_div, bclk_ms, frame_size;
1799
1800         rt5645->lrck[dai->id] = params_rate(params);
1801         pre_div = rl6231_get_clk_info(rt5645->sysclk, rt5645->lrck[dai->id]);
1802         if (pre_div < 0) {
1803                 dev_err(codec->dev, "Unsupported clock setting\n");
1804                 return -EINVAL;
1805         }
1806         frame_size = snd_soc_params_to_frame_size(params);
1807         if (frame_size < 0) {
1808                 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
1809                 return -EINVAL;
1810         }
1811         bclk_ms = frame_size > 32;
1812         rt5645->bclk[dai->id] = rt5645->lrck[dai->id] * (32 << bclk_ms);
1813
1814         dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
1815                 rt5645->bclk[dai->id], rt5645->lrck[dai->id]);
1816         dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
1817                                 bclk_ms, pre_div, dai->id);
1818
1819         switch (params_width(params)) {
1820         case 16:
1821                 break;
1822         case 20:
1823                 val_len |= RT5645_I2S_DL_20;
1824                 break;
1825         case 24:
1826                 val_len |= RT5645_I2S_DL_24;
1827                 break;
1828         case 8:
1829                 val_len |= RT5645_I2S_DL_8;
1830                 break;
1831         default:
1832                 return -EINVAL;
1833         }
1834
1835         switch (dai->id) {
1836         case RT5645_AIF1:
1837                 mask_clk = RT5645_I2S_BCLK_MS1_MASK | RT5645_I2S_PD1_MASK;
1838                 val_clk = bclk_ms << RT5645_I2S_BCLK_MS1_SFT |
1839                         pre_div << RT5645_I2S_PD1_SFT;
1840                 snd_soc_update_bits(codec, RT5645_I2S1_SDP,
1841                         RT5645_I2S_DL_MASK, val_len);
1842                 snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk);
1843                 break;
1844         case  RT5645_AIF2:
1845                 mask_clk = RT5645_I2S_BCLK_MS2_MASK | RT5645_I2S_PD2_MASK;
1846                 val_clk = bclk_ms << RT5645_I2S_BCLK_MS2_SFT |
1847                         pre_div << RT5645_I2S_PD2_SFT;
1848                 snd_soc_update_bits(codec, RT5645_I2S2_SDP,
1849                         RT5645_I2S_DL_MASK, val_len);
1850                 snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk);
1851                 break;
1852         default:
1853                 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
1854                 return -EINVAL;
1855         }
1856
1857         return 0;
1858 }
1859
1860 static int rt5645_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1861 {
1862         struct snd_soc_codec *codec = dai->codec;
1863         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1864         unsigned int reg_val = 0;
1865
1866         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1867         case SND_SOC_DAIFMT_CBM_CFM:
1868                 rt5645->master[dai->id] = 1;
1869                 break;
1870         case SND_SOC_DAIFMT_CBS_CFS:
1871                 reg_val |= RT5645_I2S_MS_S;
1872                 rt5645->master[dai->id] = 0;
1873                 break;
1874         default:
1875                 return -EINVAL;
1876         }
1877
1878         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1879         case SND_SOC_DAIFMT_NB_NF:
1880                 break;
1881         case SND_SOC_DAIFMT_IB_NF:
1882                 reg_val |= RT5645_I2S_BP_INV;
1883                 break;
1884         default:
1885                 return -EINVAL;
1886         }
1887
1888         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1889         case SND_SOC_DAIFMT_I2S:
1890                 break;
1891         case SND_SOC_DAIFMT_LEFT_J:
1892                 reg_val |= RT5645_I2S_DF_LEFT;
1893                 break;
1894         case SND_SOC_DAIFMT_DSP_A:
1895                 reg_val |= RT5645_I2S_DF_PCM_A;
1896                 break;
1897         case SND_SOC_DAIFMT_DSP_B:
1898                 reg_val |= RT5645_I2S_DF_PCM_B;
1899                 break;
1900         default:
1901                 return -EINVAL;
1902         }
1903         switch (dai->id) {
1904         case RT5645_AIF1:
1905                 snd_soc_update_bits(codec, RT5645_I2S1_SDP,
1906                         RT5645_I2S_MS_MASK | RT5645_I2S_BP_MASK |
1907                         RT5645_I2S_DF_MASK, reg_val);
1908                 break;
1909         case RT5645_AIF2:
1910                 snd_soc_update_bits(codec, RT5645_I2S2_SDP,
1911                         RT5645_I2S_MS_MASK | RT5645_I2S_BP_MASK |
1912                         RT5645_I2S_DF_MASK, reg_val);
1913                 break;
1914         default:
1915                 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
1916                 return -EINVAL;
1917         }
1918         return 0;
1919 }
1920
1921 static int rt5645_set_dai_sysclk(struct snd_soc_dai *dai,
1922                 int clk_id, unsigned int freq, int dir)
1923 {
1924         struct snd_soc_codec *codec = dai->codec;
1925         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1926         unsigned int reg_val = 0;
1927
1928         if (freq == rt5645->sysclk && clk_id == rt5645->sysclk_src)
1929                 return 0;
1930
1931         switch (clk_id) {
1932         case RT5645_SCLK_S_MCLK:
1933                 reg_val |= RT5645_SCLK_SRC_MCLK;
1934                 break;
1935         case RT5645_SCLK_S_PLL1:
1936                 reg_val |= RT5645_SCLK_SRC_PLL1;
1937                 break;
1938         case RT5645_SCLK_S_RCCLK:
1939                 reg_val |= RT5645_SCLK_SRC_RCCLK;
1940                 break;
1941         default:
1942                 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
1943                 return -EINVAL;
1944         }
1945         snd_soc_update_bits(codec, RT5645_GLB_CLK,
1946                 RT5645_SCLK_SRC_MASK, reg_val);
1947         rt5645->sysclk = freq;
1948         rt5645->sysclk_src = clk_id;
1949
1950         dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
1951
1952         return 0;
1953 }
1954
1955 static int rt5645_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
1956                         unsigned int freq_in, unsigned int freq_out)
1957 {
1958         struct snd_soc_codec *codec = dai->codec;
1959         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1960         struct rl6231_pll_code pll_code;
1961         int ret;
1962
1963         if (source == rt5645->pll_src && freq_in == rt5645->pll_in &&
1964             freq_out == rt5645->pll_out)
1965                 return 0;
1966
1967         if (!freq_in || !freq_out) {
1968                 dev_dbg(codec->dev, "PLL disabled\n");
1969
1970                 rt5645->pll_in = 0;
1971                 rt5645->pll_out = 0;
1972                 snd_soc_update_bits(codec, RT5645_GLB_CLK,
1973                         RT5645_SCLK_SRC_MASK, RT5645_SCLK_SRC_MCLK);
1974                 return 0;
1975         }
1976
1977         switch (source) {
1978         case RT5645_PLL1_S_MCLK:
1979                 snd_soc_update_bits(codec, RT5645_GLB_CLK,
1980                         RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_MCLK);
1981                 break;
1982         case RT5645_PLL1_S_BCLK1:
1983         case RT5645_PLL1_S_BCLK2:
1984                 switch (dai->id) {
1985                 case RT5645_AIF1:
1986                         snd_soc_update_bits(codec, RT5645_GLB_CLK,
1987                                 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK1);
1988                         break;
1989                 case  RT5645_AIF2:
1990                         snd_soc_update_bits(codec, RT5645_GLB_CLK,
1991                                 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK2);
1992                         break;
1993                 default:
1994                         dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
1995                         return -EINVAL;
1996                 }
1997                 break;
1998         default:
1999                 dev_err(codec->dev, "Unknown PLL source %d\n", source);
2000                 return -EINVAL;
2001         }
2002
2003         ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
2004         if (ret < 0) {
2005                 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
2006                 return ret;
2007         }
2008
2009         dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
2010                 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
2011                 pll_code.n_code, pll_code.k_code);
2012
2013         snd_soc_write(codec, RT5645_PLL_CTRL1,
2014                 pll_code.n_code << RT5645_PLL_N_SFT | pll_code.k_code);
2015         snd_soc_write(codec, RT5645_PLL_CTRL2,
2016                 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5645_PLL_M_SFT |
2017                 pll_code.m_bp << RT5645_PLL_M_BP_SFT);
2018
2019         rt5645->pll_in = freq_in;
2020         rt5645->pll_out = freq_out;
2021         rt5645->pll_src = source;
2022
2023         return 0;
2024 }
2025
2026 static int rt5645_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
2027                         unsigned int rx_mask, int slots, int slot_width)
2028 {
2029         struct snd_soc_codec *codec = dai->codec;
2030         unsigned int val = 0;
2031
2032         if (rx_mask || tx_mask)
2033                 val |= (1 << 14);
2034
2035         switch (slots) {
2036         case 4:
2037                 val |= (1 << 12);
2038                 break;
2039         case 6:
2040                 val |= (2 << 12);
2041                 break;
2042         case 8:
2043                 val |= (3 << 12);
2044                 break;
2045         case 2:
2046         default:
2047                 break;
2048         }
2049
2050         switch (slot_width) {
2051         case 20:
2052                 val |= (1 << 10);
2053                 break;
2054         case 24:
2055                 val |= (2 << 10);
2056                 break;
2057         case 32:
2058                 val |= (3 << 10);
2059                 break;
2060         case 16:
2061         default:
2062                 break;
2063         }
2064
2065         snd_soc_update_bits(codec, RT5645_TDM_CTRL_1, 0x7c00, val);
2066
2067         return 0;
2068 }
2069
2070 static int rt5645_set_bias_level(struct snd_soc_codec *codec,
2071                         enum snd_soc_bias_level level)
2072 {
2073         switch (level) {
2074         case SND_SOC_BIAS_STANDBY:
2075                 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
2076                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2077                                 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2078                                 RT5645_PWR_BG | RT5645_PWR_VREF2,
2079                                 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2080                                 RT5645_PWR_BG | RT5645_PWR_VREF2);
2081                         mdelay(10);
2082                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2083                                 RT5645_PWR_FV1 | RT5645_PWR_FV2,
2084                                 RT5645_PWR_FV1 | RT5645_PWR_FV2);
2085                         snd_soc_update_bits(codec, RT5645_GEN_CTRL1,
2086                                 RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
2087                 }
2088                 break;
2089
2090         case SND_SOC_BIAS_OFF:
2091                 snd_soc_write(codec, RT5645_DEPOP_M2, 0x1100);
2092                 snd_soc_write(codec, RT5645_GEN_CTRL1, 0x0128);
2093                 snd_soc_write(codec, RT5645_PWR_DIG1, 0x0000);
2094                 snd_soc_write(codec, RT5645_PWR_DIG2, 0x0000);
2095                 snd_soc_write(codec, RT5645_PWR_VOL, 0x0000);
2096                 snd_soc_write(codec, RT5645_PWR_MIXER, 0x0000);
2097                 snd_soc_write(codec, RT5645_PWR_ANLG1, 0x0000);
2098                 snd_soc_write(codec, RT5645_PWR_ANLG2, 0x0000);
2099                 break;
2100
2101         default:
2102                 break;
2103         }
2104         codec->dapm.bias_level = level;
2105
2106         return 0;
2107 }
2108
2109 static int rt5645_jack_detect(struct snd_soc_codec *codec,
2110         struct snd_soc_jack *jack)
2111 {
2112         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2113         int gpio_state, jack_type = 0;
2114         unsigned int val;
2115
2116         gpio_state = gpio_get_value(rt5645->pdata.hp_det_gpio);
2117
2118         dev_dbg(codec->dev, "gpio = %d(%d)\n", rt5645->pdata.hp_det_gpio,
2119                 gpio_state);
2120
2121         if ((rt5645->pdata.gpio_hp_det_active_high && gpio_state) ||
2122                 (!rt5645->pdata.gpio_hp_det_active_high && !gpio_state)) {
2123                 snd_soc_dapm_force_enable_pin(&codec->dapm, "micbias1");
2124                 snd_soc_dapm_force_enable_pin(&codec->dapm, "micbias2");
2125                 snd_soc_dapm_force_enable_pin(&codec->dapm, "LDO2");
2126                 snd_soc_dapm_force_enable_pin(&codec->dapm, "Mic Det Power");
2127                 snd_soc_dapm_sync(&codec->dapm);
2128
2129                 snd_soc_write(codec, RT5645_IN1_CTRL1, 0x0006);
2130                 snd_soc_write(codec, RT5645_JD_CTRL3, 0x00b0);
2131
2132                 snd_soc_update_bits(codec, RT5645_IN1_CTRL2,
2133                         RT5645_CBJ_MN_JD, 0);
2134                 snd_soc_update_bits(codec, RT5645_IN1_CTRL2,
2135                         RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD);
2136
2137                 msleep(400);
2138                 val = snd_soc_read(codec, RT5645_IN1_CTRL3) & 0x7;
2139                 dev_dbg(codec->dev, "val = %d\n", val);
2140
2141                 if (val == 1 || val == 2)
2142                         jack_type = SND_JACK_HEADSET;
2143                 else
2144                         jack_type = SND_JACK_HEADPHONE;
2145
2146                 snd_soc_dapm_disable_pin(&codec->dapm, "micbias1");
2147                 snd_soc_dapm_disable_pin(&codec->dapm, "micbias2");
2148                 snd_soc_dapm_disable_pin(&codec->dapm, "LDO2");
2149                 snd_soc_dapm_disable_pin(&codec->dapm, "Mic Det Power");
2150                 snd_soc_dapm_sync(&codec->dapm);
2151         }
2152
2153         snd_soc_jack_report(rt5645->jack, jack_type, SND_JACK_HEADSET);
2154
2155         return 0;
2156 }
2157
2158 int rt5645_set_jack_detect(struct snd_soc_codec *codec,
2159         struct snd_soc_jack *jack)
2160 {
2161         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2162
2163         rt5645->jack = jack;
2164
2165         rt5645_jack_detect(codec, rt5645->jack);
2166
2167         return 0;
2168 }
2169 EXPORT_SYMBOL_GPL(rt5645_set_jack_detect);
2170
2171 static irqreturn_t rt5645_irq(int irq, void *data)
2172 {
2173         struct rt5645_priv *rt5645 = data;
2174
2175         rt5645_jack_detect(rt5645->codec, rt5645->jack);
2176
2177         return IRQ_HANDLED;
2178 }
2179
2180 static int rt5645_probe(struct snd_soc_codec *codec)
2181 {
2182         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2183
2184         rt5645->codec = codec;
2185
2186         rt5645_set_bias_level(codec, SND_SOC_BIAS_OFF);
2187
2188         snd_soc_update_bits(codec, RT5645_CHARGE_PUMP, 0x0300, 0x0200);
2189
2190         return 0;
2191 }
2192
2193 static int rt5645_remove(struct snd_soc_codec *codec)
2194 {
2195         rt5645_reset(codec);
2196         return 0;
2197 }
2198
2199 #ifdef CONFIG_PM
2200 static int rt5645_suspend(struct snd_soc_codec *codec)
2201 {
2202         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2203
2204         regcache_cache_only(rt5645->regmap, true);
2205         regcache_mark_dirty(rt5645->regmap);
2206
2207         return 0;
2208 }
2209
2210 static int rt5645_resume(struct snd_soc_codec *codec)
2211 {
2212         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2213
2214         regcache_cache_only(rt5645->regmap, false);
2215         regcache_sync(rt5645->regmap);
2216
2217         return 0;
2218 }
2219 #else
2220 #define rt5645_suspend NULL
2221 #define rt5645_resume NULL
2222 #endif
2223
2224 #define RT5645_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2225 #define RT5645_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2226                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2227
2228 static struct snd_soc_dai_ops rt5645_aif_dai_ops = {
2229         .hw_params = rt5645_hw_params,
2230         .set_fmt = rt5645_set_dai_fmt,
2231         .set_sysclk = rt5645_set_dai_sysclk,
2232         .set_tdm_slot = rt5645_set_tdm_slot,
2233         .set_pll = rt5645_set_dai_pll,
2234 };
2235
2236 static struct snd_soc_dai_driver rt5645_dai[] = {
2237         {
2238                 .name = "rt5645-aif1",
2239                 .id = RT5645_AIF1,
2240                 .playback = {
2241                         .stream_name = "AIF1 Playback",
2242                         .channels_min = 1,
2243                         .channels_max = 2,
2244                         .rates = RT5645_STEREO_RATES,
2245                         .formats = RT5645_FORMATS,
2246                 },
2247                 .capture = {
2248                         .stream_name = "AIF1 Capture",
2249                         .channels_min = 1,
2250                         .channels_max = 2,
2251                         .rates = RT5645_STEREO_RATES,
2252                         .formats = RT5645_FORMATS,
2253                 },
2254                 .ops = &rt5645_aif_dai_ops,
2255         },
2256         {
2257                 .name = "rt5645-aif2",
2258                 .id = RT5645_AIF2,
2259                 .playback = {
2260                         .stream_name = "AIF2 Playback",
2261                         .channels_min = 1,
2262                         .channels_max = 2,
2263                         .rates = RT5645_STEREO_RATES,
2264                         .formats = RT5645_FORMATS,
2265                 },
2266                 .capture = {
2267                         .stream_name = "AIF2 Capture",
2268                         .channels_min = 1,
2269                         .channels_max = 2,
2270                         .rates = RT5645_STEREO_RATES,
2271                         .formats = RT5645_FORMATS,
2272                 },
2273                 .ops = &rt5645_aif_dai_ops,
2274         },
2275 };
2276
2277 static struct snd_soc_codec_driver soc_codec_dev_rt5645 = {
2278         .probe = rt5645_probe,
2279         .remove = rt5645_remove,
2280         .suspend = rt5645_suspend,
2281         .resume = rt5645_resume,
2282         .set_bias_level = rt5645_set_bias_level,
2283         .idle_bias_off = true,
2284         .controls = rt5645_snd_controls,
2285         .num_controls = ARRAY_SIZE(rt5645_snd_controls),
2286         .dapm_widgets = rt5645_dapm_widgets,
2287         .num_dapm_widgets = ARRAY_SIZE(rt5645_dapm_widgets),
2288         .dapm_routes = rt5645_dapm_routes,
2289         .num_dapm_routes = ARRAY_SIZE(rt5645_dapm_routes),
2290 };
2291
2292 static const struct regmap_config rt5645_regmap = {
2293         .reg_bits = 8,
2294         .val_bits = 16,
2295
2296         .max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) *
2297                                                RT5645_PR_SPACING),
2298         .volatile_reg = rt5645_volatile_register,
2299         .readable_reg = rt5645_readable_register,
2300
2301         .cache_type = REGCACHE_RBTREE,
2302         .reg_defaults = rt5645_reg,
2303         .num_reg_defaults = ARRAY_SIZE(rt5645_reg),
2304         .ranges = rt5645_ranges,
2305         .num_ranges = ARRAY_SIZE(rt5645_ranges),
2306 };
2307
2308 static const struct i2c_device_id rt5645_i2c_id[] = {
2309         { "rt5645", 0 },
2310         { }
2311 };
2312 MODULE_DEVICE_TABLE(i2c, rt5645_i2c_id);
2313
2314 static int rt5645_i2c_probe(struct i2c_client *i2c,
2315                     const struct i2c_device_id *id)
2316 {
2317         struct rt5645_platform_data *pdata = dev_get_platdata(&i2c->dev);
2318         struct rt5645_priv *rt5645;
2319         int ret;
2320         unsigned int val;
2321
2322         rt5645 = devm_kzalloc(&i2c->dev, sizeof(struct rt5645_priv),
2323                                 GFP_KERNEL);
2324         if (rt5645 == NULL)
2325                 return -ENOMEM;
2326
2327         rt5645->i2c = i2c;
2328         i2c_set_clientdata(i2c, rt5645);
2329
2330         if (pdata)
2331                 rt5645->pdata = *pdata;
2332
2333         rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5645_regmap);
2334         if (IS_ERR(rt5645->regmap)) {
2335                 ret = PTR_ERR(rt5645->regmap);
2336                 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2337                         ret);
2338                 return ret;
2339         }
2340
2341         regmap_read(rt5645->regmap, RT5645_VENDOR_ID2, &val);
2342         if (val != RT5645_DEVICE_ID) {
2343                 dev_err(&i2c->dev,
2344                         "Device with ID register %x is not rt5645\n", val);
2345                 return -ENODEV;
2346         }
2347
2348         regmap_write(rt5645->regmap, RT5645_RESET, 0);
2349
2350         ret = regmap_register_patch(rt5645->regmap, init_list,
2351                                     ARRAY_SIZE(init_list));
2352         if (ret != 0)
2353                 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2354
2355         if (rt5645->pdata.in2_diff)
2356                 regmap_update_bits(rt5645->regmap, RT5645_IN2_CTRL,
2357                                         RT5645_IN_DF2, RT5645_IN_DF2);
2358
2359         if (rt5645->pdata.dmic_en) {
2360                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2361                         RT5645_GP2_PIN_MASK, RT5645_GP2_PIN_DMIC1_SCL);
2362
2363                 switch (rt5645->pdata.dmic1_data_pin) {
2364                 case RT5645_DMIC_DATA_IN2N:
2365                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2366                                 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_IN2N);
2367                         break;
2368
2369                 case RT5645_DMIC_DATA_GPIO5:
2370                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2371                                 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO5);
2372                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2373                                 RT5645_GP5_PIN_MASK, RT5645_GP5_PIN_DMIC1_SDA);
2374                         break;
2375
2376                 case RT5645_DMIC_DATA_GPIO11:
2377                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2378                                 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO11);
2379                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2380                                 RT5645_GP11_PIN_MASK,
2381                                 RT5645_GP11_PIN_DMIC1_SDA);
2382                         break;
2383
2384                 default:
2385                         break;
2386                 }
2387
2388                 switch (rt5645->pdata.dmic2_data_pin) {
2389                 case RT5645_DMIC_DATA_IN2P:
2390                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2391                                 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_IN2P);
2392                         break;
2393
2394                 case RT5645_DMIC_DATA_GPIO6:
2395                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2396                                 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO6);
2397                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2398                                 RT5645_GP6_PIN_MASK, RT5645_GP6_PIN_DMIC2_SDA);
2399                         break;
2400
2401                 case RT5645_DMIC_DATA_GPIO10:
2402                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2403                                 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO10);
2404                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2405                                 RT5645_GP10_PIN_MASK,
2406                                 RT5645_GP10_PIN_DMIC2_SDA);
2407                         break;
2408
2409                 case RT5645_DMIC_DATA_GPIO12:
2410                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2411                                 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_2_DP_GPIO12);
2412                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2413                                 RT5645_GP12_PIN_MASK,
2414                                 RT5645_GP12_PIN_DMIC2_SDA);
2415                         break;
2416
2417                 default:
2418                         break;
2419                 }
2420
2421         }
2422
2423         if (rt5645->i2c->irq) {
2424                 ret = request_threaded_irq(rt5645->i2c->irq, NULL, rt5645_irq,
2425                         IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
2426                         | IRQF_ONESHOT, "rt5645", rt5645);
2427                 if (ret)
2428                         dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret);
2429         }
2430
2431         if (gpio_is_valid(rt5645->pdata.hp_det_gpio)) {
2432                 ret = gpio_request(rt5645->pdata.hp_det_gpio, "rt5645");
2433                 if (ret)
2434                         dev_err(&i2c->dev, "Fail gpio_request hp_det_gpio\n");
2435
2436                 ret = gpio_direction_input(rt5645->pdata.hp_det_gpio);
2437                 if (ret)
2438                         dev_err(&i2c->dev, "Fail gpio_direction hp_det_gpio\n");
2439         }
2440
2441         return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5645,
2442                                       rt5645_dai, ARRAY_SIZE(rt5645_dai));
2443 }
2444
2445 static int rt5645_i2c_remove(struct i2c_client *i2c)
2446 {
2447         struct rt5645_priv *rt5645 = i2c_get_clientdata(i2c);
2448
2449         if (i2c->irq)
2450                 free_irq(i2c->irq, rt5645);
2451
2452         if (gpio_is_valid(rt5645->pdata.hp_det_gpio))
2453                 gpio_free(rt5645->pdata.hp_det_gpio);
2454
2455         snd_soc_unregister_codec(&i2c->dev);
2456
2457         return 0;
2458 }
2459
2460 static struct i2c_driver rt5645_i2c_driver = {
2461         .driver = {
2462                 .name = "rt5645",
2463                 .owner = THIS_MODULE,
2464         },
2465         .probe = rt5645_i2c_probe,
2466         .remove   = rt5645_i2c_remove,
2467         .id_table = rt5645_i2c_id,
2468 };
2469 module_i2c_driver(rt5645_i2c_driver);
2470
2471 MODULE_DESCRIPTION("ASoC RT5645 driver");
2472 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
2473 MODULE_LICENSE("GPL v2");