2 * rt5640.c -- RT5640 ALSA SoC audio codec driver
4 * Copyright 2011 Realtek Semiconductor Corp.
5 * Author: Johnny Hsu <johnnyhsu@realtek.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/init.h>
15 #include <linux/delay.h>
17 #include <linux/i2c.h>
18 #include <linux/platform_device.h>
19 #include <linux/spi/spi.h>
20 #include <sound/core.h>
21 #include <sound/pcm.h>
22 #include <sound/pcm_params.h>
23 #include <sound/soc.h>
24 #include <sound/soc-dapm.h>
25 #include <sound/initval.h>
26 #include <sound/tlv.h>
30 #if defined(CONFIG_SND_HWDEP) || defined(CONFIG_SND_HWDEP_MODULE)
31 #include "rt56xx_ioctl.h"
32 #include "rt5640_ioctl.h"
37 #if defined(CONFIG_SND_SOC_RT5642_MODULE) || defined(CONFIG_SND_SOC_RT5642)
38 #include "rt5640-dsp.h"
41 #define RT5640_REG_RW 1 /* for debug */
42 #define RT5640_DET_EXT_MIC 0
43 #define USE_ONEBIT_DEPOP 1 /* for one bit depop */
45 #define VERSION "0.8.5 alsa 1.0.24"
47 struct rt5640_init_reg {
52 static struct rt5640_init_reg init_list[] = {
53 {RT5640_GEN_CTRL1 , 0x3f01},//fa[12:13] = 1'b; fa[8~11]=1; fa[0]=1
54 {RT5640_ADDA_CLK1 , 0x1114},//73[2] = 1'b
55 {RT5640_MICBIAS , 0x3030},//93[5:4] = 11'b
56 {RT5640_CLS_D_OUT , 0xa000},//8d[11] = 0'b
57 {RT5640_CLS_D_OVCD , 0x0334},//8c[8] = 1'b
58 {RT5640_PRIV_INDEX , 0x001d},//PR1d[8] = 1'b;
59 {RT5640_PRIV_DATA , 0x0347},
60 {RT5640_PRIV_INDEX , 0x003d},//PR3d[12] = 0'b; PR3d[9] = 1'b
61 {RT5640_PRIV_DATA , 0x2600},
62 {RT5640_PRIV_INDEX , 0x0012},//PR12 = 0aa8'h
63 {RT5640_PRIV_DATA , 0x0aa8},
64 {RT5640_PRIV_INDEX , 0x0014},//PR14 = 8aaa'h
65 {RT5640_PRIV_DATA , 0x8aaa},
66 {RT5640_PRIV_INDEX , 0x0020},//PR20 = 6115'h
67 {RT5640_PRIV_DATA , 0x6115},
68 {RT5640_PRIV_INDEX , 0x0023},//PR23 = 0804'h
69 {RT5640_PRIV_DATA , 0x0804},
71 {RT5640_STO_DAC_MIXER , 0x1414},//Dig inf 1 -> Sto DAC mixer -> DACL
72 {RT5640_OUT_L3_MIXER , 0x01fe},//DACL1 -> OUTMIXL
73 {RT5640_OUT_R3_MIXER , 0x01fe},//DACR1 -> OUTMIXR
74 {RT5640_HP_VOL , 0x8888},//OUTMIX -> HPVOL
75 {RT5640_HPO_MIXER , 0xc000},//HPVOL -> HPOLMIX
76 // {RT5640_HPO_MIXER , 0xa000},//DAC1 -> HPOLMIX
77 // {RT5640_CHARGE_PUMP , 0x0f00},
78 {RT5640_PRIV_INDEX , 0x0090},
79 {RT5640_PRIV_DATA , 0x2000},
80 {RT5640_PRIV_INDEX , 0x0091},
81 {RT5640_PRIV_DATA , 0x1000},
82 // {RT5640_HP_CALIB_AMP_DET, 0x0420},
83 {RT5640_SPK_L_MIXER , 0x0036},//DACL1 -> SPKMIXL
84 {RT5640_SPK_R_MIXER , 0x0036},//DACR1 -> SPKMIXR
85 {RT5640_SPK_VOL , 0x8888},//SPKMIX -> SPKVOL
86 {RT5640_SPO_CLSD_RATIO , 0x0001},
87 {RT5640_SPO_L_MIXER , 0xe800},//SPKVOLL -> SPOLMIX
88 {RT5640_SPO_R_MIXER , 0x2800},//SPKVOLR -> SPORMIX
89 // {RT5640_SPO_L_MIXER , 0xb800},//DAC -> SPOLMIX
90 // {RT5640_SPO_R_MIXER , 0x1800},//DAC -> SPORMIX
91 // {RT5640_I2S1_SDP , 0xD000},//change IIS1 and IIS2
93 {RT5640_IN1_IN2 , 0x5080},//IN1 boost 40db and differential mode
94 {RT5640_IN3_IN4 , 0x0500},//IN2 boost 40db and signal ended mode
95 {RT5640_REC_L2_MIXER , 0x007d},//Mic1 -> RECMIXL
96 {RT5640_REC_R2_MIXER , 0x007d},//Mic1 -> RECMIXR
97 // {RT5640_REC_L2_MIXER , 0x006f},//Mic2 -> RECMIXL
98 // {RT5640_REC_R2_MIXER , 0x006f},//Mic2 -> RECMIXR
99 {RT5640_STO_ADC_MIXER , 0x3020},//ADC -> Sto ADC mixer
101 {RT5640_JD_CTRL , 0x2bc0},//GPIO/IRQ 0x2bc0 low=hp high=spk 0x2e80 low=spk high=hp
102 #if RT5640_DET_EXT_MIC
103 {RT5640_MICBIAS , 0x3800},/* enable MICBIAS short current */
104 {RT5640_GPIO_CTRL1 , 0x8400},/* set GPIO1 to IRQ */
105 {RT5640_GPIO_CTRL3 , 0x0004},/* set GPIO1 output */
106 {RT5640_IRQ_CTRL2 , 0x8000},/*set MICBIAS short current to IRQ */
107 /*( if sticky set regBE : 8800 ) */
110 #define RT5640_INIT_REG_LEN ARRAY_SIZE(init_list)
112 static int rt5640_reg_init(struct snd_soc_codec *codec)
116 for (i = 0; i < RT5640_INIT_REG_LEN; i++)
117 snd_soc_write(codec, init_list[i].reg, init_list[i].val);
122 static int rt5640_index_sync(struct snd_soc_codec *codec)
126 for (i = 0; i < RT5640_INIT_REG_LEN; i++)
127 if (RT5640_PRIV_INDEX == init_list[i].reg ||
128 RT5640_PRIV_DATA == init_list[i].reg)
129 snd_soc_write(codec, init_list[i].reg,
134 static const u16 rt5640_reg[RT5640_VENDOR_ID2 + 1] = {
135 [RT5640_RESET] = 0x000c,
136 [RT5640_SPK_VOL] = 0xc8c8,
137 [RT5640_HP_VOL] = 0xc8c8,
138 [RT5640_OUTPUT] = 0xc8c8,
139 [RT5640_MONO_OUT] = 0x8000,
140 [RT5640_INL_INR_VOL] = 0x0808,
141 [RT5640_DAC1_DIG_VOL] = 0xafaf,
142 [RT5640_DAC2_DIG_VOL] = 0xafaf,
143 [RT5640_ADC_DIG_VOL] = 0x2f2f,
144 [RT5640_ADC_DATA] = 0x2f2f,
145 [RT5640_STO_ADC_MIXER] = 0x7060,
146 [RT5640_MONO_ADC_MIXER] = 0x7070,
147 [RT5640_AD_DA_MIXER] = 0x8080,
148 [RT5640_STO_DAC_MIXER] = 0x5454,
149 [RT5640_MONO_DAC_MIXER] = 0x5454,
150 [RT5640_DIG_MIXER] = 0xaa00,
151 [RT5640_DSP_PATH2] = 0xa000,
152 [RT5640_REC_L2_MIXER] = 0x007f,
153 [RT5640_REC_R2_MIXER] = 0x007f,
154 [RT5640_HPO_MIXER] = 0xe000,
155 [RT5640_SPK_L_MIXER] = 0x003e,
156 [RT5640_SPK_R_MIXER] = 0x003e,
157 [RT5640_SPO_L_MIXER] = 0xf800,
158 [RT5640_SPO_R_MIXER] = 0x3800,
159 [RT5640_SPO_CLSD_RATIO] = 0x0004,
160 [RT5640_MONO_MIXER] = 0xfc00,
161 [RT5640_OUT_L3_MIXER] = 0x01ff,
162 [RT5640_OUT_R3_MIXER] = 0x01ff,
163 [RT5640_LOUT_MIXER] = 0xf000,
164 [RT5640_PWR_ANLG1] = 0x00c0,
165 [RT5640_I2S1_SDP] = 0x8000,
166 [RT5640_I2S2_SDP] = 0x8000,
167 [RT5640_I2S3_SDP] = 0x8000,
168 [RT5640_ADDA_CLK1] = 0x1110,
169 [RT5640_ADDA_CLK2] = 0x0c00,
170 [RT5640_DMIC] = 0x1d00,
171 [RT5640_ASRC_3] = 0x0008,
172 [RT5640_HP_OVCD] = 0x0600,
173 [RT5640_CLS_D_OVCD] = 0x0228,
174 [RT5640_CLS_D_OUT] = 0xa800,
175 [RT5640_DEPOP_M1] = 0x0004,
176 [RT5640_DEPOP_M2] = 0x1100,
177 [RT5640_DEPOP_M3] = 0x0646,
178 [RT5640_CHARGE_PUMP] = 0x0c00,
179 [RT5640_MICBIAS] = 0x3000,
180 [RT5640_EQ_CTRL1] = 0x2080,
181 [RT5640_DRC_AGC_1] = 0x2206,
182 [RT5640_DRC_AGC_2] = 0x1f00,
183 [RT5640_ANC_CTRL1] = 0x034b,
184 [RT5640_ANC_CTRL2] = 0x0066,
185 [RT5640_ANC_CTRL3] = 0x000b,
186 [RT5640_GPIO_CTRL1] = 0x0400,
187 [RT5640_DSP_CTRL3] = 0x2000,
188 [RT5640_BASE_BACK] = 0x0013,
189 [RT5640_MP3_PLUS1] = 0x0680,
190 [RT5640_MP3_PLUS2] = 0x1c17,
191 [RT5640_3D_HP] = 0x8c00,
192 [RT5640_ADJ_HPF] = 0xaa20,
193 [RT5640_HP_CALIB_AMP_DET] = 0x0400,
194 [RT5640_SV_ZCD1] = 0x0809,
195 [RT5640_VENDOR_ID1] = 0x10ec,
196 [RT5640_VENDOR_ID2] = 0x6231,
199 static int rt5640_reset(struct snd_soc_codec *codec)
201 return snd_soc_write(codec, RT5640_RESET, 0);
205 * rt5640_index_write - Write private register.
206 * @codec: SoC audio codec device.
207 * @reg: Private register index.
208 * @value: Private register Data.
210 * Modify private register for advanced setting. It can be written through
211 * private index (0x6a) and data (0x6c) register.
213 * Returns 0 for success or negative error code.
215 static int rt5640_index_write(struct snd_soc_codec *codec,
216 unsigned int reg, unsigned int value)
220 ret = snd_soc_write(codec, RT5640_PRIV_INDEX, reg);
222 dev_err(codec->dev, "Failed to set private addr: %d\n", ret);
225 ret = snd_soc_write(codec, RT5640_PRIV_DATA, value);
227 dev_err(codec->dev, "Failed to set private value: %d\n", ret);
237 * rt5640_index_read - Read private register.
238 * @codec: SoC audio codec device.
239 * @reg: Private register index.
241 * Read advanced setting from private register. It can be read through
242 * private index (0x6a) and data (0x6c) register.
244 * Returns private register value or negative error code.
246 static unsigned int rt5640_index_read(
247 struct snd_soc_codec *codec, unsigned int reg)
251 ret = snd_soc_write(codec, RT5640_PRIV_INDEX, reg);
253 dev_err(codec->dev, "Failed to set private addr: %d\n", ret);
256 return snd_soc_read(codec, RT5640_PRIV_DATA);
260 * rt5640_index_update_bits - update private register bits
261 * @codec: audio codec
262 * @reg: Private register index.
263 * @mask: register mask
266 * Writes new register value.
268 * Returns 1 for change, 0 for no change, or negative error code.
270 static int rt5640_index_update_bits(struct snd_soc_codec *codec,
271 unsigned int reg, unsigned int mask, unsigned int value)
273 unsigned int old, new;
276 ret = rt5640_index_read(codec, reg);
278 dev_err(codec->dev, "Failed to read private reg: %d\n", ret);
283 new = (old & ~mask) | (value & mask);
286 ret = rt5640_index_write(codec, reg, new);
289 "Failed to write private reg: %d\n", ret);
299 static int rt5640_volatile_register(
300 struct snd_soc_codec *codec, unsigned int reg)
304 case RT5640_PRIV_DATA:
306 case RT5640_EQ_CTRL1:
307 case RT5640_DRC_AGC_1:
308 case RT5640_ANC_CTRL1:
309 case RT5640_IRQ_CTRL2:
310 case RT5640_INT_IRQ_ST:
311 case RT5640_DSP_CTRL2:
312 case RT5640_DSP_CTRL3:
313 case RT5640_PGM_REG_ARR1:
314 case RT5640_PGM_REG_ARR3:
315 case RT5640_VENDOR_ID:
316 case RT5640_VENDOR_ID1:
317 case RT5640_VENDOR_ID2:
324 static int rt5640_readable_register(
325 struct snd_soc_codec *codec, unsigned int reg)
332 case RT5640_MONO_OUT:
335 case RT5640_INL_INR_VOL:
336 case RT5640_DAC1_DIG_VOL:
337 case RT5640_DAC2_DIG_VOL:
338 case RT5640_DAC2_CTRL:
339 case RT5640_ADC_DIG_VOL:
340 case RT5640_ADC_DATA:
341 case RT5640_ADC_BST_VOL:
342 case RT5640_STO_ADC_MIXER:
343 case RT5640_MONO_ADC_MIXER:
344 case RT5640_AD_DA_MIXER:
345 case RT5640_STO_DAC_MIXER:
346 case RT5640_MONO_DAC_MIXER:
347 case RT5640_DIG_MIXER:
348 case RT5640_DSP_PATH1:
349 case RT5640_DSP_PATH2:
350 case RT5640_DIG_INF_DATA:
351 case RT5640_REC_L1_MIXER:
352 case RT5640_REC_L2_MIXER:
353 case RT5640_REC_R1_MIXER:
354 case RT5640_REC_R2_MIXER:
355 case RT5640_HPO_MIXER:
356 case RT5640_SPK_L_MIXER:
357 case RT5640_SPK_R_MIXER:
358 case RT5640_SPO_L_MIXER:
359 case RT5640_SPO_R_MIXER:
360 case RT5640_SPO_CLSD_RATIO:
361 case RT5640_MONO_MIXER:
362 case RT5640_OUT_L1_MIXER:
363 case RT5640_OUT_L2_MIXER:
364 case RT5640_OUT_L3_MIXER:
365 case RT5640_OUT_R1_MIXER:
366 case RT5640_OUT_R2_MIXER:
367 case RT5640_OUT_R3_MIXER:
368 case RT5640_LOUT_MIXER:
369 case RT5640_PWR_DIG1:
370 case RT5640_PWR_DIG2:
371 case RT5640_PWR_ANLG1:
372 case RT5640_PWR_ANLG2:
373 case RT5640_PWR_MIXER:
375 case RT5640_PRIV_INDEX:
376 case RT5640_PRIV_DATA:
377 case RT5640_I2S1_SDP:
378 case RT5640_I2S2_SDP:
379 case RT5640_I2S3_SDP:
380 case RT5640_ADDA_CLK1:
381 case RT5640_ADDA_CLK2:
384 case RT5640_PLL_CTRL1:
385 case RT5640_PLL_CTRL2:
392 case RT5640_CLS_D_OVCD:
393 case RT5640_CLS_D_OUT:
394 case RT5640_DEPOP_M1:
395 case RT5640_DEPOP_M2:
396 case RT5640_DEPOP_M3:
397 case RT5640_CHARGE_PUMP:
398 case RT5640_PV_DET_SPK_G:
400 case RT5640_EQ_CTRL1:
401 case RT5640_EQ_CTRL2:
402 case RT5640_WIND_FILTER:
403 case RT5640_DRC_AGC_1:
404 case RT5640_DRC_AGC_2:
405 case RT5640_DRC_AGC_3:
407 case RT5640_ANC_CTRL1:
408 case RT5640_ANC_CTRL2:
409 case RT5640_ANC_CTRL3:
412 case RT5640_IRQ_CTRL1:
413 case RT5640_IRQ_CTRL2:
414 case RT5640_INT_IRQ_ST:
415 case RT5640_GPIO_CTRL1:
416 case RT5640_GPIO_CTRL2:
417 case RT5640_GPIO_CTRL3:
418 case RT5640_DSP_CTRL1:
419 case RT5640_DSP_CTRL2:
420 case RT5640_DSP_CTRL3:
421 case RT5640_DSP_CTRL4:
422 case RT5640_PGM_REG_ARR1:
423 case RT5640_PGM_REG_ARR2:
424 case RT5640_PGM_REG_ARR3:
425 case RT5640_PGM_REG_ARR4:
426 case RT5640_PGM_REG_ARR5:
427 case RT5640_SCB_FUNC:
428 case RT5640_SCB_CTRL:
429 case RT5640_BASE_BACK:
430 case RT5640_MP3_PLUS1:
431 case RT5640_MP3_PLUS2:
434 case RT5640_HP_CALIB_AMP_DET:
435 case RT5640_HP_CALIB2:
438 case RT5640_GEN_CTRL1:
439 case RT5640_GEN_CTRL2:
440 case RT5640_GEN_CTRL3:
441 case RT5640_VENDOR_ID:
442 case RT5640_VENDOR_ID1:
443 case RT5640_VENDOR_ID2:
444 case RT5640_DUMMY_PR3F:
451 static void DC_Calibrate(struct snd_soc_codec *codec)
453 unsigned int sclk_src;
455 sclk_src = snd_soc_read(codec, RT5640_GLB_CLK) &
456 RT5640_SCLK_SRC_MASK;
458 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
459 RT5640_PWR_MB1, RT5640_PWR_MB1);
460 snd_soc_update_bits(codec, RT5640_DEPOP_M2,
461 RT5640_DEPOP_MASK, RT5640_DEPOP_MAN);
462 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
463 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK | RT5640_HP_CB_MASK,
464 RT5640_HP_CP_PU | RT5640_HP_SG_DIS | RT5640_HP_CB_PU);
466 snd_soc_update_bits(codec, RT5640_GLB_CLK,
467 RT5640_SCLK_SRC_MASK, 0x2 << RT5640_SCLK_SRC_SFT);
469 rt5640_index_write(codec, RT5640_HP_DCC_INT1, 0x9f00);
470 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
472 snd_soc_update_bits(codec, RT5640_GLB_CLK,
473 RT5640_SCLK_SRC_MASK, sclk_src);
477 * rt5640_headset_detect - Detect headset.
478 * @codec: SoC audio codec device.
479 * @jack_insert: Jack insert or not.
481 * Detect whether is headset or not when jack inserted.
483 * Returns detect status.
485 int rt5640_headset_detect(struct snd_soc_codec *codec, int jack_insert)
492 reg63 = snd_soc_read(codec, RT5640_PWR_ANLG1);
493 reg64 = snd_soc_read(codec, RT5640_PWR_ANLG2);
494 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
495 snd_soc_write(codec, RT5640_PWR_ANLG1, 0xa814);
496 snd_soc_write(codec, RT5640_MICBIAS, 0x3830);
497 snd_soc_write(codec, RT5640_GEN_CTRL1 , 0x3701);
499 sclk_src = snd_soc_read(codec, RT5640_GLB_CLK) &
500 RT5640_SCLK_SRC_MASK;
501 snd_soc_update_bits(codec, RT5640_GLB_CLK,
502 RT5640_SCLK_SRC_MASK, 0x3 << RT5640_SCLK_SRC_SFT);
503 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
504 RT5640_PWR_LDO2, RT5640_PWR_LDO2);
505 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
506 RT5640_PWR_MB1, RT5640_PWR_MB1);
507 snd_soc_update_bits(codec, RT5640_MICBIAS,
508 RT5640_MIC1_OVCD_MASK | RT5640_MIC1_OVTH_MASK |
509 RT5640_PWR_CLK25M_MASK | RT5640_PWR_MB_MASK,
510 RT5640_MIC1_OVCD_EN | RT5640_MIC1_OVTH_600UA |
511 RT5640_PWR_MB_PU | RT5640_PWR_CLK25M_PU);
512 snd_soc_update_bits(codec, RT5640_GEN_CTRL1,
515 if (snd_soc_read(codec, RT5640_IRQ_CTRL2) & 0x8)
516 jack_type = RT5640_HEADPHO_DET;
518 jack_type = RT5640_HEADSET_DET;
519 snd_soc_update_bits(codec, RT5640_IRQ_CTRL2,
520 RT5640_MB1_OC_CLR, 0);
521 snd_soc_update_bits(codec, RT5640_GLB_CLK,
522 RT5640_SCLK_SRC_MASK, sclk_src);
523 snd_soc_write(codec, RT5640_PWR_ANLG1, reg63);
524 snd_soc_write(codec, RT5640_PWR_ANLG2, reg64);
526 snd_soc_update_bits(codec, RT5640_MICBIAS,
527 RT5640_MIC1_OVCD_MASK,
528 RT5640_MIC1_OVCD_DIS);
530 jack_type = RT5640_NO_JACK;
535 EXPORT_SYMBOL(rt5640_headset_detect);
537 int rt5640_mic_switch(struct snd_soc_codec *codec, int hp_type)
541 snd_soc_update_bits(codec, RT5640_REC_L2_MIXER,
542 RT5640_M_BST2_RM_L, 0);
543 snd_soc_update_bits(codec, RT5640_REC_R2_MIXER,
544 RT5640_M_BST2_RM_R, 0);
545 snd_soc_update_bits(codec, RT5640_REC_L2_MIXER,
546 RT5640_M_BST1_RM_L, 1);
547 snd_soc_update_bits(codec, RT5640_REC_R2_MIXER,
548 RT5640_M_BST1_RM_R, 1);
550 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
552 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
557 snd_soc_update_bits(codec, RT5640_REC_L2_MIXER,
558 RT5640_M_BST2_RM_L, 1);
559 snd_soc_update_bits(codec, RT5640_REC_R2_MIXER,
560 RT5640_M_BST2_RM_R, 1);
561 snd_soc_update_bits(codec, RT5640_REC_L2_MIXER,
562 RT5640_M_BST1_RM_L, 0);
563 snd_soc_update_bits(codec, RT5640_REC_R2_MIXER,
564 RT5640_M_BST1_RM_R, 0);
566 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
568 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
574 EXPORT_SYMBOL(rt5640_mic_switch);
576 * rt5640_conn_mux_path - connect MUX widget path.
577 * @codec: SoC audio codec device.
578 * @widget_name: widget name.
579 * @path_name: path name.
581 * Make MUX path connected and update register.
583 * Returns 0 for success or negative error code.
585 int rt5640_conn_mux_path(struct snd_soc_codec *codec,
586 char *widget_name, char *path_name)
588 struct snd_soc_dapm_context *dapm = &codec->dapm;
589 struct snd_soc_dapm_widget *w;
590 struct snd_soc_dapm_path *path;
591 struct snd_kcontrol_new *kcontrol;
593 unsigned int val, mask, bitmask;
596 if (codec == NULL || widget_name == NULL || path_name == NULL)
599 list_for_each_entry(w, &dapm->card->widgets, list)
601 if (!w->name || w->dapm != dapm)
603 if (!(strcmp(w->name, widget_name))) {
604 if (w->id != snd_soc_dapm_mux)
606 dev_info(codec->dev, "w->name=%s\n", w->name);
607 list_for_each_entry(path, &w->sources, list_sink)
609 if (!(strcmp(path->name, path_name)))
614 "path->name=%s path->connect=%d\n",
615 path->name, path->connect);
623 snd_soc_dapm_sync(dapm);
625 kcontrol = &w->kcontrols[0];
626 em = (struct soc_enum *)kcontrol->private_value;
627 for (i = 0; i < em->max; i++)
628 if (!(strcmp(path_name, em->texts[i])))
630 for (bitmask = 1; bitmask < em->max; bitmask <<= 1)
632 val = i << em->shift_l;
633 mask = (bitmask - 1) << em->shift_l;
634 snd_soc_update_bits(codec, em->reg, mask, val);
639 EXPORT_SYMBOL(rt5640_conn_mux_path);
641 static const char *rt5640_dacr2_src[] = { "TxDC_R", "TxDP_R" };
643 static const SOC_ENUM_SINGLE_DECL(rt5640_dacr2_enum,RT5640_DUMMY_PR3F,
644 14, rt5640_dacr2_src);
645 static const struct snd_kcontrol_new rt5640_dacr2_mux =
646 SOC_DAPM_ENUM("Mono dacr source", rt5640_dacr2_enum);
648 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
649 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
650 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
651 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
652 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
654 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
655 static unsigned int bst_tlv[] = {
656 TLV_DB_RANGE_HEAD(7),
657 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
658 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
659 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
660 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
661 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
662 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
663 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
666 static int rt5640_dmic_get(struct snd_kcontrol *kcontrol,
667 struct snd_ctl_elem_value *ucontrol)
669 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
670 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
672 ucontrol->value.integer.value[0] = rt5640->dmic_en;
677 static int rt5640_dmic_put(struct snd_kcontrol *kcontrol,
678 struct snd_ctl_elem_value *ucontrol)
680 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
681 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
683 if (rt5640->dmic_en == ucontrol->value.integer.value[0])
686 rt5640->dmic_en = ucontrol->value.integer.value[0];
687 switch (rt5640->dmic_en) {
688 case RT5640_DMIC_DIS:
689 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
690 RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK |
692 RT5640_GP2_PIN_GPIO2 | RT5640_GP3_PIN_GPIO3 |
693 RT5640_GP4_PIN_GPIO4);
694 snd_soc_update_bits(codec, RT5640_DMIC,
695 RT5640_DMIC_1_DP_MASK | RT5640_DMIC_2_DP_MASK,
696 RT5640_DMIC_1_DP_GPIO3 | RT5640_DMIC_2_DP_GPIO4);
697 snd_soc_update_bits(codec, RT5640_DMIC,
698 RT5640_DMIC_1_EN_MASK | RT5640_DMIC_2_EN_MASK,
699 RT5640_DMIC_1_DIS | RT5640_DMIC_2_DIS);
703 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
704 RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK,
705 RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP3_PIN_DMIC1_SDA);
706 snd_soc_update_bits(codec, RT5640_DMIC,
707 RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK |
708 RT5640_DMIC_1_DP_MASK,
709 RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING |
710 RT5640_DMIC_1_DP_IN1P);
711 snd_soc_update_bits(codec, RT5640_DMIC,
712 RT5640_DMIC_1_EN_MASK, RT5640_DMIC_1_EN);
716 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
717 RT5640_GP2_PIN_MASK | RT5640_GP4_PIN_MASK,
718 RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP4_PIN_DMIC2_SDA);
719 snd_soc_update_bits(codec, RT5640_DMIC,
720 RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK |
721 RT5640_DMIC_2_DP_MASK,
722 RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING |
723 RT5640_DMIC_2_DP_IN1N);
724 snd_soc_update_bits(codec, RT5640_DMIC,
725 RT5640_DMIC_2_EN_MASK, RT5640_DMIC_2_EN);
736 /* IN1/IN2 Input Type */
737 static const char *rt5640_input_mode[] = {
738 "Single ended", "Differential"};
740 static const SOC_ENUM_SINGLE_DECL(
741 rt5640_in1_mode_enum, RT5640_IN1_IN2,
742 RT5640_IN_SFT1, rt5640_input_mode);
744 static const SOC_ENUM_SINGLE_DECL(
745 rt5640_in2_mode_enum, RT5640_IN3_IN4,
746 RT5640_IN_SFT2, rt5640_input_mode);
748 /* Interface data select */
749 static const char *rt5640_data_select[] = {
750 "Normal", "Swap", "left copy to right", "right copy to left"};
752 static const SOC_ENUM_SINGLE_DECL(rt5640_if1_dac_enum, RT5640_DIG_INF_DATA,
753 RT5640_IF1_DAC_SEL_SFT, rt5640_data_select);
755 static const SOC_ENUM_SINGLE_DECL(rt5640_if1_adc_enum, RT5640_DIG_INF_DATA,
756 RT5640_IF1_ADC_SEL_SFT, rt5640_data_select);
758 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_dac_enum, RT5640_DIG_INF_DATA,
759 RT5640_IF2_DAC_SEL_SFT, rt5640_data_select);
761 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_enum, RT5640_DIG_INF_DATA,
762 RT5640_IF2_ADC_SEL_SFT, rt5640_data_select);
764 static const SOC_ENUM_SINGLE_DECL(rt5640_if3_dac_enum, RT5640_DIG_INF_DATA,
765 RT5640_IF3_DAC_SEL_SFT, rt5640_data_select);
767 static const SOC_ENUM_SINGLE_DECL(rt5640_if3_adc_enum, RT5640_DIG_INF_DATA,
768 RT5640_IF3_ADC_SEL_SFT, rt5640_data_select);
770 /* Class D speaker gain ratio */
771 static const char *rt5640_clsd_spk_ratio[] = {"1.66x", "1.83x", "1.94x", "2x",
772 "2.11x", "2.22x", "2.33x", "2.44x", "2.55x", "2.66x", "2.77x"};
774 static const SOC_ENUM_SINGLE_DECL(
775 rt5640_clsd_spk_ratio_enum, RT5640_CLS_D_OUT,
776 RT5640_CLSD_RATIO_SFT, rt5640_clsd_spk_ratio);
779 static const char *rt5640_dmic_mode[] = {"Disable", "DMIC1", "DMIC2"};
781 static const SOC_ENUM_SINGLE_DECL(rt5640_dmic_enum, 0, 0, rt5640_dmic_mode);
786 #define REGVAL_MAX 0xffff
787 static unsigned int regctl_addr;
788 static int rt5640_regctl_info(struct snd_kcontrol *kcontrol,
789 struct snd_ctl_elem_info *uinfo)
791 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
793 uinfo->value.integer.min = 0;
794 uinfo->value.integer.max = REGVAL_MAX;
798 static int rt5640_regctl_get(struct snd_kcontrol *kcontrol,
799 struct snd_ctl_elem_value *ucontrol)
801 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
802 ucontrol->value.integer.value[0] = regctl_addr;
803 ucontrol->value.integer.value[1] = snd_soc_read(codec, regctl_addr);
807 static int rt5640_regctl_put(struct snd_kcontrol *kcontrol,
808 struct snd_ctl_elem_value *ucontrol)
810 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
811 regctl_addr = ucontrol->value.integer.value[0];
812 if(ucontrol->value.integer.value[1] <= REGVAL_MAX)
813 snd_soc_write(codec, regctl_addr, ucontrol->value.integer.value[1]);
819 static int rt5640_vol_rescale_get(struct snd_kcontrol *kcontrol,
820 struct snd_ctl_elem_value *ucontrol)
822 struct soc_mixer_control *mc =
823 (struct soc_mixer_control *)kcontrol->private_value;
824 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
825 unsigned int val = snd_soc_read(codec, mc->reg);
827 ucontrol->value.integer.value[0] = RT5640_VOL_RSCL_MAX -
828 ((val & RT5640_L_VOL_MASK) >> mc->shift);
829 ucontrol->value.integer.value[1] = RT5640_VOL_RSCL_MAX -
830 (val & RT5640_R_VOL_MASK);
835 static int rt5640_vol_rescale_put(struct snd_kcontrol *kcontrol,
836 struct snd_ctl_elem_value *ucontrol)
838 struct soc_mixer_control *mc =
839 (struct soc_mixer_control *)kcontrol->private_value;
840 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
841 unsigned int val, val2;
843 val = RT5640_VOL_RSCL_MAX - ucontrol->value.integer.value[0];
844 val2 = RT5640_VOL_RSCL_MAX - ucontrol->value.integer.value[1];
845 return snd_soc_update_bits_locked(codec, mc->reg, RT5640_L_VOL_MASK |
846 RT5640_R_VOL_MASK, val << mc->shift | val2);
850 static const struct snd_kcontrol_new rt5640_snd_controls[] = {
851 /* Speaker Output Volume */
852 SOC_DOUBLE("Speaker Playback Switch", RT5640_SPK_VOL,
853 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
854 SOC_DOUBLE_EXT_TLV("Speaker Playback Volume", RT5640_SPK_VOL,
855 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, RT5640_VOL_RSCL_RANGE, 0,
856 rt5640_vol_rescale_get, rt5640_vol_rescale_put, out_vol_tlv),
857 /* Headphone Output Volume */
858 SOC_DOUBLE("HP Playback Switch", RT5640_HP_VOL,
859 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
860 SOC_DOUBLE_EXT_TLV("HP Playback Volume", RT5640_HP_VOL,
861 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, RT5640_VOL_RSCL_RANGE, 0,
862 rt5640_vol_rescale_get, rt5640_vol_rescale_put, out_vol_tlv),
864 SOC_DOUBLE("OUT Playback Switch", RT5640_OUTPUT,
865 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
866 SOC_DOUBLE("OUT Channel Switch", RT5640_OUTPUT,
867 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
868 SOC_DOUBLE_TLV("OUT Playback Volume", RT5640_OUTPUT,
869 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
870 /* MONO Output Control */
871 SOC_SINGLE("Mono Playback Switch", RT5640_MONO_OUT,
872 RT5640_L_MUTE_SFT, 1, 1),
873 /* DAC Digital Volume */
874 SOC_DOUBLE("DAC2 Playback Switch", RT5640_DAC2_CTRL,
875 RT5640_M_DAC_L2_VOL_SFT, RT5640_M_DAC_R2_VOL_SFT, 1, 1),
876 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5640_DAC1_DIG_VOL,
877 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
878 175, 0, dac_vol_tlv),
879 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5640_DAC2_DIG_VOL,
880 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
881 175, 0, dac_vol_tlv),
882 /* IN1/IN2 Control */
883 SOC_ENUM("IN1 Mode Control", rt5640_in1_mode_enum),
884 SOC_SINGLE_TLV("IN1 Boost", RT5640_IN1_IN2,
885 RT5640_BST_SFT1, 8, 0, bst_tlv),
886 SOC_ENUM("IN2 Mode Control", rt5640_in2_mode_enum),
887 SOC_SINGLE_TLV("IN2 Boost", RT5640_IN3_IN4,
888 RT5640_BST_SFT2, 8, 0, bst_tlv),
889 /* INL/INR Volume Control */
890 SOC_DOUBLE_TLV("IN Capture Volume", RT5640_INL_INR_VOL,
891 RT5640_INL_VOL_SFT, RT5640_INR_VOL_SFT,
893 /* ADC Digital Volume Control */
894 SOC_DOUBLE("ADC Capture Switch", RT5640_ADC_DIG_VOL,
895 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
896 SOC_DOUBLE_TLV("ADC Capture Volume", RT5640_ADC_DIG_VOL,
897 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
898 127, 0, adc_vol_tlv),
899 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5640_ADC_DATA,
900 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
901 127, 0, adc_vol_tlv),
902 /* ADC Boost Volume Control */
903 SOC_DOUBLE_TLV("ADC Boost Gain", RT5640_ADC_BST_VOL,
904 RT5640_ADC_L_BST_SFT, RT5640_ADC_R_BST_SFT,
906 /* Class D speaker gain ratio */
907 SOC_ENUM("Class D SPK Ratio Control", rt5640_clsd_spk_ratio_enum),
909 SOC_ENUM_EXT("DMIC Switch", rt5640_dmic_enum,
910 rt5640_dmic_get, rt5640_dmic_put),
912 SOC_ENUM("ADC IF1 Data Switch", rt5640_if1_adc_enum),
913 SOC_ENUM("DAC IF1 Data Switch", rt5640_if1_dac_enum),
914 SOC_ENUM("ADC IF2 Data Switch", rt5640_if2_adc_enum),
915 SOC_ENUM("DAC IF2 Data Switch", rt5640_if2_dac_enum),
918 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
919 .name = "Register Control",
920 .info = rt5640_regctl_info,
921 .get = rt5640_regctl_get,
922 .put = rt5640_regctl_put,
928 * set_dmic_clk - Set parameter of dmic.
931 * @kcontrol: The kcontrol of this widget.
934 * Choose dmic clock between 1MHz and 3MHz.
935 * It is better for clock to approximate 3MHz.
937 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
938 struct snd_kcontrol *kcontrol, int event)
940 struct snd_soc_codec *codec = w->codec;
941 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
942 int div[] = {2, 3, 4, 6, 12}, idx = -EINVAL, i, rate, red, bound, temp;
944 rate = rt5640->lrck[rt5640->aif_pu] << 8;
946 for (i = 0; i < ARRAY_SIZE(div); i++) {
947 bound = div[i] * 3000000;
957 dev_err(codec->dev, "Failed to set DMIC clock\n");
959 snd_soc_update_bits(codec, RT5640_DMIC, RT5640_DMIC_CLK_MASK,
960 idx << RT5640_DMIC_CLK_SFT);
964 static int check_sysclk1_source(struct snd_soc_dapm_widget *source,
965 struct snd_soc_dapm_widget *sink)
969 val = snd_soc_read(source->codec, RT5640_GLB_CLK);
970 val &= RT5640_SCLK_SRC_MASK;
971 if (val == RT5640_SCLK_SRC_PLL1)
978 static const struct snd_kcontrol_new rt5640_sto_adc_l_mix[] = {
979 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
980 RT5640_M_ADC_L1_SFT, 1, 1),
981 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
982 RT5640_M_ADC_L2_SFT, 1, 1),
985 static const struct snd_kcontrol_new rt5640_sto_adc_r_mix[] = {
986 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
987 RT5640_M_ADC_R1_SFT, 1, 1),
988 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
989 RT5640_M_ADC_R2_SFT, 1, 1),
992 static const struct snd_kcontrol_new rt5640_mono_adc_l_mix[] = {
993 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
994 RT5640_M_MONO_ADC_L1_SFT, 1, 1),
995 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
996 RT5640_M_MONO_ADC_L2_SFT, 1, 1),
999 static const struct snd_kcontrol_new rt5640_mono_adc_r_mix[] = {
1000 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
1001 RT5640_M_MONO_ADC_R1_SFT, 1, 1),
1002 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
1003 RT5640_M_MONO_ADC_R2_SFT, 1, 1),
1006 static const struct snd_kcontrol_new rt5640_dac_l_mix[] = {
1007 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
1008 RT5640_M_ADCMIX_L_SFT, 1, 1),
1009 SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
1010 RT5640_M_IF1_DAC_L_SFT, 1, 1),
1013 static const struct snd_kcontrol_new rt5640_dac_r_mix[] = {
1014 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
1015 RT5640_M_ADCMIX_R_SFT, 1, 1),
1016 SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
1017 RT5640_M_IF1_DAC_R_SFT, 1, 1),
1020 static const struct snd_kcontrol_new rt5640_sto_dac_l_mix[] = {
1021 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,
1022 RT5640_M_DAC_L1_SFT, 1, 1),
1023 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,
1024 RT5640_M_DAC_L2_SFT, 1, 1),
1025 SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
1026 RT5640_M_ANC_DAC_L_SFT, 1, 1),
1029 static const struct snd_kcontrol_new rt5640_sto_dac_r_mix[] = {
1030 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,
1031 RT5640_M_DAC_R1_SFT, 1, 1),
1032 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,
1033 RT5640_M_DAC_R2_SFT, 1, 1),
1034 SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
1035 RT5640_M_ANC_DAC_R_SFT, 1, 1),
1038 static const struct snd_kcontrol_new rt5640_mono_dac_l_mix[] = {
1039 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_MONO_DAC_MIXER,
1040 RT5640_M_DAC_L1_MONO_L_SFT, 1, 1),
1041 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
1042 RT5640_M_DAC_L2_MONO_L_SFT, 1, 1),
1043 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
1044 RT5640_M_DAC_R2_MONO_L_SFT, 1, 1),
1047 static const struct snd_kcontrol_new rt5640_mono_dac_r_mix[] = {
1048 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_MONO_DAC_MIXER,
1049 RT5640_M_DAC_R1_MONO_R_SFT, 1, 1),
1050 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
1051 RT5640_M_DAC_R2_MONO_R_SFT, 1, 1),
1052 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
1053 RT5640_M_DAC_L2_MONO_R_SFT, 1, 1),
1056 static const struct snd_kcontrol_new rt5640_dig_l_mix[] = {
1057 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_DIG_MIXER,
1058 RT5640_M_STO_L_DAC_L_SFT, 1, 1),
1059 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_DIG_MIXER,
1060 RT5640_M_DAC_L2_DAC_L_SFT, 1, 1),
1063 static const struct snd_kcontrol_new rt5640_dig_r_mix[] = {
1064 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_DIG_MIXER,
1065 RT5640_M_STO_R_DAC_R_SFT, 1, 1),
1066 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_DIG_MIXER,
1067 RT5640_M_DAC_R2_DAC_R_SFT, 1, 1),
1070 /* Analog Input Mixer */
1071 static const struct snd_kcontrol_new rt5640_rec_l_mix[] = {
1072 SOC_DAPM_SINGLE("HPOL Switch", RT5640_REC_L2_MIXER,
1073 RT5640_M_HP_L_RM_L_SFT, 1, 1),
1074 SOC_DAPM_SINGLE("INL Switch", RT5640_REC_L2_MIXER,
1075 RT5640_M_IN_L_RM_L_SFT, 1, 1),
1076 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) || defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
1077 SOC_DAPM_SINGLE("BST4 Switch", RT5640_REC_L2_MIXER,
1078 RT5640_M_BST4_RM_L_SFT, 1, 1),
1079 SOC_DAPM_SINGLE("BST3 Switch", RT5640_REC_L2_MIXER,
1080 RT5640_M_BST3_RM_L_SFT, 1, 1),
1081 SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_L2_MIXER,
1082 RT5640_M_BST2_RM_L_SFT, 1, 1),
1084 SOC_DAPM_SINGLE("BST3 Switch", RT5640_REC_L2_MIXER,
1085 RT5640_M_BST2_RM_L_SFT, 1, 1),
1086 SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_L2_MIXER,
1087 RT5640_M_BST4_RM_L_SFT, 1, 1),
1089 SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_L2_MIXER,
1090 RT5640_M_BST1_RM_L_SFT, 1, 1),
1091 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_REC_L2_MIXER,
1092 RT5640_M_OM_L_RM_L_SFT, 1, 1),
1095 static const struct snd_kcontrol_new rt5640_rec_r_mix[] = {
1096 SOC_DAPM_SINGLE("HPOR Switch", RT5640_REC_R2_MIXER,
1097 RT5640_M_HP_R_RM_R_SFT, 1, 1),
1098 SOC_DAPM_SINGLE("INR Switch", RT5640_REC_R2_MIXER,
1099 RT5640_M_IN_R_RM_R_SFT, 1, 1),
1100 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) \
1101 || defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
1102 SOC_DAPM_SINGLE("BST4 Switch", RT5640_REC_R2_MIXER,
1103 RT5640_M_BST4_RM_R_SFT, 1, 1),
1104 SOC_DAPM_SINGLE("BST3 Switch", RT5640_REC_R2_MIXER,
1105 RT5640_M_BST3_RM_R_SFT, 1, 1),
1106 SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_R2_MIXER,
1107 RT5640_M_BST2_RM_R_SFT, 1, 1),
1109 SOC_DAPM_SINGLE("BST3 Switch", RT5640_REC_R2_MIXER,
1110 RT5640_M_BST2_RM_R_SFT, 1, 1),
1111 SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_R2_MIXER,
1112 RT5640_M_BST4_RM_R_SFT, 1, 1),
1114 SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_R2_MIXER,
1115 RT5640_M_BST1_RM_R_SFT, 1, 1),
1116 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_REC_R2_MIXER,
1117 RT5640_M_OM_R_RM_R_SFT, 1, 1),
1120 /* Analog Output Mixer */
1121 static const struct snd_kcontrol_new rt5640_spk_l_mix[] = {
1122 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_SPK_L_MIXER,
1123 RT5640_M_RM_L_SM_L_SFT, 1, 1),
1124 SOC_DAPM_SINGLE("INL Switch", RT5640_SPK_L_MIXER,
1125 RT5640_M_IN_L_SM_L_SFT, 1, 1),
1126 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPK_L_MIXER,
1127 RT5640_M_DAC_L1_SM_L_SFT, 1, 1),
1128 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_SPK_L_MIXER,
1129 RT5640_M_DAC_L2_SM_L_SFT, 1, 1),
1130 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_SPK_L_MIXER,
1131 RT5640_M_OM_L_SM_L_SFT, 1, 1),
1134 static const struct snd_kcontrol_new rt5640_spk_r_mix[] = {
1135 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_SPK_R_MIXER,
1136 RT5640_M_RM_R_SM_R_SFT, 1, 1),
1137 SOC_DAPM_SINGLE("INR Switch", RT5640_SPK_R_MIXER,
1138 RT5640_M_IN_R_SM_R_SFT, 1, 1),
1139 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPK_R_MIXER,
1140 RT5640_M_DAC_R1_SM_R_SFT, 1, 1),
1141 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_SPK_R_MIXER,
1142 RT5640_M_DAC_R2_SM_R_SFT, 1, 1),
1143 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_SPK_R_MIXER,
1144 RT5640_M_OM_R_SM_R_SFT, 1, 1),
1147 static const struct snd_kcontrol_new rt5640_out_l_mix[] = {
1148 SOC_DAPM_SINGLE("SPK MIXL Switch", RT5640_OUT_L3_MIXER,
1149 RT5640_M_SM_L_OM_L_SFT, 1, 1),
1150 SOC_DAPM_SINGLE("BST3 Switch", RT5640_OUT_L3_MIXER,
1151 RT5640_M_BST2_OM_L_SFT, 1, 1),
1152 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,
1153 RT5640_M_BST1_OM_L_SFT, 1, 1),
1154 SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,
1155 RT5640_M_IN_L_OM_L_SFT, 1, 1),
1156 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,
1157 RT5640_M_RM_L_OM_L_SFT, 1, 1),
1158 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_L3_MIXER,
1159 RT5640_M_DAC_R2_OM_L_SFT, 1, 1),
1160 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_L3_MIXER,
1161 RT5640_M_DAC_L2_OM_L_SFT, 1, 1),
1162 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,
1163 RT5640_M_DAC_L1_OM_L_SFT, 1, 1),
1166 static const struct snd_kcontrol_new rt5640_out_r_mix[] = {
1167 SOC_DAPM_SINGLE("SPK MIXR Switch", RT5640_OUT_R3_MIXER,
1168 RT5640_M_SM_L_OM_R_SFT, 1, 1),
1169 SOC_DAPM_SINGLE("BST3 Switch", RT5640_OUT_R3_MIXER,
1170 RT5640_M_BST2_OM_R_SFT, 1, 1),
1171 SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,
1172 RT5640_M_BST4_OM_R_SFT, 1, 1),
1173 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,
1174 RT5640_M_BST1_OM_R_SFT, 1, 1),
1175 SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,
1176 RT5640_M_IN_R_OM_R_SFT, 1, 1),
1177 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,
1178 RT5640_M_RM_R_OM_R_SFT, 1, 1),
1179 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_R3_MIXER,
1180 RT5640_M_DAC_L2_OM_R_SFT, 1, 1),
1181 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_R3_MIXER,
1182 RT5640_M_DAC_R2_OM_R_SFT, 1, 1),
1183 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,
1184 RT5640_M_DAC_R1_OM_R_SFT, 1, 1),
1187 static const struct snd_kcontrol_new rt5640_spo_l_mix[] = {
1188 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_L_MIXER,
1189 RT5640_M_DAC_R1_SPM_L_SFT, 1, 1),
1190 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPO_L_MIXER,
1191 RT5640_M_DAC_L1_SPM_L_SFT, 1, 1),
1192 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_L_MIXER,
1193 RT5640_M_SV_R_SPM_L_SFT, 1, 1),
1194 SOC_DAPM_SINGLE("SPKVOL L Switch", RT5640_SPO_L_MIXER,
1195 RT5640_M_SV_L_SPM_L_SFT, 1, 1),
1196 SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_L_MIXER,
1197 RT5640_M_BST1_SPM_L_SFT, 1, 1),
1200 static const struct snd_kcontrol_new rt5640_spo_r_mix[] = {
1201 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_R_MIXER,
1202 RT5640_M_DAC_R1_SPM_R_SFT, 1, 1),
1203 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_R_MIXER,
1204 RT5640_M_SV_R_SPM_R_SFT, 1, 1),
1205 SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_R_MIXER,
1206 RT5640_M_BST1_SPM_R_SFT, 1, 1),
1209 static const struct snd_kcontrol_new rt5640_hpo_mix[] = {
1210 SOC_DAPM_SINGLE("DAC2 Switch", RT5640_HPO_MIXER,
1211 RT5640_M_DAC2_HM_SFT, 1, 1),
1212 SOC_DAPM_SINGLE("DAC1 Switch", RT5640_HPO_MIXER,
1213 RT5640_M_DAC1_HM_SFT, 1, 1),
1214 SOC_DAPM_SINGLE("HPVOL Switch", RT5640_HPO_MIXER,
1215 RT5640_M_HPVOL_HM_SFT, 1, 1),
1218 static const struct snd_kcontrol_new rt5640_lout_mix[] = {
1219 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_LOUT_MIXER,
1220 RT5640_M_DAC_L1_LM_SFT, 1, 1),
1221 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_LOUT_MIXER,
1222 RT5640_M_DAC_R1_LM_SFT, 1, 1),
1223 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_LOUT_MIXER,
1224 RT5640_M_OV_L_LM_SFT, 1, 1),
1225 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_LOUT_MIXER,
1226 RT5640_M_OV_R_LM_SFT, 1, 1),
1229 static const struct snd_kcontrol_new rt5640_mono_mix[] = {
1230 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_MIXER,
1231 RT5640_M_DAC_R2_MM_SFT, 1, 1),
1232 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_MIXER,
1233 RT5640_M_DAC_L2_MM_SFT, 1, 1),
1234 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_MONO_MIXER,
1235 RT5640_M_OV_R_MM_SFT, 1, 1),
1236 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_MONO_MIXER,
1237 RT5640_M_OV_L_MM_SFT, 1, 1),
1238 SOC_DAPM_SINGLE("BST1 Switch", RT5640_MONO_MIXER,
1239 RT5640_M_BST1_MM_SFT, 1, 1),
1243 static const char *rt5640_inl_src[] = {"IN2P", "MonoP"};
1245 static const SOC_ENUM_SINGLE_DECL(
1246 rt5640_inl_enum, RT5640_INL_INR_VOL,
1247 RT5640_INL_SEL_SFT, rt5640_inl_src);
1249 static const struct snd_kcontrol_new rt5640_inl_mux =
1250 SOC_DAPM_ENUM("INL source", rt5640_inl_enum);
1252 static const char *rt5640_inr_src[] = {"IN2N", "MonoN"};
1254 static const SOC_ENUM_SINGLE_DECL(
1255 rt5640_inr_enum, RT5640_INL_INR_VOL,
1256 RT5640_INR_SEL_SFT, rt5640_inr_src);
1258 static const struct snd_kcontrol_new rt5640_inr_mux =
1259 SOC_DAPM_ENUM("INR source", rt5640_inr_enum);
1261 /* Stereo ADC source */
1262 static const char *rt5640_stereo_adc1_src[] = {"DIG MIX", "ADC"};
1264 static const SOC_ENUM_SINGLE_DECL(
1265 rt5640_stereo_adc1_enum, RT5640_STO_ADC_MIXER,
1266 RT5640_ADC_1_SRC_SFT, rt5640_stereo_adc1_src);
1268 static const struct snd_kcontrol_new rt5640_sto_adc_l1_mux =
1269 SOC_DAPM_ENUM("Stereo ADC L1 source", rt5640_stereo_adc1_enum);
1271 static const struct snd_kcontrol_new rt5640_sto_adc_r1_mux =
1272 SOC_DAPM_ENUM("Stereo ADC R1 source", rt5640_stereo_adc1_enum);
1274 static const char *rt5640_stereo_adc2_src[] = {"DMIC1", "DMIC2", "DIG MIX"};
1276 static const SOC_ENUM_SINGLE_DECL(
1277 rt5640_stereo_adc2_enum, RT5640_STO_ADC_MIXER,
1278 RT5640_ADC_2_SRC_SFT, rt5640_stereo_adc2_src);
1280 static const struct snd_kcontrol_new rt5640_sto_adc_l2_mux =
1281 SOC_DAPM_ENUM("Stereo ADC L2 source", rt5640_stereo_adc2_enum);
1283 static const struct snd_kcontrol_new rt5640_sto_adc_r2_mux =
1284 SOC_DAPM_ENUM("Stereo ADC R2 source", rt5640_stereo_adc2_enum);
1286 /* Mono ADC source */
1287 static const char *rt5640_mono_adc_l1_src[] = {"Mono DAC MIXL", "ADCL"};
1289 static const SOC_ENUM_SINGLE_DECL(
1290 rt5640_mono_adc_l1_enum, RT5640_MONO_ADC_MIXER,
1291 RT5640_MONO_ADC_L1_SRC_SFT, rt5640_mono_adc_l1_src);
1293 static const struct snd_kcontrol_new rt5640_mono_adc_l1_mux =
1294 SOC_DAPM_ENUM("Mono ADC1 left source", rt5640_mono_adc_l1_enum);
1296 static const char *rt5640_mono_adc_l2_src[] =
1297 {"DMIC L1", "DMIC L2", "Mono DAC MIXL"};
1299 static const SOC_ENUM_SINGLE_DECL(
1300 rt5640_mono_adc_l2_enum, RT5640_MONO_ADC_MIXER,
1301 RT5640_MONO_ADC_L2_SRC_SFT, rt5640_mono_adc_l2_src);
1303 static const struct snd_kcontrol_new rt5640_mono_adc_l2_mux =
1304 SOC_DAPM_ENUM("Mono ADC2 left source", rt5640_mono_adc_l2_enum);
1306 static const char *rt5640_mono_adc_r1_src[] = {"Mono DAC MIXR", "ADCR"};
1308 static const SOC_ENUM_SINGLE_DECL(
1309 rt5640_mono_adc_r1_enum, RT5640_MONO_ADC_MIXER,
1310 RT5640_MONO_ADC_R1_SRC_SFT, rt5640_mono_adc_r1_src);
1312 static const struct snd_kcontrol_new rt5640_mono_adc_r1_mux =
1313 SOC_DAPM_ENUM("Mono ADC1 right source", rt5640_mono_adc_r1_enum);
1315 static const char *rt5640_mono_adc_r2_src[] =
1316 {"DMIC R1", "DMIC R2", "Mono DAC MIXR"};
1318 static const SOC_ENUM_SINGLE_DECL(
1319 rt5640_mono_adc_r2_enum, RT5640_MONO_ADC_MIXER,
1320 RT5640_MONO_ADC_R2_SRC_SFT, rt5640_mono_adc_r2_src);
1322 static const struct snd_kcontrol_new rt5640_mono_adc_r2_mux =
1323 SOC_DAPM_ENUM("Mono ADC2 right source", rt5640_mono_adc_r2_enum);
1325 /* DAC2 channel source */
1326 static const char *rt5640_dac_l2_src[] = {"IF2", "IF3", "TxDC", "Base L/R"};
1328 static const SOC_ENUM_SINGLE_DECL(rt5640_dac_l2_enum, RT5640_DSP_PATH2,
1329 RT5640_DAC_L2_SEL_SFT, rt5640_dac_l2_src);
1331 static const struct snd_kcontrol_new rt5640_dac_l2_mux =
1332 SOC_DAPM_ENUM("DAC2 left channel source", rt5640_dac_l2_enum);
1334 static const char *rt5640_dac_r2_src[] = {"IF2", "IF3", "TxDC"};
1336 static const SOC_ENUM_SINGLE_DECL(
1337 rt5640_dac_r2_enum, RT5640_DSP_PATH2,
1338 RT5640_DAC_R2_SEL_SFT, rt5640_dac_r2_src);
1340 static const struct snd_kcontrol_new rt5640_dac_r2_mux =
1341 SOC_DAPM_ENUM("DAC2 right channel source", rt5640_dac_r2_enum);
1343 /* Interface 2 ADC channel source */
1344 static const char *rt5640_if2_adc_l_src[] = {"TxDP", "Mono ADC MIXL"};
1346 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_l_enum, RT5640_DSP_PATH2,
1347 RT5640_IF2_ADC_L_SEL_SFT, rt5640_if2_adc_l_src);
1349 static const struct snd_kcontrol_new rt5640_if2_adc_l_mux =
1350 SOC_DAPM_ENUM("IF2 ADC left channel source", rt5640_if2_adc_l_enum);
1352 static const char *rt5640_if2_adc_r_src[] = {"TxDP", "Mono ADC MIXR"};
1354 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_r_enum, RT5640_DSP_PATH2,
1355 RT5640_IF2_ADC_R_SEL_SFT, rt5640_if2_adc_r_src);
1357 static const struct snd_kcontrol_new rt5640_if2_adc_r_mux =
1358 SOC_DAPM_ENUM("IF2 ADC right channel source", rt5640_if2_adc_r_enum);
1360 /* digital interface and iis interface map */
1361 static const char *rt5640_dai_iis_map[] = {"1:1|2:2|3:3", "1:1|2:3|3:2",
1362 "1:3|2:1|3:2", "1:3|2:2|3:1", "1:2|2:3|3:1",
1363 "1:2|2:1|3:3", "1:1|2:1|3:3", "1:2|2:2|3:3"};
1365 static const SOC_ENUM_SINGLE_DECL(
1366 rt5640_dai_iis_map_enum, RT5640_I2S1_SDP,
1367 RT5640_I2S_IF_SFT, rt5640_dai_iis_map);
1369 static const struct snd_kcontrol_new rt5640_dai_mux =
1370 SOC_DAPM_ENUM("DAI select", rt5640_dai_iis_map_enum);
1373 static const char *rt5640_sdi_sel[] = {"IF1", "IF2"};
1375 static const SOC_ENUM_SINGLE_DECL(
1376 rt5640_sdi_sel_enum, RT5640_I2S2_SDP,
1377 RT5640_I2S2_SDI_SFT, rt5640_sdi_sel);
1379 static const struct snd_kcontrol_new rt5640_sdi_mux =
1380 SOC_DAPM_ENUM("SDI select", rt5640_sdi_sel_enum);
1382 static int rt5640_adc_event(struct snd_soc_dapm_widget *w,
1383 struct snd_kcontrol *kcontrol, int event)
1385 struct snd_soc_codec *codec = w->codec;
1386 // unsigned int val, mask;
1389 case SND_SOC_DAPM_POST_PMU:
1390 rt5640_index_update_bits(codec,
1391 RT5640_CHOP_DAC_ADC, 0x1000, 0x1000);
1394 case SND_SOC_DAPM_POST_PMD:
1395 rt5640_index_update_bits(codec,
1396 RT5640_CHOP_DAC_ADC, 0x1000, 0x0000);
1406 static int rt5640_mono_adcl_event(struct snd_soc_dapm_widget *w,
1407 struct snd_kcontrol *kcontrol, int event)
1409 struct snd_soc_codec *codec = w->codec;
1410 // unsigned int val, mask;
1413 case SND_SOC_DAPM_POST_PMU:
1414 snd_soc_update_bits(codec, RT5640_GEN_CTRL1,
1415 RT5640_M_MAMIX_L, 0);
1417 case SND_SOC_DAPM_PRE_PMD:
1418 snd_soc_update_bits(codec, RT5640_GEN_CTRL1,
1430 static int rt5640_mono_adcr_event(struct snd_soc_dapm_widget *w,
1431 struct snd_kcontrol *kcontrol, int event)
1433 struct snd_soc_codec *codec = w->codec;
1434 // unsigned int val, mask;
1437 case SND_SOC_DAPM_POST_PMU:
1438 snd_soc_update_bits(codec, RT5640_GEN_CTRL1,
1439 RT5640_M_MAMIX_R, 0);
1441 case SND_SOC_DAPM_PRE_PMD:
1442 snd_soc_update_bits(codec, RT5640_GEN_CTRL1,
1454 static int rt5640_spk_event(struct snd_soc_dapm_widget *w,
1455 struct snd_kcontrol *kcontrol, int event)
1457 struct snd_soc_codec *codec = w->codec;
1460 case SND_SOC_DAPM_POST_PMU:
1462 rt5640_update_eqmode(codec,SPK);
1464 snd_soc_update_bits(codec, RT5640_PWR_DIG1,
1465 RT5640_PWR_CLS_D, RT5640_PWR_CLS_D);
1466 rt5640_index_update_bits(codec,
1467 RT5640_CLSD_INT_REG1, 0xf000, 0xf000);
1468 snd_soc_update_bits(codec, RT5640_SPK_VOL,
1469 RT5640_L_MUTE | RT5640_R_MUTE, 0);
1472 case SND_SOC_DAPM_PRE_PMD:
1473 snd_soc_update_bits(codec, RT5640_SPK_VOL,
1474 RT5640_L_MUTE | RT5640_R_MUTE,
1475 RT5640_L_MUTE | RT5640_R_MUTE);
1476 rt5640_index_update_bits(codec,
1477 RT5640_CLSD_INT_REG1, 0xf000, 0x0000);
1478 snd_soc_update_bits(codec, RT5640_PWR_DIG1,
1479 RT5640_PWR_CLS_D, 0);
1489 static int rt5640_set_dmic1_event(struct snd_soc_dapm_widget *w,
1490 struct snd_kcontrol *kcontrol, int event)
1492 struct snd_soc_codec *codec = w->codec;
1493 // unsigned int val, mask;
1496 case SND_SOC_DAPM_PRE_PMU:
1497 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
1498 RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK,
1499 RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP3_PIN_DMIC1_SDA);
1500 snd_soc_update_bits(codec, RT5640_DMIC,
1501 RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK |
1502 RT5640_DMIC_1_DP_MASK,
1503 RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING |
1504 RT5640_DMIC_1_DP_IN1P);
1505 snd_soc_update_bits(codec, RT5640_DMIC,
1506 RT5640_DMIC_1_EN_MASK, RT5640_DMIC_1_EN);
1514 static int rt5640_set_dmic2_event(struct snd_soc_dapm_widget *w,
1515 struct snd_kcontrol *kcontrol, int event)
1517 struct snd_soc_codec *codec = w->codec;
1518 // unsigned int val, mask;
1521 case SND_SOC_DAPM_PRE_PMU:
1522 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
1523 RT5640_GP2_PIN_MASK | RT5640_GP4_PIN_MASK,
1524 RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP4_PIN_DMIC2_SDA);
1525 snd_soc_update_bits(codec, RT5640_DMIC,
1526 RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK |
1527 RT5640_DMIC_2_DP_MASK,
1528 RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING |
1529 RT5640_DMIC_2_DP_IN1N);
1530 snd_soc_update_bits(codec, RT5640_DMIC,
1531 RT5640_DMIC_2_EN_MASK, RT5640_DMIC_2_EN);
1539 #if USE_ONEBIT_DEPOP
1540 void rt5640_hp_amp_power(struct snd_soc_codec *codec, int on)
1542 static int hp_amp_power_count;
1543 // printk("one bit rt5640_hp_amp_power on=%d hp_amp_power_count=%d\n",on,hp_amp_power_count);
1546 if(hp_amp_power_count <= 0) {
1547 /* depop parameters */
1548 rt5640_index_update_bits(codec, RT5640_CHPUMP_INT_REG1,0x0700, 0x0200);
1549 snd_soc_update_bits(codec, RT5640_DEPOP_M2,
1550 RT5640_DEPOP_MASK, RT5640_DEPOP_MAN);
1551 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1552 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK | RT5640_HP_CB_MASK,
1553 RT5640_HP_CP_PU | RT5640_HP_SG_DIS | RT5640_HP_CB_PU);
1554 /* headphone amp power on */
1555 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1556 RT5640_PWR_FV1 | RT5640_PWR_FV2, 0);
1559 snd_soc_update_bits(codec, RT5640_PWR_VOL,
1560 RT5640_PWR_HV_L | RT5640_PWR_HV_R,
1561 RT5640_PWR_HV_L | RT5640_PWR_HV_R);
1562 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1563 RT5640_PWR_HP_L | RT5640_PWR_HP_R | RT5640_PWR_HA,
1564 RT5640_PWR_HP_L | RT5640_PWR_HP_R | RT5640_PWR_HA);
1565 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1566 RT5640_PWR_FV1 | RT5640_PWR_FV2 ,
1567 RT5640_PWR_FV1 | RT5640_PWR_FV2 );
1568 snd_soc_update_bits(codec, RT5640_DEPOP_M2,
1569 RT5640_DEPOP_MASK | RT5640_DIG_DP_MASK,
1570 RT5640_DEPOP_AUTO | RT5640_DIG_DP_EN);
1571 snd_soc_update_bits(codec, RT5640_CHARGE_PUMP,
1572 RT5640_PM_HP_MASK, RT5640_PM_HP_HV);
1573 snd_soc_update_bits(codec, RT5640_DEPOP_M3,
1574 RT5640_CP_FQ1_MASK | RT5640_CP_FQ2_MASK | RT5640_CP_FQ3_MASK,
1575 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ1_SFT) |
1576 (RT5640_CP_FQ_24_KHZ << RT5640_CP_FQ2_SFT) |
1577 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ3_SFT));
1578 rt5640_index_write(codec, RT5640_MAMP_INT_REG2, 0x1c00);
1579 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1580 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK,
1581 RT5640_HP_CP_PD | RT5640_HP_SG_EN);
1582 rt5640_index_update_bits(codec, RT5640_CHPUMP_INT_REG1,0x0700, 0x0400);
1584 hp_amp_power_count++;
1586 hp_amp_power_count--;
1587 if(hp_amp_power_count <= 0) {
1588 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1589 RT5640_HP_CB_MASK, RT5640_HP_CB_PD);
1591 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1592 RT5640_PWR_HP_L | RT5640_PWR_HP_R | RT5640_PWR_HA,
1594 snd_soc_write(codec, RT5640_DEPOP_M2, 0x3100);
1599 static void rt5640_pmu_depop(struct snd_soc_codec *codec)
1601 rt5640_hp_amp_power(codec, 1);
1602 /* headphone unmute sequence */
1604 snd_soc_update_bits(codec, RT5640_HP_VOL,
1605 RT5640_L_MUTE | RT5640_R_MUTE, 0);
1607 //snd_soc_update_bits(codec, RT5640_HP_CALIB_AMP_DET,
1608 // RT5640_HPD_PS_MASK, RT5640_HPD_PS_EN);
1611 static void rt5640_pmd_depop(struct snd_soc_codec *codec)
1613 snd_soc_update_bits(codec, RT5640_DEPOP_M3,
1614 RT5640_CP_FQ1_MASK | RT5640_CP_FQ2_MASK | RT5640_CP_FQ3_MASK,
1615 (RT5640_CP_FQ_96_KHZ << RT5640_CP_FQ1_SFT) |
1616 (RT5640_CP_FQ_12_KHZ << RT5640_CP_FQ2_SFT) |
1617 (RT5640_CP_FQ_96_KHZ << RT5640_CP_FQ3_SFT));
1618 rt5640_index_write(codec, RT5640_MAMP_INT_REG2, 0x7c00);
1619 //snd_soc_update_bits(codec, RT5640_HP_CALIB_AMP_DET,
1620 // RT5640_HPD_PS_MASK, RT5640_HPD_PS_DIS);
1621 snd_soc_update_bits(codec, RT5640_HP_VOL,
1622 RT5640_L_MUTE | RT5640_R_MUTE,
1623 RT5640_L_MUTE | RT5640_R_MUTE);
1625 rt5640_hp_amp_power(codec, 0);
1630 void rt5640_hp_amp_power(struct snd_soc_codec *codec, int on)
1632 static int hp_amp_power_count;
1633 // printk("rt5640_hp_amp_power on=%d hp_amp_power_count=%d\n",on,hp_amp_power_count);
1636 if(hp_amp_power_count <= 0) {
1637 /* depop parameters */
1638 rt5640_index_update_bits(codec, RT5640_CHPUMP_INT_REG1,0x0700, 0x0200);
1639 snd_soc_update_bits(codec, RT5640_DEPOP_M2,
1640 RT5640_DEPOP_MASK, RT5640_DEPOP_MAN);
1641 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1642 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK | RT5640_HP_CB_MASK,
1643 RT5640_HP_CP_PU | RT5640_HP_SG_DIS | RT5640_HP_CB_PU);
1644 /* headphone amp power on */
1645 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1646 RT5640_PWR_FV1 | RT5640_PWR_FV2 , 0);
1647 snd_soc_update_bits(codec, RT5640_PWR_VOL,
1648 RT5640_PWR_HV_L | RT5640_PWR_HV_R,
1649 RT5640_PWR_HV_L | RT5640_PWR_HV_R);
1650 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1651 RT5640_PWR_HP_L | RT5640_PWR_HP_R | RT5640_PWR_HA,
1652 RT5640_PWR_HP_L | RT5640_PWR_HP_R | RT5640_PWR_HA);
1654 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1655 RT5640_PWR_FV1 | RT5640_PWR_FV2,
1656 RT5640_PWR_FV1 | RT5640_PWR_FV2);
1658 snd_soc_update_bits(codec, RT5640_CHARGE_PUMP,
1659 RT5640_PM_HP_MASK, RT5640_PM_HP_HV);
1660 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1661 RT5640_HP_CO_MASK | RT5640_HP_SG_MASK,
1662 RT5640_HP_CO_EN | RT5640_HP_SG_EN);
1663 rt5640_index_update_bits(codec, RT5640_CHPUMP_INT_REG1,0x0700, 0x0400);
1665 hp_amp_power_count++;
1667 hp_amp_power_count--;
1668 if(hp_amp_power_count <= 0) {
1669 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1670 RT5640_HP_SG_MASK | RT5640_HP_L_SMT_MASK |
1671 RT5640_HP_R_SMT_MASK, RT5640_HP_SG_DIS |
1672 RT5640_HP_L_SMT_DIS | RT5640_HP_R_SMT_DIS);
1673 /* headphone amp power down */
1674 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1675 RT5640_SMT_TRIG_MASK | RT5640_HP_CD_PD_MASK |
1676 RT5640_HP_CO_MASK | RT5640_HP_CP_MASK |
1677 RT5640_HP_SG_MASK | RT5640_HP_CB_MASK,
1678 RT5640_SMT_TRIG_DIS | RT5640_HP_CD_PD_EN |
1679 RT5640_HP_CO_DIS | RT5640_HP_CP_PD |
1680 RT5640_HP_SG_EN | RT5640_HP_CB_PD);
1681 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1682 RT5640_PWR_HP_L | RT5640_PWR_HP_R | RT5640_PWR_HA,
1688 static void rt5640_pmu_depop(struct snd_soc_codec *codec)
1690 rt5640_hp_amp_power(codec, 1);
1691 /* headphone unmute sequence */
1692 snd_soc_update_bits(codec, RT5640_DEPOP_M3,
1693 RT5640_CP_FQ1_MASK | RT5640_CP_FQ2_MASK | RT5640_CP_FQ3_MASK,
1694 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ1_SFT) |
1695 (RT5640_CP_FQ_12_KHZ << RT5640_CP_FQ2_SFT) |
1696 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ3_SFT));
1697 rt5640_index_write(codec, RT5640_MAMP_INT_REG2, 0xfc00);
1698 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1699 RT5640_SMT_TRIG_MASK, RT5640_SMT_TRIG_EN);
1700 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1701 RT5640_RSTN_MASK, RT5640_RSTN_EN);
1702 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1703 RT5640_RSTN_MASK | RT5640_HP_L_SMT_MASK | RT5640_HP_R_SMT_MASK,
1704 RT5640_RSTN_DIS | RT5640_HP_L_SMT_EN | RT5640_HP_R_SMT_EN);
1705 snd_soc_update_bits(codec, RT5640_HP_VOL,
1706 RT5640_L_MUTE | RT5640_R_MUTE, 0);
1708 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1709 RT5640_HP_SG_MASK | RT5640_HP_L_SMT_MASK |
1710 RT5640_HP_R_SMT_MASK, RT5640_HP_SG_DIS |
1711 RT5640_HP_L_SMT_DIS | RT5640_HP_R_SMT_DIS);
1715 static void rt5640_pmd_depop(struct snd_soc_codec *codec)
1717 /* headphone mute sequence */
1718 snd_soc_update_bits(codec, RT5640_DEPOP_M3,
1719 RT5640_CP_FQ1_MASK | RT5640_CP_FQ2_MASK | RT5640_CP_FQ3_MASK,
1720 (RT5640_CP_FQ_96_KHZ << RT5640_CP_FQ1_SFT) |
1721 (RT5640_CP_FQ_12_KHZ << RT5640_CP_FQ2_SFT) |
1722 (RT5640_CP_FQ_96_KHZ << RT5640_CP_FQ3_SFT));
1723 rt5640_index_write(codec, RT5640_MAMP_INT_REG2, 0xfc00);
1724 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1725 RT5640_HP_SG_MASK, RT5640_HP_SG_EN);
1726 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1727 RT5640_RSTP_MASK, RT5640_RSTP_EN);
1728 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1729 RT5640_RSTP_MASK | RT5640_HP_L_SMT_MASK |
1730 RT5640_HP_R_SMT_MASK, RT5640_RSTP_DIS |
1731 RT5640_HP_L_SMT_EN | RT5640_HP_R_SMT_EN);
1733 snd_soc_update_bits(codec, RT5640_HP_VOL,
1734 RT5640_L_MUTE | RT5640_R_MUTE, RT5640_L_MUTE | RT5640_R_MUTE);
1737 rt5640_hp_amp_power(codec, 0);
1741 static int rt5640_hp_event(struct snd_soc_dapm_widget *w,
1742 struct snd_kcontrol *kcontrol, int event)
1744 struct snd_soc_codec *codec = w->codec;
1747 case SND_SOC_DAPM_POST_PMU:
1749 rt5640_update_eqmode(codec,HP);
1751 rt5640_pmu_depop(codec);
1754 case SND_SOC_DAPM_PRE_PMD:
1755 rt5640_pmd_depop(codec);
1765 static int rt5640_mono_event(struct snd_soc_dapm_widget *w,
1766 struct snd_kcontrol *kcontrol, int event)
1768 struct snd_soc_codec *codec = w->codec;
1771 case SND_SOC_DAPM_POST_PMU:
1772 snd_soc_update_bits(codec, RT5640_MONO_OUT,
1776 case SND_SOC_DAPM_PRE_PMD:
1777 snd_soc_update_bits(codec, RT5640_MONO_OUT,
1778 RT5640_L_MUTE, RT5640_L_MUTE);
1788 static int rt5640_lout_event(struct snd_soc_dapm_widget *w,
1789 struct snd_kcontrol *kcontrol, int event)
1791 struct snd_soc_codec *codec = w->codec;
1794 case SND_SOC_DAPM_POST_PMU:
1795 rt5640_hp_amp_power(codec,1);
1796 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1797 RT5640_PWR_LM, RT5640_PWR_LM);
1798 snd_soc_update_bits(codec, RT5640_OUTPUT,
1799 RT5640_L_MUTE | RT5640_R_MUTE, 0);
1802 case SND_SOC_DAPM_PRE_PMD:
1803 snd_soc_update_bits(codec, RT5640_OUTPUT,
1804 RT5640_L_MUTE | RT5640_R_MUTE,
1805 RT5640_L_MUTE | RT5640_R_MUTE);
1806 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1808 rt5640_hp_amp_power(codec,0);
1818 static int rt5640_index_sync_event(struct snd_soc_dapm_widget *w,
1819 struct snd_kcontrol *kcontrol, int event)
1821 struct snd_soc_codec *codec = w->codec;
1824 case SND_SOC_DAPM_PRE_PMU:
1825 rt5640_index_write(codec, RT5640_MIXER_INT_REG, snd_soc_read(codec,RT5640_DUMMY_PR3F));
1835 static int rt5640_dac1_event(struct snd_soc_dapm_widget *w,
1836 struct snd_kcontrol *kcontrol, int event)
1839 struct snd_soc_codec *codec = w->codec;
1842 case SND_SOC_DAPM_PRE_PMD:
1844 rt5640_update_eqmode(codec,NORMAL);
1854 static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = {
1855 SND_SOC_DAPM_SUPPLY("PLL1", RT5640_PWR_ANLG2,
1856 RT5640_PWR_PLL_BIT, 0, NULL, 0),
1859 SND_SOC_DAPM_SUPPLY("LDO2", RT5640_PWR_ANLG1,
1860 RT5640_PWR_LDO2_BIT, 0, NULL, 0),
1861 SND_SOC_DAPM_MICBIAS("micbias1", RT5640_PWR_ANLG2,
1862 RT5640_PWR_MB1_BIT, 0),
1863 SND_SOC_DAPM_MICBIAS("micbias2", RT5640_PWR_ANLG2,
1864 RT5640_PWR_MB2_BIT, 0),
1866 SND_SOC_DAPM_INPUT("DMIC1"),
1867 SND_SOC_DAPM_INPUT("DMIC2"),
1869 SND_SOC_DAPM_INPUT("IN1P"),
1870 SND_SOC_DAPM_INPUT("IN1N"),
1871 SND_SOC_DAPM_INPUT("IN2P"),
1872 SND_SOC_DAPM_INPUT("IN2N"),
1873 SND_SOC_DAPM_INPUT("IN3P"),
1874 SND_SOC_DAPM_INPUT("IN3N"),
1875 SND_SOC_DAPM_PGA_E("DMIC L1", SND_SOC_NOPM, 0, 0, NULL, 0,
1876 rt5640_set_dmic1_event, SND_SOC_DAPM_PRE_PMU),
1877 SND_SOC_DAPM_PGA_E("DMIC R1", SND_SOC_NOPM, 0, 0, NULL, 0,
1878 rt5640_set_dmic1_event, SND_SOC_DAPM_PRE_PMU),
1879 SND_SOC_DAPM_PGA_E("DMIC L2", SND_SOC_NOPM, 0, 0, NULL, 0,
1880 rt5640_set_dmic2_event, SND_SOC_DAPM_PRE_PMU),
1881 SND_SOC_DAPM_PGA_E("DMIC R2", SND_SOC_NOPM, 0, 0, NULL, 0,
1882 rt5640_set_dmic2_event, SND_SOC_DAPM_PRE_PMU),
1883 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1884 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1886 SND_SOC_DAPM_PGA("BST1", RT5640_PWR_ANLG2,
1887 RT5640_PWR_BST1_BIT, 0, NULL, 0),
1888 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) \
1889 || defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
1890 SND_SOC_DAPM_PGA("BST2", RT5640_PWR_ANLG2,
1891 RT5640_PWR_BST2_BIT, 0, NULL, 0),
1892 SND_SOC_DAPM_PGA("BST3", RT5640_PWR_ANLG2,
1893 RT5640_PWR_BST3_BIT, 0, NULL, 0),
1894 SND_SOC_DAPM_PGA("BST4", RT5640_PWR_ANLG2,
1895 RT5640_PWR_BST4_BIT, 0, NULL, 0),
1897 SND_SOC_DAPM_PGA("BST2", RT5640_PWR_ANLG2,
1898 RT5640_PWR_BST4_BIT, 0, NULL, 0),
1899 SND_SOC_DAPM_PGA("BST3", RT5640_PWR_ANLG2,
1900 RT5640_PWR_BST2_BIT, 0, NULL, 0),
1903 SND_SOC_DAPM_PGA("INL VOL", RT5640_PWR_VOL,
1904 RT5640_PWR_IN_L_BIT, 0, NULL, 0),
1905 SND_SOC_DAPM_PGA("INR VOL", RT5640_PWR_VOL,
1906 RT5640_PWR_IN_R_BIT, 0, NULL, 0),
1908 SND_SOC_DAPM_MUX("INL Mux", SND_SOC_NOPM, 0, 0, &rt5640_inl_mux),
1909 SND_SOC_DAPM_MUX("INR Mux", SND_SOC_NOPM, 0, 0, &rt5640_inr_mux),
1911 SND_SOC_DAPM_MIXER("RECMIXL", RT5640_PWR_MIXER, RT5640_PWR_RM_L_BIT, 0,
1912 rt5640_rec_l_mix, ARRAY_SIZE(rt5640_rec_l_mix)),
1913 SND_SOC_DAPM_MIXER("RECMIXR", RT5640_PWR_MIXER, RT5640_PWR_RM_R_BIT, 0,
1914 rt5640_rec_r_mix, ARRAY_SIZE(rt5640_rec_r_mix)),
1916 SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM,
1918 SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM,
1921 SND_SOC_DAPM_SUPPLY("ADC L power",RT5640_PWR_DIG1,
1922 RT5640_PWR_ADC_L_BIT, 0, NULL, 0),
1923 SND_SOC_DAPM_SUPPLY("ADC R power",RT5640_PWR_DIG1,
1924 RT5640_PWR_ADC_R_BIT, 0, NULL, 0),
1925 SND_SOC_DAPM_SUPPLY("ADC clock",SND_SOC_NOPM, 0, 0,
1926 rt5640_adc_event, SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
1928 SND_SOC_DAPM_MUX("Stereo ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1929 &rt5640_sto_adc_l2_mux),
1930 SND_SOC_DAPM_MUX("Stereo ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1931 &rt5640_sto_adc_r2_mux),
1932 SND_SOC_DAPM_MUX("Stereo ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1933 &rt5640_sto_adc_l1_mux),
1934 SND_SOC_DAPM_MUX("Stereo ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1935 &rt5640_sto_adc_r1_mux),
1936 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1937 &rt5640_mono_adc_l2_mux),
1938 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1939 &rt5640_mono_adc_l1_mux),
1940 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1941 &rt5640_mono_adc_r1_mux),
1942 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1943 &rt5640_mono_adc_r2_mux),
1945 SND_SOC_DAPM_SUPPLY("stereo filter", RT5640_PWR_DIG2,
1946 RT5640_PWR_ADC_SF_BIT, 0, NULL, 0),
1947 SND_SOC_DAPM_MIXER("Stereo ADC MIXL", SND_SOC_NOPM, 0, 0,
1948 rt5640_sto_adc_l_mix, ARRAY_SIZE(rt5640_sto_adc_l_mix)),
1949 SND_SOC_DAPM_MIXER("Stereo ADC MIXR", SND_SOC_NOPM, 0, 0,
1950 rt5640_sto_adc_r_mix, ARRAY_SIZE(rt5640_sto_adc_r_mix)),
1951 SND_SOC_DAPM_SUPPLY("mono left filter", RT5640_PWR_DIG2,
1952 RT5640_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1953 SND_SOC_DAPM_MIXER_E("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1954 rt5640_mono_adc_l_mix, ARRAY_SIZE(rt5640_mono_adc_l_mix),
1955 rt5640_mono_adcl_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1956 SND_SOC_DAPM_SUPPLY("mono right filter", RT5640_PWR_DIG2,
1957 RT5640_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1958 SND_SOC_DAPM_MIXER_E("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1959 rt5640_mono_adc_r_mix, ARRAY_SIZE(rt5640_mono_adc_r_mix),
1960 rt5640_mono_adcr_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1963 SND_SOC_DAPM_MUX("IF2 ADC L Mux", SND_SOC_NOPM, 0, 0,
1964 &rt5640_if2_adc_l_mux),
1965 SND_SOC_DAPM_MUX("IF2 ADC R Mux", SND_SOC_NOPM, 0, 0,
1966 &rt5640_if2_adc_r_mux),
1968 /* Digital Interface */
1969 SND_SOC_DAPM_SUPPLY("I2S1", RT5640_PWR_DIG1,
1970 RT5640_PWR_I2S1_BIT, 0, NULL, 0),
1971 SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1972 SND_SOC_DAPM_PGA("IF1 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1973 SND_SOC_DAPM_PGA("IF1 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1974 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1975 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1976 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1977 SND_SOC_DAPM_SUPPLY("I2S2", RT5640_PWR_DIG1,
1978 RT5640_PWR_I2S2_BIT, 0, NULL, 0),
1979 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1980 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1981 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1982 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1983 SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1984 SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1985 SND_SOC_DAPM_SUPPLY("I2S3", RT5640_PWR_DIG1,
1986 RT5640_PWR_I2S3_BIT, 0, NULL, 0),
1987 SND_SOC_DAPM_PGA("IF3 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1988 SND_SOC_DAPM_PGA("IF3 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1989 SND_SOC_DAPM_PGA("IF3 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1990 SND_SOC_DAPM_PGA("IF3 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1991 SND_SOC_DAPM_PGA("IF3 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1992 SND_SOC_DAPM_PGA("IF3 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1994 /* Digital Interface Select */
1995 SND_SOC_DAPM_MUX("DAI1 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1996 SND_SOC_DAPM_MUX("DAI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1997 SND_SOC_DAPM_MUX("DAI1 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1998 SND_SOC_DAPM_MUX("DAI1 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1999 SND_SOC_DAPM_MUX("SDI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
2001 SND_SOC_DAPM_MUX("DAI2 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
2002 SND_SOC_DAPM_MUX("DAI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
2003 SND_SOC_DAPM_MUX("DAI2 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
2004 SND_SOC_DAPM_MUX("DAI2 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
2005 SND_SOC_DAPM_MUX("SDI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
2007 SND_SOC_DAPM_MUX("DAI3 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
2008 SND_SOC_DAPM_MUX("DAI3 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
2010 /* Audio Interface */
2011 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
2012 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
2013 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
2014 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
2015 SND_SOC_DAPM_AIF_IN("AIF3RX", "AIF3 Playback", 0, SND_SOC_NOPM, 0, 0),
2016 SND_SOC_DAPM_AIF_OUT("AIF3TX", "AIF3 Capture", 0, SND_SOC_NOPM, 0, 0),
2019 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
2022 SND_SOC_DAPM_PGA("ANC", SND_SOC_NOPM, 0, 0, NULL, 0),
2025 /* DAC mixer before sound effect */
2026 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
2027 rt5640_dac_l_mix, ARRAY_SIZE(rt5640_dac_l_mix)),
2028 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
2029 rt5640_dac_r_mix, ARRAY_SIZE(rt5640_dac_r_mix)),
2031 /* DAC2 channel Mux */
2032 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
2033 &rt5640_dac_l2_mux),
2034 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0,
2035 &rt5640_dac_r2_mux),
2036 SND_SOC_DAPM_PGA("DAC L2 Volume", RT5640_PWR_DIG1,
2037 RT5640_PWR_DAC_L2_BIT, 0, NULL, 0),
2038 SND_SOC_DAPM_PGA("DAC R2 Volume", RT5640_PWR_DIG1,
2039 RT5640_PWR_DAC_R2_BIT, 0, NULL, 0),
2042 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
2043 rt5640_sto_dac_l_mix, ARRAY_SIZE(rt5640_sto_dac_l_mix)),
2044 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
2045 rt5640_sto_dac_r_mix, ARRAY_SIZE(rt5640_sto_dac_r_mix)),
2046 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
2047 rt5640_mono_dac_l_mix, ARRAY_SIZE(rt5640_mono_dac_l_mix)),
2048 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
2049 rt5640_mono_dac_r_mix, ARRAY_SIZE(rt5640_mono_dac_r_mix)),
2050 SND_SOC_DAPM_MIXER("DIG MIXL", SND_SOC_NOPM, 0, 0,
2051 rt5640_dig_l_mix, ARRAY_SIZE(rt5640_dig_l_mix)),
2052 SND_SOC_DAPM_MIXER("DIG MIXR", SND_SOC_NOPM, 0, 0,
2053 rt5640_dig_r_mix, ARRAY_SIZE(rt5640_dig_r_mix)),
2054 SND_SOC_DAPM_MUX_E("Mono dacr Mux", SND_SOC_NOPM, 0, 0,
2055 &rt5640_dacr2_mux, rt5640_index_sync_event, SND_SOC_DAPM_PRE_PMU),
2058 SND_SOC_DAPM_DAC_E("DAC L1", NULL, RT5640_PWR_DIG1,
2059 RT5640_PWR_DAC_L1_BIT, 0, rt5640_dac1_event,
2060 SND_SOC_DAPM_PRE_PMD),
2061 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5640_PWR_DIG1,
2062 RT5640_PWR_DAC_L2_BIT, 0),
2063 SND_SOC_DAPM_DAC_E("DAC R1", NULL, RT5640_PWR_DIG1,
2064 RT5640_PWR_DAC_R1_BIT, 0, rt5640_dac1_event,
2065 SND_SOC_DAPM_PRE_PMD),
2066 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5640_PWR_DIG1,
2067 RT5640_PWR_DAC_R2_BIT, 0),
2069 SND_SOC_DAPM_MIXER("SPK MIXL", RT5640_PWR_MIXER, RT5640_PWR_SM_L_BIT,
2070 0, rt5640_spk_l_mix, ARRAY_SIZE(rt5640_spk_l_mix)),
2071 SND_SOC_DAPM_MIXER("SPK MIXR", RT5640_PWR_MIXER, RT5640_PWR_SM_R_BIT,
2072 0, rt5640_spk_r_mix, ARRAY_SIZE(rt5640_spk_r_mix)),
2073 SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
2074 0, rt5640_out_l_mix, ARRAY_SIZE(rt5640_out_l_mix)),
2075 SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
2076 0, rt5640_out_r_mix, ARRAY_SIZE(rt5640_out_r_mix)),
2078 SND_SOC_DAPM_PGA("SPKVOL L", RT5640_PWR_VOL,
2079 RT5640_PWR_SV_L_BIT, 0, NULL, 0),
2080 SND_SOC_DAPM_PGA("SPKVOL R", RT5640_PWR_VOL,
2081 RT5640_PWR_SV_R_BIT, 0, NULL, 0),
2082 SND_SOC_DAPM_PGA("OUTVOL L", RT5640_PWR_VOL,
2083 RT5640_PWR_OV_L_BIT, 0, NULL, 0),
2084 SND_SOC_DAPM_PGA("OUTVOL R", RT5640_PWR_VOL,
2085 RT5640_PWR_OV_R_BIT, 0, NULL, 0),
2086 SND_SOC_DAPM_PGA("HPOVOL L", RT5640_PWR_VOL,
2087 RT5640_PWR_HV_L_BIT, 0, NULL, 0),
2088 SND_SOC_DAPM_PGA("HPOVOL R", RT5640_PWR_VOL,
2089 RT5640_PWR_HV_R_BIT, 0, NULL, 0),
2090 SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM,
2092 SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM,
2094 SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM,
2096 /* SPO/HPO/LOUT/Mono Mixer */
2097 SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0,
2098 0, rt5640_spo_l_mix, ARRAY_SIZE(rt5640_spo_l_mix)),
2099 SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0,
2100 0, rt5640_spo_r_mix, ARRAY_SIZE(rt5640_spo_r_mix)),
2101 SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0,
2102 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
2103 SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0,
2104 rt5640_lout_mix, ARRAY_SIZE(rt5640_lout_mix)),
2105 SND_SOC_DAPM_MIXER("Mono MIX", RT5640_PWR_ANLG1, RT5640_PWR_MM_BIT, 0,
2106 rt5640_mono_mix, ARRAY_SIZE(rt5640_mono_mix)),
2108 SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0,
2109 rt5640_hp_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2110 SND_SOC_DAPM_PGA_S("SPK amp", 1, SND_SOC_NOPM, 0, 0,
2111 rt5640_spk_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2112 SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0,
2113 rt5640_lout_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2114 SND_SOC_DAPM_PGA_S("Mono amp", 1, RT5640_PWR_ANLG1,
2115 RT5640_PWR_MA_BIT, 0, rt5640_mono_event,
2116 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2119 SND_SOC_DAPM_OUTPUT("SPOLP"),
2120 SND_SOC_DAPM_OUTPUT("SPOLN"),
2121 SND_SOC_DAPM_OUTPUT("SPORP"),
2122 SND_SOC_DAPM_OUTPUT("SPORN"),
2123 SND_SOC_DAPM_OUTPUT("HPOL"),
2124 SND_SOC_DAPM_OUTPUT("HPOR"),
2125 SND_SOC_DAPM_OUTPUT("LOUTL"),
2126 SND_SOC_DAPM_OUTPUT("LOUTR"),
2127 SND_SOC_DAPM_OUTPUT("MonoP"),
2128 SND_SOC_DAPM_OUTPUT("MonoN"),
2131 static const struct snd_soc_dapm_route rt5640_dapm_routes[] = {
2132 {"IN1P", NULL, "LDO2"},
2133 {"IN2P", NULL, "LDO2"},
2134 {"IN3P", NULL, "LDO2"},
2135 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) \
2136 || defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2137 {"IN4P", NULL, "LDO2"},
2140 {"DMIC L1", NULL, "DMIC1"},
2141 {"DMIC R1", NULL, "DMIC1"},
2142 {"DMIC L2", NULL, "DMIC2"},
2143 {"DMIC R2", NULL, "DMIC2"},
2145 {"BST1", NULL, "IN1P"},
2146 {"BST1", NULL, "IN1N"},
2147 {"BST2", NULL, "IN2P"},
2148 {"BST2", NULL, "IN2N"},
2149 {"BST3", NULL, "IN3P"},
2150 {"BST3", NULL, "IN3N"},
2151 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) \
2152 || defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2153 {"BST4", NULL, "IN4P"},
2154 {"BST4", NULL, "IN4N"},
2157 {"INL VOL", NULL, "IN2P"},
2158 {"INR VOL", NULL, "IN2N"},
2160 {"RECMIXL", "HPOL Switch", "HPOL"},
2161 {"RECMIXL", "INL Switch", "INL VOL"},
2162 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) \
2163 || defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2164 {"RECMIXL", "BST4 Switch", "BST4"},
2166 {"RECMIXL", "BST3 Switch", "BST3"},
2167 {"RECMIXL", "BST2 Switch", "BST2"},
2168 {"RECMIXL", "BST1 Switch", "BST1"},
2169 {"RECMIXL", "OUT MIXL Switch", "OUT MIXL"},
2171 {"RECMIXR", "HPOR Switch", "HPOR"},
2172 {"RECMIXR", "INR Switch", "INR VOL"},
2173 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) \
2174 || defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2175 {"RECMIXR", "BST4 Switch", "BST4"},
2177 {"RECMIXR", "BST3 Switch", "BST3"},
2178 {"RECMIXR", "BST2 Switch", "BST2"},
2179 {"RECMIXR", "BST1 Switch", "BST1"},
2180 {"RECMIXR", "OUT MIXR Switch", "OUT MIXR"},
2182 {"ADC L", NULL, "RECMIXL"},
2183 {"ADC L", NULL, "ADC L power"},
2184 {"ADC L", NULL, "ADC clock"},
2185 {"ADC R", NULL, "RECMIXR"},
2186 {"ADC R", NULL, "ADC R power"},
2187 {"ADC R", NULL, "ADC clock"},
2189 {"DMIC L1", NULL, "DMIC CLK"},
2190 {"DMIC R1", NULL, "DMIC CLK"},
2191 {"DMIC L2", NULL, "DMIC CLK"},
2192 {"DMIC R2", NULL, "DMIC CLK"},
2194 {"Stereo ADC L2 Mux", "DMIC1", "DMIC L1"},
2195 {"Stereo ADC L2 Mux", "DMIC2", "DMIC L2"},
2196 {"Stereo ADC L2 Mux", "DIG MIX", "DIG MIXL"},
2197 {"Stereo ADC L1 Mux", "ADC", "ADC L"},
2198 {"Stereo ADC L1 Mux", "DIG MIX", "DIG MIXL"},
2200 {"Stereo ADC R1 Mux", "ADC", "ADC R"},
2201 {"Stereo ADC R1 Mux", "DIG MIX", "DIG MIXR"},
2202 {"Stereo ADC R2 Mux", "DMIC1", "DMIC R1"},
2203 {"Stereo ADC R2 Mux", "DMIC2", "DMIC R2"},
2204 {"Stereo ADC R2 Mux", "DIG MIX", "DIG MIXR"},
2206 {"Mono ADC L2 Mux", "DMIC L1", "DMIC L1"},
2207 {"Mono ADC L2 Mux", "DMIC L2", "DMIC L2"},
2208 {"Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
2209 {"Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
2210 {"Mono ADC L1 Mux", "ADCL", "ADC L"},
2212 {"Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
2213 {"Mono ADC R1 Mux", "ADCR", "ADC R"},
2214 {"Mono ADC R2 Mux", "DMIC R1", "DMIC R1"},
2215 {"Mono ADC R2 Mux", "DMIC R2", "DMIC R2"},
2216 {"Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
2218 {"Stereo ADC MIXL", "ADC1 Switch", "Stereo ADC L1 Mux"},
2219 {"Stereo ADC MIXL", "ADC2 Switch", "Stereo ADC L2 Mux"},
2220 {"Stereo ADC MIXL", NULL, "stereo filter"},
2221 {"stereo filter", NULL, "PLL1", check_sysclk1_source},
2223 {"Stereo ADC MIXR", "ADC1 Switch", "Stereo ADC R1 Mux"},
2224 {"Stereo ADC MIXR", "ADC2 Switch", "Stereo ADC R2 Mux"},
2225 {"Stereo ADC MIXR", NULL, "stereo filter"},
2226 {"stereo filter", NULL, "PLL1", check_sysclk1_source},
2228 {"Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux"},
2229 {"Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux"},
2230 {"Mono ADC MIXL", NULL, "mono left filter"},
2231 {"mono left filter", NULL, "PLL1", check_sysclk1_source},
2233 {"Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux"},
2234 {"Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux"},
2235 {"Mono ADC MIXR", NULL, "mono right filter"},
2236 {"mono right filter", NULL, "PLL1", check_sysclk1_source},
2238 {"IF2 ADC L Mux", "Mono ADC MIXL", "Mono ADC MIXL"},
2239 {"IF2 ADC R Mux", "Mono ADC MIXR", "Mono ADC MIXR"},
2241 {"IF2 ADC L", NULL, "IF2 ADC L Mux"},
2242 {"IF2 ADC R", NULL, "IF2 ADC R Mux"},
2243 {"IF3 ADC L", NULL, "Mono ADC MIXL"},
2244 {"IF3 ADC R", NULL, "Mono ADC MIXR"},
2245 {"IF1 ADC L", NULL, "Stereo ADC MIXL"},
2246 {"IF1 ADC R", NULL, "Stereo ADC MIXR"},
2248 {"IF1 ADC", NULL, "I2S1"},
2249 {"IF1 ADC", NULL, "IF1 ADC L"},
2250 {"IF1 ADC", NULL, "IF1 ADC R"},
2251 {"IF2 ADC", NULL, "I2S2"},
2252 {"IF2 ADC", NULL, "IF2 ADC L"},
2253 {"IF2 ADC", NULL, "IF2 ADC R"},
2254 {"IF3 ADC", NULL, "I2S3"},
2255 {"IF3 ADC", NULL, "IF3 ADC L"},
2256 {"IF3 ADC", NULL, "IF3 ADC R"},
2258 {"DAI1 TX Mux", "1:1|2:2|3:3", "IF1 ADC"},
2259 {"DAI1 TX Mux", "1:1|2:3|3:2", "IF1 ADC"},
2260 {"DAI1 TX Mux", "1:3|2:1|3:2", "IF2 ADC"},
2261 {"DAI1 TX Mux", "1:2|2:1|3:3", "IF2 ADC"},
2262 {"DAI1 TX Mux", "1:3|2:2|3:1", "IF3 ADC"},
2263 {"DAI1 TX Mux", "1:2|2:3|3:1", "IF3 ADC"},
2264 {"DAI1 IF1 Mux", "1:1|2:1|3:3", "IF1 ADC"},
2265 {"DAI1 IF2 Mux", "1:1|2:1|3:3", "IF2 ADC"},
2266 {"SDI1 TX Mux", "IF1", "DAI1 IF1 Mux"},
2267 {"SDI1 TX Mux", "IF2", "DAI1 IF2 Mux"},
2269 {"DAI2 TX Mux", "1:2|2:3|3:1", "IF1 ADC"},
2270 {"DAI2 TX Mux", "1:2|2:1|3:3", "IF1 ADC"},
2271 {"DAI2 TX Mux", "1:1|2:2|3:3", "IF2 ADC"},
2272 {"DAI2 TX Mux", "1:3|2:2|3:1", "IF2 ADC"},
2273 {"DAI2 TX Mux", "1:1|2:3|3:2", "IF3 ADC"},
2274 {"DAI2 TX Mux", "1:3|2:1|3:2", "IF3 ADC"},
2275 {"DAI2 IF1 Mux", "1:2|2:2|3:3", "IF1 ADC"},
2276 {"DAI2 IF2 Mux", "1:2|2:2|3:3", "IF2 ADC"},
2277 {"SDI2 TX Mux", "IF1", "DAI2 IF1 Mux"},
2278 {"SDI2 TX Mux", "IF2", "DAI2 IF2 Mux"},
2280 {"DAI3 TX Mux", "1:3|2:1|3:2", "IF1 ADC"},
2281 {"DAI3 TX Mux", "1:3|2:2|3:1", "IF1 ADC"},
2282 {"DAI3 TX Mux", "1:1|2:3|3:2", "IF2 ADC"},
2283 {"DAI3 TX Mux", "1:2|2:3|3:1", "IF2 ADC"},
2284 {"DAI3 TX Mux", "1:1|2:2|3:3", "IF3 ADC"},
2285 {"DAI3 TX Mux", "1:2|2:1|3:3", "IF3 ADC"},
2286 {"DAI3 TX Mux", "1:1|2:1|3:3", "IF3 ADC"},
2287 {"DAI3 TX Mux", "1:2|2:2|3:3", "IF3 ADC"},
2289 {"AIF1TX", NULL, "DAI1 TX Mux"},
2290 {"AIF1TX", NULL, "SDI1 TX Mux"},
2291 {"AIF2TX", NULL, "DAI2 TX Mux"},
2292 {"AIF2TX", NULL, "SDI2 TX Mux"},
2293 {"AIF3TX", NULL, "DAI3 TX Mux"},
2295 {"DAI1 RX Mux", "1:1|2:2|3:3", "AIF1RX"},
2296 {"DAI1 RX Mux", "1:1|2:3|3:2", "AIF1RX"},
2297 {"DAI1 RX Mux", "1:1|2:1|3:3", "AIF1RX"},
2298 {"DAI1 RX Mux", "1:2|2:3|3:1", "AIF2RX"},
2299 {"DAI1 RX Mux", "1:2|2:1|3:3", "AIF2RX"},
2300 {"DAI1 RX Mux", "1:2|2:2|3:3", "AIF2RX"},
2301 {"DAI1 RX Mux", "1:3|2:1|3:2", "AIF3RX"},
2302 {"DAI1 RX Mux", "1:3|2:2|3:1", "AIF3RX"},
2304 {"DAI2 RX Mux", "1:3|2:1|3:2", "AIF1RX"},
2305 {"DAI2 RX Mux", "1:2|2:1|3:3", "AIF1RX"},
2306 {"DAI2 RX Mux", "1:1|2:1|3:3", "AIF1RX"},
2307 {"DAI2 RX Mux", "1:1|2:2|3:3", "AIF2RX"},
2308 {"DAI2 RX Mux", "1:3|2:2|3:1", "AIF2RX"},
2309 {"DAI2 RX Mux", "1:2|2:2|3:3", "AIF2RX"},
2310 {"DAI2 RX Mux", "1:1|2:3|3:2", "AIF3RX"},
2311 {"DAI2 RX Mux", "1:2|2:3|3:1", "AIF3RX"},
2313 {"DAI3 RX Mux", "1:3|2:2|3:1", "AIF1RX"},
2314 {"DAI3 RX Mux", "1:2|2:3|3:1", "AIF1RX"},
2315 {"DAI3 RX Mux", "1:1|2:3|3:2", "AIF2RX"},
2316 {"DAI3 RX Mux", "1:3|2:1|3:2", "AIF2RX"},
2317 {"DAI3 RX Mux", "1:1|2:2|3:3", "AIF3RX"},
2318 {"DAI3 RX Mux", "1:2|2:1|3:3", "AIF3RX"},
2319 {"DAI3 RX Mux", "1:1|2:1|3:3", "AIF3RX"},
2320 {"DAI3 RX Mux", "1:2|2:2|3:3", "AIF3RX"},
2322 {"IF1 DAC", NULL, "I2S1"},
2323 {"IF1 DAC", NULL, "DAI1 RX Mux"},
2324 {"IF2 DAC", NULL, "I2S2"},
2325 {"IF2 DAC", NULL, "DAI2 RX Mux"},
2326 {"IF3 DAC", NULL, "I2S3"},
2327 {"IF3 DAC", NULL, "DAI3 RX Mux"},
2329 {"IF1 DAC L", NULL, "IF1 DAC"},
2330 {"IF1 DAC R", NULL, "IF1 DAC"},
2331 {"IF2 DAC L", NULL, "IF2 DAC"},
2332 {"IF2 DAC R", NULL, "IF2 DAC"},
2333 {"IF3 DAC L", NULL, "IF3 DAC"},
2334 {"IF3 DAC R", NULL, "IF3 DAC"},
2336 {"DAC MIXL", "Stereo ADC Switch", "Stereo ADC MIXL"},
2337 {"DAC MIXL", "INF1 Switch", "IF1 DAC L"},
2338 {"DAC MIXR", "Stereo ADC Switch", "Stereo ADC MIXR"},
2339 {"DAC MIXR", "INF1 Switch", "IF1 DAC R"},
2341 {"ANC", NULL, "Stereo ADC MIXL"},
2342 {"ANC", NULL, "Stereo ADC MIXR"},
2344 {"Audio DSP", NULL, "DAC MIXL"},
2345 {"Audio DSP", NULL, "DAC MIXR"},
2347 {"DAC L2 Mux", "IF2", "IF2 DAC L"},
2348 {"DAC L2 Mux", "IF3", "IF3 DAC L"},
2349 {"DAC L2 Mux", "Base L/R", "Audio DSP"},
2350 {"DAC L2 Volume", NULL, "DAC L2 Mux"},
2352 {"DAC R2 Mux", "IF2", "IF2 DAC R"},
2353 {"DAC R2 Mux", "IF3", "IF3 DAC R"},
2354 {"DAC R2 Volume", NULL, "Mono dacr Mux"},
2355 {"Mono dacr Mux", "TxDC_R", "DAC R2 Mux"},
2356 {"Mono dacr Mux", "TxDP_R", "IF2 ADC R Mux"},
2358 {"Stereo DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
2359 {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume"},
2360 {"Stereo DAC MIXL", "ANC Switch", "ANC"},
2361 {"Stereo DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
2362 {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume"},
2363 {"Stereo DAC MIXR", "ANC Switch", "ANC"},
2365 {"Mono DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
2366 {"Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume"},
2367 {"Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume"},
2368 {"Mono DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
2369 {"Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume"},
2370 {"Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume"},
2372 {"DIG MIXL", "DAC L1 Switch", "DAC MIXL"},
2373 {"DIG MIXL", "DAC L2 Switch", "DAC L2 Volume"},
2374 {"DIG MIXR", "DAC R1 Switch", "DAC MIXR"},
2375 {"DIG MIXR", "DAC R2 Switch", "DAC R2 Volume"},
2377 {"DAC L1", NULL, "Stereo DAC MIXL"},
2378 {"DAC L1", NULL, "PLL1", check_sysclk1_source},
2379 {"DAC R1", NULL, "Stereo DAC MIXR"},
2380 {"DAC R1", NULL, "PLL1", check_sysclk1_source},
2381 {"DAC L2", NULL, "Mono DAC MIXL"},
2382 {"DAC L2", NULL, "PLL1", check_sysclk1_source},
2383 {"DAC R2", NULL, "Mono DAC MIXR"},
2384 {"DAC R2", NULL, "PLL1", check_sysclk1_source},
2386 {"SPK MIXL", "REC MIXL Switch", "RECMIXL"},
2387 {"SPK MIXL", "INL Switch", "INL VOL"},
2388 {"SPK MIXL", "DAC L1 Switch", "DAC L1"},
2389 {"SPK MIXL", "DAC L2 Switch", "DAC L2"},
2390 {"SPK MIXL", "OUT MIXL Switch", "OUT MIXL"},
2391 {"SPK MIXR", "REC MIXR Switch", "RECMIXR"},
2392 {"SPK MIXR", "INR Switch", "INR VOL"},
2393 {"SPK MIXR", "DAC R1 Switch", "DAC R1"},
2394 {"SPK MIXR", "DAC R2 Switch", "DAC R2"},
2395 {"SPK MIXR", "OUT MIXR Switch", "OUT MIXR"},
2397 {"OUT MIXL", "BST3 Switch", "BST3"},
2398 {"OUT MIXL", "BST1 Switch", "BST1"},
2399 {"OUT MIXL", "INL Switch", "INL VOL"},
2400 {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
2401 {"OUT MIXL", "DAC R2 Switch", "DAC R2"},
2402 {"OUT MIXL", "DAC L2 Switch", "DAC L2"},
2403 {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
2405 {"OUT MIXR", "BST3 Switch", "BST3"},
2406 {"OUT MIXR", "BST2 Switch", "BST2"},
2407 {"OUT MIXR", "BST1 Switch", "BST1"},
2408 {"OUT MIXR", "INR Switch", "INR VOL"},
2409 {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
2410 {"OUT MIXR", "DAC L2 Switch", "DAC L2"},
2411 {"OUT MIXR", "DAC R2 Switch", "DAC R2"},
2412 {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
2414 {"SPKVOL L", NULL, "SPK MIXL"},
2415 {"SPKVOL R", NULL, "SPK MIXR"},
2416 {"HPOVOL L", NULL, "OUT MIXL"},
2417 {"HPOVOL R", NULL, "OUT MIXR"},
2418 {"OUTVOL L", NULL, "OUT MIXL"},
2419 {"OUTVOL R", NULL, "OUT MIXR"},
2421 {"SPOL MIX", "DAC R1 Switch", "DAC R1"},
2422 {"SPOL MIX", "DAC L1 Switch", "DAC L1"},
2423 {"SPOL MIX", "SPKVOL R Switch", "SPKVOL R"},
2424 {"SPOL MIX", "SPKVOL L Switch", "SPKVOL L"},
2425 {"SPOL MIX", "BST1 Switch", "BST1"},
2426 {"SPOR MIX", "DAC R1 Switch", "DAC R1"},
2427 {"SPOR MIX", "SPKVOL R Switch", "SPKVOL R"},
2428 {"SPOR MIX", "BST1 Switch", "BST1"},
2430 {"DAC 2", NULL, "DAC L2"},
2431 {"DAC 2", NULL, "DAC R2"},
2432 {"DAC 1", NULL, "DAC L1"},
2433 {"DAC 1", NULL, "DAC R1"},
2434 {"HPOVOL", NULL, "HPOVOL L"},
2435 {"HPOVOL", NULL, "HPOVOL R"},
2436 {"HPO MIX", "DAC2 Switch", "DAC 2"},
2437 {"HPO MIX", "DAC1 Switch", "DAC 1"},
2438 {"HPO MIX", "HPVOL Switch", "HPOVOL"},
2440 {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
2441 {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
2442 {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
2443 {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
2445 {"Mono MIX", "DAC R2 Switch", "DAC R2"},
2446 {"Mono MIX", "DAC L2 Switch", "DAC L2"},
2447 {"Mono MIX", "OUTVOL R Switch", "OUTVOL R"},
2448 {"Mono MIX", "OUTVOL L Switch", "OUTVOL L"},
2449 {"Mono MIX", "BST1 Switch", "BST1"},
2451 {"SPK amp", NULL, "SPOL MIX"},
2452 {"SPK amp", NULL, "SPOR MIX"},
2453 {"SPOLP", NULL, "SPK amp"},
2454 {"SPOLN", NULL, "SPK amp"},
2455 {"SPORP", NULL, "SPK amp"},
2456 {"SPORN", NULL, "SPK amp"},
2458 {"HP amp", NULL, "HPO MIX"},
2459 {"HPOL", NULL, "HP amp"},
2460 {"HPOR", NULL, "HP amp"},
2462 {"LOUT amp", NULL, "LOUT MIX"},
2463 {"LOUTL", NULL, "LOUT amp"},
2464 {"LOUTR", NULL, "LOUT amp"},
2466 {"Mono amp", NULL, "Mono MIX"},
2467 {"MonoP", NULL, "Mono amp"},
2468 {"MonoN", NULL, "Mono amp"},
2471 static int get_sdp_info(struct snd_soc_codec *codec, int dai_id)
2478 val = snd_soc_read(codec, RT5640_I2S1_SDP);
2479 val = (val & RT5640_I2S_IF_MASK) >> RT5640_I2S_IF_SFT;
2482 if (val == RT5640_IF_123 || val == RT5640_IF_132 ||
2483 val == RT5640_IF_113)
2484 ret |= RT5640_U_IF1;
2485 if (val == RT5640_IF_312 || val == RT5640_IF_213 ||
2486 val == RT5640_IF_113)
2487 ret |= RT5640_U_IF2;
2488 if (val == RT5640_IF_321 || val == RT5640_IF_231)
2489 ret |= RT5640_U_IF3;
2493 if (val == RT5640_IF_231 || val == RT5640_IF_213 ||
2494 val == RT5640_IF_223)
2495 ret |= RT5640_U_IF1;
2496 if (val == RT5640_IF_123 || val == RT5640_IF_321 ||
2497 val == RT5640_IF_223)
2498 ret |= RT5640_U_IF2;
2499 if (val == RT5640_IF_132 || val == RT5640_IF_312)
2500 ret |= RT5640_U_IF3;
2503 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) \
2504 || defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2506 if (val == RT5640_IF_312 || val == RT5640_IF_321)
2507 ret |= RT5640_U_IF1;
2508 if (val == RT5640_IF_132 || val == RT5640_IF_231)
2509 ret |= RT5640_U_IF2;
2510 if (val == RT5640_IF_123 || val == RT5640_IF_213 ||
2511 val == RT5640_IF_113 || val == RT5640_IF_223)
2512 ret |= RT5640_U_IF3;
2524 static int get_clk_info(int sclk, int rate)
2526 int i, pd[] = {1, 2, 3, 4, 6, 8, 12, 16};
2528 if (sclk <= 0 || rate <= 0)
2532 for (i = 0; i < ARRAY_SIZE(pd); i++)
2533 if (sclk == rate * pd[i])
2539 static int rt5640_hw_params(struct snd_pcm_substream *substream,
2540 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2542 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2543 struct snd_soc_codec *codec = rtd->codec;
2544 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2545 unsigned int val_len = 0, val_clk, mask_clk, dai_sel;
2546 int pre_div, bclk_ms, frame_size;
2548 rt5640->lrck[dai->id] = params_rate(params);
2549 pre_div = get_clk_info(rt5640->sysclk, rt5640->lrck[dai->id]);
2551 dev_err(codec->dev, "Unsupported clock setting\n");
2554 frame_size = snd_soc_params_to_frame_size(params);
2555 if (frame_size < 0) {
2556 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
2559 bclk_ms = frame_size > 32 ? 1 : 0;
2560 rt5640->bclk[dai->id] = rt5640->lrck[dai->id] * (32 << bclk_ms);
2562 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
2563 rt5640->bclk[dai->id], rt5640->lrck[dai->id]);
2564 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
2565 bclk_ms, pre_div, dai->id);
2567 switch (params_format(params)) {
2568 case SNDRV_PCM_FORMAT_S16_LE:
2570 case SNDRV_PCM_FORMAT_S20_3LE:
2571 val_len |= RT5640_I2S_DL_20;
2573 case SNDRV_PCM_FORMAT_S24_LE:
2574 val_len |= RT5640_I2S_DL_24;
2576 case SNDRV_PCM_FORMAT_S8:
2577 val_len |= RT5640_I2S_DL_8;
2583 dai_sel = get_sdp_info(codec, dai->id);
2584 dai_sel |= (RT5640_U_IF1 | RT5640_U_IF2);
2586 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
2589 if (dai_sel & RT5640_U_IF1) {
2590 mask_clk = RT5640_I2S_BCLK_MS1_MASK | RT5640_I2S_PD1_MASK;
2591 val_clk = bclk_ms << RT5640_I2S_BCLK_MS1_SFT |
2592 pre_div << RT5640_I2S_PD1_SFT;
2593 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
2594 RT5640_I2S_DL_MASK, val_len);
2595 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
2597 if (dai_sel & RT5640_U_IF2) {
2598 mask_clk = RT5640_I2S_BCLK_MS2_MASK | RT5640_I2S_PD2_MASK;
2599 val_clk = bclk_ms << RT5640_I2S_BCLK_MS2_SFT |
2600 pre_div << RT5640_I2S_PD2_SFT;
2601 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
2602 RT5640_I2S_DL_MASK, val_len);
2603 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
2605 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) \
2606 || defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2607 if (dai_sel & RT5640_U_IF3) {
2608 mask_clk = RT5640_I2S_BCLK_MS3_MASK | RT5640_I2S_PD3_MASK;
2609 val_clk = bclk_ms << RT5640_I2S_BCLK_MS3_SFT |
2610 pre_div << RT5640_I2S_PD3_SFT;
2611 snd_soc_update_bits(codec, RT5640_I2S3_SDP,
2612 RT5640_I2S_DL_MASK, val_len);
2613 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
2619 static int rt5640_prepare(struct snd_pcm_substream *substream,
2620 struct snd_soc_dai *dai)
2622 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2623 struct snd_soc_codec *codec = rtd->codec;
2624 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2626 rt5640->aif_pu = dai->id;
2630 static int rt5640_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2632 struct snd_soc_codec *codec = dai->codec;
2633 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2634 unsigned int reg_val = 0, dai_sel;
2636 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2637 case SND_SOC_DAIFMT_CBM_CFM:
2638 rt5640->master[dai->id] = 1;
2640 case SND_SOC_DAIFMT_CBS_CFS:
2641 reg_val |= RT5640_I2S_MS_S;
2642 rt5640->master[dai->id] = 0;
2648 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2649 case SND_SOC_DAIFMT_NB_NF:
2651 case SND_SOC_DAIFMT_IB_NF:
2652 reg_val |= RT5640_I2S_BP_INV;
2658 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2659 case SND_SOC_DAIFMT_I2S:
2661 case SND_SOC_DAIFMT_LEFT_J:
2662 reg_val |= RT5640_I2S_DF_LEFT;
2664 case SND_SOC_DAIFMT_DSP_A:
2665 reg_val |= RT5640_I2S_DF_PCM_A;
2667 case SND_SOC_DAIFMT_DSP_B:
2668 reg_val |= RT5640_I2S_DF_PCM_B;
2674 dai_sel = get_sdp_info(codec, dai->id);
2676 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
2679 if (dai_sel & RT5640_U_IF1) {
2680 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
2681 RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
2682 RT5640_I2S_DF_MASK, reg_val);
2684 if (dai_sel & RT5640_U_IF2) {
2685 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
2686 RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
2687 RT5640_I2S_DF_MASK, reg_val);
2689 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) \
2690 || defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2691 if (dai_sel & RT5640_U_IF3) {
2692 snd_soc_update_bits(codec, RT5640_I2S3_SDP,
2693 RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
2694 RT5640_I2S_DF_MASK, reg_val);
2700 static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai,
2701 int clk_id, unsigned int freq, int dir)
2703 struct snd_soc_codec *codec = dai->codec;
2704 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2705 unsigned int reg_val = 0;
2707 if (freq == rt5640->sysclk && clk_id == rt5640->sysclk_src)
2711 case RT5640_SCLK_S_MCLK:
2712 reg_val |= RT5640_SCLK_SRC_MCLK;
2714 case RT5640_SCLK_S_PLL1:
2715 reg_val |= RT5640_SCLK_SRC_PLL1;
2717 case RT5640_SCLK_S_RCCLK:
2718 reg_val |= RT5640_SCLK_SRC_RCCLK;
2721 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
2724 snd_soc_update_bits(codec, RT5640_GLB_CLK,
2725 RT5640_SCLK_SRC_MASK, reg_val);
2726 rt5640->sysclk = freq;
2727 rt5640->sysclk_src = clk_id;
2729 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
2735 * rt5640_pll_calc - Calcualte PLL M/N/K code.
2736 * @freq_in: external clock provided to codec.
2737 * @freq_out: target clock which codec works on.
2738 * @pll_code: Pointer to structure with M, N, K and bypass flag.
2740 * Calcualte M/N/K code to configure PLL for codec. And K is assigned to 2
2741 * which make calculation more efficiently.
2743 * Returns 0 for success or negative error code.
2745 static int rt5640_pll_calc(const unsigned int freq_in,
2746 const unsigned int freq_out, struct rt5640_pll_code *pll_code)
2748 int max_n = RT5640_PLL_N_MAX, max_m = RT5640_PLL_M_MAX;
2749 int k, n=0, m=0, red, n_t, m_t, pll_out, in_t, out_t, red_t = abs(freq_out - freq_in);
2750 bool bypass = false;
2752 if (RT5640_PLL_INP_MAX < freq_in || RT5640_PLL_INP_MIN > freq_in)
2755 k = 100000000 / freq_out - 2;
2756 if (k > RT5640_PLL_K_MAX)
2757 k = RT5640_PLL_K_MAX;
2758 for (n_t = 0; n_t <= max_n; n_t++) {
2759 in_t = freq_in / (k + 2);
2760 pll_out = freq_out / (n_t + 2);
2763 if (in_t == pll_out) {
2768 red = abs(in_t - pll_out); //m bypass
2777 for (m_t = 0; m_t <= max_m; m_t++) {
2778 out_t = in_t / (m_t + 2);
2779 red = abs(out_t - pll_out);
2790 pr_debug("Only get approximation about PLL\n");
2794 pll_code->m_bp = bypass;
2795 pll_code->m_code = m;
2796 pll_code->n_code = n;
2797 pll_code->k_code = k;
2801 static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2802 unsigned int freq_in, unsigned int freq_out)
2804 struct snd_soc_codec *codec = dai->codec;
2805 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2806 struct rt5640_pll_code pll_code;
2809 if (source == rt5640->pll_src && freq_in == rt5640->pll_in &&
2810 freq_out == rt5640->pll_out)
2813 if (!freq_in || !freq_out) {
2814 dev_dbg(codec->dev, "PLL disabled\n");
2817 rt5640->pll_out = 0;
2818 snd_soc_update_bits(codec, RT5640_GLB_CLK,
2819 RT5640_SCLK_SRC_MASK, RT5640_SCLK_SRC_MCLK);
2824 case RT5640_PLL1_S_MCLK:
2825 snd_soc_update_bits(codec, RT5640_GLB_CLK,
2826 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_MCLK);
2828 case RT5640_PLL1_S_BCLK1:
2829 case RT5640_PLL1_S_BCLK2:
2830 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) \
2831 || defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
2832 case RT5640_PLL1_S_BCLK3:
2834 dai_sel = get_sdp_info(codec, dai->id);
2837 "Failed to get sdp info: %d\n", dai_sel);
2840 if (dai_sel & RT5640_U_IF1) {
2841 snd_soc_update_bits(codec, RT5640_GLB_CLK,
2842 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK1);
2844 if (dai_sel & RT5640_U_IF2) {
2845 snd_soc_update_bits(codec, RT5640_GLB_CLK,
2846 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK2);
2848 if (dai_sel & RT5640_U_IF3) {
2849 snd_soc_update_bits(codec, RT5640_GLB_CLK,
2850 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK3);
2854 dev_err(codec->dev, "Unknown PLL source %d\n", source);
2858 ret = rt5640_pll_calc(freq_in, freq_out, &pll_code);
2860 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
2864 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n", pll_code.m_bp,
2865 (pll_code.m_bp ? 0 : pll_code.m_code), pll_code.n_code, pll_code.k_code);
2867 snd_soc_write(codec, RT5640_PLL_CTRL1,
2868 pll_code.n_code << RT5640_PLL_N_SFT | pll_code.k_code);
2869 snd_soc_write(codec, RT5640_PLL_CTRL2,
2870 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5640_PLL_M_SFT |
2871 pll_code.m_bp << RT5640_PLL_M_BP_SFT);
2873 rt5640->pll_in = freq_in;
2874 rt5640->pll_out = freq_out;
2875 rt5640->pll_src = source;
2881 * rt5640_index_show - Dump private registers.
2882 * @dev: codec device.
2883 * @attr: device attribute.
2884 * @buf: buffer for display.
2886 * To show non-zero values of all private registers.
2888 * Returns buffer length.
2890 static ssize_t rt5640_index_show(struct device *dev,
2891 struct device_attribute *attr, char *buf)
2893 struct i2c_client *client = to_i2c_client(dev);
2894 struct rt5640_priv *rt5640 = i2c_get_clientdata(client);
2895 struct snd_soc_codec *codec = rt5640->codec;
2899 cnt += sprintf(buf, "RT5640 index register\n");
2900 for (i = 0; i < 0xb4; i++) {
2901 if (cnt + RT5640_REG_DISP_LEN >= PAGE_SIZE)
2903 val = rt5640_index_read(codec, i);
2906 cnt += snprintf(buf + cnt, RT5640_REG_DISP_LEN,
2907 "%02x: %04x\n", i, val);
2910 if (cnt >= PAGE_SIZE)
2911 cnt = PAGE_SIZE - 1;
2916 static ssize_t rt5640_index_store(struct device *dev,struct device_attribute *attr, const char *buf, size_t count)
2918 struct i2c_client *client = to_i2c_client(dev);
2919 struct rt5640_priv *rt5640 = i2c_get_clientdata(client);
2920 struct snd_soc_codec *codec = rt5640->codec;
2921 unsigned int val=0,addr=0;
2924 printk("register \"%s\" count=%d\n",buf,count);
2925 for(i=0;i<count;i++) //address
2927 if(*(buf+i) <= '9' && *(buf+i)>='0')
2929 addr = (addr << 4) | (*(buf+i)-'0');
2931 else if(*(buf+i) <= 'f' && *(buf+i)>='a')
2933 addr = (addr << 4) | ((*(buf+i)-'a')+0xa);
2935 else if(*(buf+i) <= 'F' && *(buf+i)>='A')
2937 addr = (addr << 4) | ((*(buf+i)-'A')+0xa);
2945 for(i=i+1 ;i<count;i++) //val
2947 if(*(buf+i) <= '9' && *(buf+i)>='0')
2949 val = (val << 4) | (*(buf+i)-'0');
2951 else if(*(buf+i) <= 'f' && *(buf+i)>='a')
2953 val = (val << 4) | ((*(buf+i)-'a')+0xa);
2955 else if(*(buf+i) <= 'F' && *(buf+i)>='A')
2957 val = (val << 4) | ((*(buf+i)-'A')+0xa);
2965 printk("addr=0x%x val=0x%x\n",addr,val);
2966 if(addr > RT5640_VENDOR_ID2 || val > 0xffff || val < 0)
2971 printk("0x%02x = 0x%04x\n",addr,rt5640_index_read(codec, addr));
2975 rt5640_index_write(codec, addr, val);
2981 static DEVICE_ATTR(index_reg, 0444, rt5640_index_show, rt5640_index_store);
2983 static ssize_t rt5640_codec_show(struct device *dev,
2984 struct device_attribute *attr, char *buf)
2986 struct i2c_client *client = to_i2c_client(dev);
2987 struct rt5640_priv *rt5640 = i2c_get_clientdata(client);
2988 struct snd_soc_codec *codec = rt5640->codec;
2992 cnt += sprintf(buf, "RT5640 codec register\n");
2993 for (i = 0; i <= RT5640_VENDOR_ID2; i++) {
2994 if (cnt + RT5640_REG_DISP_LEN >= PAGE_SIZE)
2996 val = codec->hw_read(codec, i);
2999 cnt += snprintf(buf + cnt, RT5640_REG_DISP_LEN,
3000 "#rng%02x #rv%04x #rd0\n", i, val);
3003 if (cnt >= PAGE_SIZE)
3004 cnt = PAGE_SIZE - 1;
3009 static ssize_t rt5640_codec_store(struct device *dev,struct device_attribute *attr, const char *buf, size_t count)
3011 struct i2c_client *client = to_i2c_client(dev);
3012 struct rt5640_priv *rt5640 = i2c_get_clientdata(client);
3013 struct snd_soc_codec *codec = rt5640->codec;
3014 unsigned int val=0,addr=0;
3017 printk("register \"%s\" count=%d\n",buf,count);
3018 for(i=0;i<count;i++) //address
3020 if(*(buf+i) <= '9' && *(buf+i)>='0')
3022 addr = (addr << 4) | (*(buf+i)-'0');
3024 else if(*(buf+i) <= 'f' && *(buf+i)>='a')
3026 addr = (addr << 4) | ((*(buf+i)-'a')+0xa);
3028 else if(*(buf+i) <= 'F' && *(buf+i)>='A')
3030 addr = (addr << 4) | ((*(buf+i)-'A')+0xa);
3038 for(i=i+1 ;i<count;i++) //val
3040 if(*(buf+i) <= '9' && *(buf+i)>='0')
3042 val = (val << 4) | (*(buf+i)-'0');
3044 else if(*(buf+i) <= 'f' && *(buf+i)>='a')
3046 val = (val << 4) | ((*(buf+i)-'a')+0xa);
3048 else if(*(buf+i) <= 'F' && *(buf+i)>='A')
3050 val = (val << 4) | ((*(buf+i)-'A')+0xa);
3058 printk("addr=0x%x val=0x%x\n",addr,val);
3059 if(addr > RT5640_VENDOR_ID2 || val > 0xffff || val < 0)
3064 printk("0x%02x = 0x%04x\n",addr,codec->hw_read(codec, addr));
3068 snd_soc_write(codec, addr, val);
3075 static DEVICE_ATTR(codec_reg, 0666, rt5640_codec_show, rt5640_codec_store);
3077 static int rt5640_set_bias_level(struct snd_soc_codec *codec,
3078 enum snd_soc_bias_level level)
3081 case SND_SOC_BIAS_ON:
3084 case SND_SOC_BIAS_PREPARE:
3085 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
3086 RT5640_PWR_MB1 | RT5640_PWR_MB2,
3087 RT5640_PWR_MB1 | RT5640_PWR_MB2);
3090 case SND_SOC_BIAS_STANDBY:
3091 snd_soc_update_bits(codec, RT5640_PWR_ANLG2,
3092 RT5640_PWR_MB1 | RT5640_PWR_MB2, 0);
3093 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
3094 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
3095 RT5640_PWR_VREF1 | RT5640_PWR_MB |
3096 RT5640_PWR_BG | RT5640_PWR_VREF2,
3097 RT5640_PWR_VREF1 | RT5640_PWR_MB |
3098 RT5640_PWR_BG | RT5640_PWR_VREF2);
3100 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
3101 RT5640_PWR_FV1 | RT5640_PWR_FV2,
3102 RT5640_PWR_FV1 | RT5640_PWR_FV2);
3103 snd_soc_write(codec, RT5640_GEN_CTRL1, 0x3701);
3104 codec->cache_only = false;
3105 codec->cache_sync = 1;
3106 snd_soc_cache_sync(codec);
3107 rt5640_index_sync(codec);
3111 case SND_SOC_BIAS_OFF:
3112 snd_soc_write(codec, RT5640_DEPOP_M1, 0x0004);
3113 snd_soc_write(codec, RT5640_DEPOP_M2, 0x1100);
3114 snd_soc_write(codec, RT5640_GEN_CTRL1, 0x3700);
3115 snd_soc_write(codec, RT5640_PWR_DIG1, 0x0000);
3116 snd_soc_write(codec, RT5640_PWR_DIG2, 0x0000);
3117 snd_soc_write(codec, RT5640_PWR_VOL, 0x0000);
3118 snd_soc_write(codec, RT5640_PWR_MIXER, 0x0000);
3119 snd_soc_write(codec, RT5640_PWR_ANLG1, 0x0000);
3120 snd_soc_write(codec, RT5640_PWR_ANLG2, 0x0000);
3126 codec->dapm.bias_level = level;
3131 static int rt5640_probe(struct snd_soc_codec *codec)
3133 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
3136 pr_info("Codec driver version %s\n", VERSION);
3138 ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C);
3140 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
3144 rt5640_reset(codec);
3145 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
3146 RT5640_PWR_VREF1 | RT5640_PWR_MB |
3147 RT5640_PWR_BG | RT5640_PWR_VREF2,
3148 RT5640_PWR_VREF1 | RT5640_PWR_MB |
3149 RT5640_PWR_BG | RT5640_PWR_VREF2);
3151 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
3152 RT5640_PWR_FV1 | RT5640_PWR_FV2,
3153 RT5640_PWR_FV1 | RT5640_PWR_FV2);
3155 if (rt5640->dmic_en == RT5640_DMIC1) {
3156 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
3157 RT5640_GP2_PIN_MASK, RT5640_GP2_PIN_DMIC1_SCL);
3158 snd_soc_update_bits(codec, RT5640_DMIC,
3159 RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK,
3160 RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING);
3161 } else if (rt5640->dmic_en == RT5640_DMIC2) {
3162 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
3163 RT5640_GP2_PIN_MASK, RT5640_GP2_PIN_DMIC1_SCL);
3164 snd_soc_update_bits(codec, RT5640_DMIC,
3165 RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK,
3166 RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING);
3168 snd_soc_write(codec, RT5640_GEN_CTRL2, 0x4040);
3169 ret = snd_soc_read(codec, RT5640_VENDOR_ID);
3170 printk("read 0x%x=0x%x\n",RT5640_VENDOR_ID,ret);
3172 snd_soc_update_bits(codec, RT5640_JD_CTRL,
3173 RT5640_JD1_IN4P_MASK | RT5640_JD2_IN4N_MASK,
3174 RT5640_JD1_IN4P_EN | RT5640_JD2_IN4N_EN);
3176 rt5640_reg_init(codec);
3177 DC_Calibrate(codec);
3178 codec->dapm.bias_level = SND_SOC_BIAS_STANDBY;
3179 rt5640->codec = codec;
3181 snd_soc_add_codec_controls(codec, rt5640_snd_controls,
3182 ARRAY_SIZE(rt5640_snd_controls));
3183 snd_soc_dapm_new_controls(&codec->dapm, rt5640_dapm_widgets,
3184 ARRAY_SIZE(rt5640_dapm_widgets));
3185 snd_soc_dapm_add_routes(&codec->dapm, rt5640_dapm_routes,
3186 ARRAY_SIZE(rt5640_dapm_routes));
3188 #if defined(CONFIG_SND_SOC_RT5642_MODULE) || defined(CONFIG_SND_SOC_RT5642)
3189 rt5640->dsp_sw = RT5640_DSP_AEC_NS_FENS;
3190 rt5640_dsp_probe(codec);
3194 #if defined(CONFIG_SND_HWDEP) || defined(CONFIG_SND_HWDEP_MODULE)
3195 struct rt56xx_ops *ioctl_ops = rt56xx_get_ioctl_ops();
3196 ioctl_ops->index_write = rt5640_index_write;
3197 ioctl_ops->index_read = rt5640_index_read;
3198 ioctl_ops->index_update_bits = rt5640_index_update_bits;
3199 ioctl_ops->ioctl_common = rt5640_ioctl_common;
3200 rt56xx_ce_init_hwdep(codec);
3204 ret = device_create_file(codec->dev, &dev_attr_index_reg);
3207 "Failed to create index_reg sysfs files: %d\n", ret);
3211 ret = device_create_file(codec->dev, &dev_attr_codec_reg);
3214 "Failed to create codex_reg sysfs files: %d\n", ret);
3221 static int rt5640_remove(struct snd_soc_codec *codec)
3223 rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
3228 static int rt5640_suspend(struct snd_soc_codec *codec)
3230 #if defined(CONFIG_SND_SOC_RT5642_MODULE) || defined(CONFIG_SND_SOC_RT5642)
3231 /* After opening LDO of DSP, then close LDO of codec.
3232 * (1) DSP LDO power on
3233 * (2) DSP core power off
3234 * (3) DSP IIS interface power off
3235 * (4) Toggle pin of codec LDO1 to power off
3237 rt5640_dsp_suspend(codec);
3239 rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
3243 static int rt5640_resume(struct snd_soc_codec *codec)
3245 rt5640_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
3246 #if defined(CONFIG_SND_SOC_RT5642_MODULE) || defined(CONFIG_SND_SOC_RT5642)
3247 /* After opening LDO of codec, then close LDO of DSP. */
3248 rt5640_dsp_resume(codec);
3253 #define rt5640_suspend NULL
3254 #define rt5640_resume NULL
3257 #define RT5640_STEREO_RATES SNDRV_PCM_RATE_8000_96000
3258 #define RT5640_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
3259 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
3261 struct snd_soc_dai_ops rt5640_aif_dai_ops = {
3262 .hw_params = rt5640_hw_params,
3263 .prepare = rt5640_prepare,
3264 .set_fmt = rt5640_set_dai_fmt,
3265 .set_sysclk = rt5640_set_dai_sysclk,
3266 .set_pll = rt5640_set_dai_pll,
3269 struct snd_soc_dai_driver rt5640_dai[] = {
3271 .name = "rt5640-aif1",
3274 .stream_name = "AIF1 Playback",
3277 .rates = RT5640_STEREO_RATES,
3278 .formats = RT5640_FORMATS,
3281 .stream_name = "AIF1 Capture",
3284 .rates = RT5640_STEREO_RATES,
3285 .formats = RT5640_FORMATS,
3287 .ops = &rt5640_aif_dai_ops,
3290 .name = "rt5640-aif2",
3293 .stream_name = "AIF2 Playback",
3296 .rates = RT5640_STEREO_RATES,
3297 .formats = RT5640_FORMATS,
3300 .stream_name = "AIF2 Capture",
3303 .rates = RT5640_STEREO_RATES,
3304 .formats = RT5640_FORMATS,
3306 .ops = &rt5640_aif_dai_ops,
3308 #if defined(CONFIG_SND_SOC_RT5643_MODULE) || defined(CONFIG_SND_SOC_RT5643) \
3309 || defined(CONFIG_SND_SOC_RT5646_MODULE) || defined(CONFIG_SND_SOC_RT5646)
3311 .name = "rt5640-aif3",
3314 .stream_name = "AIF3 Playback",
3317 .rates = RT5640_STEREO_RATES,
3318 .formats = RT5640_FORMATS,
3321 .stream_name = "AIF3 Capture",
3324 .rates = RT5640_STEREO_RATES,
3325 .formats = RT5640_FORMATS,
3327 .ops = &rt5640_aif_dai_ops,
3332 static struct snd_soc_codec_driver soc_codec_dev_rt5640 = {
3333 .probe = rt5640_probe,
3334 .remove = rt5640_remove,
3335 .suspend = rt5640_suspend,
3336 .resume = rt5640_resume,
3337 .set_bias_level = rt5640_set_bias_level,
3338 .reg_cache_size = RT5640_VENDOR_ID2 + 1,
3339 .reg_word_size = sizeof(u16),
3340 .reg_cache_default = rt5640_reg,
3341 .volatile_register = rt5640_volatile_register,
3342 .readable_register = rt5640_readable_register,
3343 .reg_cache_step = 1,
3346 static const struct i2c_device_id rt5640_i2c_id[] = {
3350 MODULE_DEVICE_TABLE(i2c, rt5640_i2c_id);
3352 static int rt5640_i2c_probe(struct i2c_client *i2c,
3353 const struct i2c_device_id *id)
3355 struct rt5640_priv *rt5640;
3358 rt5640 = kzalloc(sizeof(struct rt5640_priv), GFP_KERNEL);
3362 i2c_set_clientdata(i2c, rt5640);
3364 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5640,
3365 rt5640_dai, ARRAY_SIZE(rt5640_dai));
3372 static int rt5640_i2c_remove(struct i2c_client *i2c)
3374 snd_soc_unregister_codec(&i2c->dev);
3375 kfree(i2c_get_clientdata(i2c));
3379 static void rt5640_i2c_shutdown(struct i2c_client *client)
3381 struct rt5640_priv *rt5640 = i2c_get_clientdata(client);
3382 struct snd_soc_codec *codec = rt5640->codec;
3385 rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
3389 struct i2c_driver rt5640_i2c_driver = {
3392 .owner = THIS_MODULE,
3394 .probe = rt5640_i2c_probe,
3395 .remove = rt5640_i2c_remove,
3396 .shutdown = rt5640_i2c_shutdown,
3397 .id_table = rt5640_i2c_id,
3400 static int __init rt5640_modinit(void)
3402 return i2c_add_driver(&rt5640_i2c_driver);
3404 module_init(rt5640_modinit);
3406 static void __exit rt5640_modexit(void)
3408 i2c_del_driver(&rt5640_i2c_driver);
3410 module_exit(rt5640_modexit);
3412 MODULE_DESCRIPTION("ASoC RT5640 driver");
3413 MODULE_AUTHOR("Johnny Hsu <johnnyhsu@realtek.com>");
3414 MODULE_LICENSE("GPL");