4cd004fa9450347d20730f29aafd2bb19e2cc76b
[firefly-linux-kernel-4.4.55.git] / sound / soc / codecs / rt5631.c
1 /*
2  * rt5631.c  --  RT5631 ALSA Soc Audio driver
3  *
4  * Copyright 2011 Realtek Microelectronics
5  *
6  * Author: flove <flove@realtek.com>
7  *
8  * Based on WM8753.c
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License version 2 as
12  * published by the Free Software Foundation.
13  *
14  */
15 #include <linux/module.h>
16 #include <linux/moduleparam.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/pm.h>
20 #include <linux/i2c.h>
21 #include <linux/platform_device.h>
22 #include <linux/spi/spi.h>
23 #include <sound/core.h>
24 #include <sound/pcm.h>
25 #include <sound/pcm_params.h>
26 #include <sound/soc.h>
27 #include <sound/soc-dapm.h>
28 #include <sound/initval.h>
29 #include <sound/tlv.h>
30 #include "rt5631.h"
31 #include <linux/timer.h>
32
33 #if 0
34 #define DBG(x...)       printk(x)
35 #else
36 #define DBG(x...)
37 #endif
38 /*
39 1.0.25
40      add support sample rate up to 192k
41 */
42 #define RT5631_VERSION "0.01 alsa 1.0.25"
43
44 #define RT5631_ALC_DAC_FUNC_ENA 0       //ALC functio for DAC
45 #define RT5631_ALC_ADC_FUNC_ENA 0       //ALC function for ADC
46 #define RT5631_SPK_TIMER        1       //if enable this, MUST enable RT5631_EQ_FUNC_ENA first!
47
48 struct rt5631_priv {
49         int codec_version;
50         int master;
51         int sysclk;
52         int dmic_used_flag;
53         int eq_mode;
54         int pll_used_flag;
55 };
56 #if (RT5631_SPK_TIMER == 1)
57 static struct timer_list spk_timer;
58 struct work_struct  spk_work;
59 //static bool last_is_spk = false;      // need modify.
60 static int last_is_spk = -1;    //bard 9-13
61 #endif
62
63 static struct snd_soc_codec *rt5631_codec;
64 struct delayed_work rt5631_delay_cap; //bard 7-16
65 EXPORT_SYMBOL(rt5631_delay_cap); //bard 7-16
66 static const u16 rt5631_reg[0x80];
67 static int timesofbclk = 32;
68 bool isPlaybackon = false, isCaptureon = false;
69
70 module_param(timesofbclk, int, S_IRUSR | S_IWUSR | S_IRGRP | S_IROTH);
71 MODULE_PARM_DESC(timeofbclk, "relationship between bclk and fs");
72
73 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -9435, 37, 0);
74 static inline int rt5631_write(struct snd_soc_codec *codec,
75                         unsigned int reg, unsigned int val)
76 {
77         return snd_soc_write(codec, reg, val);
78 }
79
80 static inline unsigned int rt5631_read(struct snd_soc_codec *codec,
81                                 unsigned int reg)
82 {
83         return snd_soc_read(codec, reg);
84 }
85
86 static int rt5631_write_mask(struct snd_soc_codec *codec,
87         unsigned int reg, unsigned int value, unsigned int mask)
88 {
89         unsigned int reg_val;
90         int ret = 0;
91
92         if (!mask)
93                 return 0;
94
95         if (mask != 0xffff) {
96                 reg_val = rt5631_read(codec, reg);
97                 reg_val &= ~mask;
98                 reg_val |= (value & mask);
99                 ret = rt5631_write(codec, reg, reg_val);
100         } else {
101                 ret = rt5631_write(codec, reg, value);
102         }
103
104         return ret;
105 }
106
107 static void rt5631_write_index(struct snd_soc_codec *codec,
108                 unsigned int reg, unsigned int value)
109 {
110         rt5631_write(codec, RT5631_INDEX_ADD, reg);
111         rt5631_write(codec, RT5631_INDEX_DATA, value);
112         return;
113 }
114
115 static unsigned int rt5631_read_index(struct snd_soc_codec *codec,
116                                 unsigned int reg)
117 {
118         unsigned int value;
119
120         rt5631_write(codec, RT5631_INDEX_ADD, reg);
121         value = rt5631_read(codec, RT5631_INDEX_DATA);
122
123         return value;
124 }
125
126 static void rt5631_write_index_mask(struct snd_soc_codec *codec,
127         unsigned int reg, unsigned int value, unsigned int mask)
128 {
129         unsigned int reg_val;
130
131         if (!mask)
132                 return;
133
134         if (mask != 0xffff) {
135                 reg_val = rt5631_read_index(codec, reg);
136                 reg_val &= ~mask;
137                 reg_val |= (value & mask);
138                 rt5631_write_index(codec, reg, reg_val);
139         } else {
140                 rt5631_write_index(codec, reg, value);
141         }
142
143         return;
144 }
145
146 static inline int rt5631_reset(struct snd_soc_codec *codec)
147 {
148         return snd_soc_write(codec, RT5631_RESET, 0);
149 }
150
151 struct rt5631_init_reg {
152         u8 reg;
153         u16 val;
154 };
155
156 #ifndef DEF_VOL
157 #define DEF_VOL                                 0xd4//0xd4 -30dB 0xc0 0dB
158 #endif
159 #ifndef DEF_VOL_SPK
160 #define DEF_VOL_SPK                             0xc4
161 #endif
162
163 /*
164  * speaker channel volume select SPKMIXER, 0DB by default
165  * Headphone channel volume select OUTMIXER,0DB by default
166  * AXO1/AXO2 channel volume select OUTMIXER,0DB by default
167  * Record Mixer source from Mic1/Mic2 by default
168  * Mic1/Mic2 boost 40dB by default
169  * DAC_L-->OutMixer_L by default
170  * DAC_R-->OutMixer_R by default
171  * DAC-->SpeakerMixer
172  * Speaker volume-->SPOMixer(L-->L,R-->R)
173  * Speaker AMP ratio gain is 1.44X
174  * HP from OutMixer,speaker out from SpeakerOut Mixer
175  * enable HP zero cross
176  * change Mic1 & mic2 to differential mode
177  */
178 static struct rt5631_init_reg init_list[] = {
179
180         {RT5631_SPK_OUT_VOL             , (DEF_VOL_SPK<<8) | DEF_VOL_SPK},//speaker channel volume select SPKMIXER,0DB by default
181         {RT5631_HP_OUT_VOL              , (DEF_VOL<<8) | DEF_VOL},//Headphone channel volume select OUTMIXER,0DB by default
182         {RT5631_MONO_AXO_1_2_VOL        , 0xE0c0},//AXO1/AXO2 channel volume select OUTMIXER,0DB by default
183         //{RT5631_STEREO_DAC_VOL_1      , 0x004C},
184         {RT5631_STEREO_DAC_VOL_2        , 0x0303},
185         {RT5631_ADC_REC_MIXER           , 0xb0f0},//Record Mixer source from Mic1 by default
186         {RT5631_ADC_CTRL_1              , 0x0004},//STEREO ADC CONTROL 1
187         {RT5631_MIC_CTRL_2              , 0x4400},//0x8800},//0x6600}, //Mic1/Mic2 boost 40DB by default
188         {RT5631_PWR_MANAG_ADD1          , 0x93e0},
189         {RT5631_SDP_CTRL        , 0x8002},
190         //increase hpo charge pump VEE
191         {RT5631_INDEX_ADD                       , 0x45},
192         {RT5631_INDEX_DATA                      , 0x6530},
193         
194 #if RT5631_ALC_ADC_FUNC_ENA     
195
196         {RT5631_ALC_CTRL_1              , 0x060a},//ALC CONTROL 1
197         {RT5631_ALC_CTRL_2              , 0x0002},//ALC CONTROL 2
198         {RT5631_ALC_CTRL_3              , 0xe088},//ALC CONTROL 3
199         
200 #endif  
201         {RT5631_OUTMIXER_L_CTRL         , 0xdfC0},//DAC_L-->OutMixer_L by default
202         {RT5631_OUTMIXER_R_CTRL         , 0xdfC0},//DAC_R-->OutMixer_R by default
203         {RT5631_AXO1MIXER_CTRL          , 0x8840},//OutMixer_L-->AXO1Mixer by default
204         {RT5631_AXO2MIXER_CTRL          , 0x8880},//OutMixer_R-->AXO2Mixer by default
205         {RT5631_SPK_MIXER_CTRL          , 0xd8d8},//DAC-->SpeakerMixer
206         {RT5631_SPK_MONO_OUT_CTRL       , 0x0c00},//Speaker volume-->SPOMixer(L-->L,R-->R)      
207         {RT5631_GEN_PUR_CTRL_REG        , 0x4e00},//Speaker AMP ratio gain is 1.27x
208 #if defined(CONFIG_ADJUST_VOL_BY_CODEC)
209         {RT5631_SPK_MONO_HP_OUT_CTRL    , 0x0000},//HP from outputmixer,speaker out from SpeakerOut Mixer       
210 #else
211         {RT5631_SPK_MONO_HP_OUT_CTRL    , 0x000c},//HP from DAC,speaker out from SpeakerOut Mixer
212 #endif
213         {RT5631_DEPOP_FUN_CTRL_2        , 0x8000},//HP depop by register control        
214         {RT5631_INT_ST_IRQ_CTRL_2       , 0x0f18},//enable HP zero cross        
215         {RT5631_MIC_CTRL_1              , 0x8000},//set mic 1 to differnetial mode
216         {RT5631_GPIO_CTRL               , 0x0000},//set GPIO to input pin       
217 //      {RT5631_JACK_DET_CTRL           , 0x4e80},//Jack detect for GPIO,high is HP,low is speaker      
218         {RT5631_JACK_DET_CTRL           , 0x4bc0},//Jack detect for GPIO,high is speaker,low is hp      
219 };
220 #define RT5631_INIT_REG_LEN ARRAY_SIZE(init_list)
221
222 /*
223  * EQ parameter
224  */
225 enum {
226         NORMAL,
227         CLUB,
228         DANCE,
229         LIVE,
230         POP,
231         ROCK,
232         OPPO,
233         TREBLE,
234         BASS,
235         HFREQ,  
236         SPK_FR  
237 };
238
239 struct hw_eq_preset {
240         u16 type;
241         u16 value[22];
242         u16 ctrl;
243 };
244
245 /*
246  * EQ param reg : 0x0, 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7,
247  *              0x8, 0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf
248  * EQ control reg : 0x6e
249  */
250 struct hw_eq_preset hweq_preset[] = {
251         {NORMAL , {0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
252                 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
253                 0x0000, 0x0000, 0x0000, 0x0000}, 0x0000},
254         {CLUB   , {0x1C10, 0x0000, 0xC1CC, 0x1E5D, 0x0699, 0xCD48,
255                 0x188D, 0x0699, 0xC3B6, 0x1CD0, 0x0699, 0x0436,
256                 0x0000, 0x0000, 0x0000, 0x0000}, 0x000E},
257         {DANCE  , {0x1F2C, 0x095B, 0xC071, 0x1F95, 0x0616, 0xC96E,
258                 0x1B11, 0xFC91, 0xDCF2, 0x1194, 0xFAF2, 0x0436,
259                 0x0000, 0x0000, 0x0000, 0x0000}, 0x000F},
260         {LIVE   , {0x1EB5, 0xFCB6, 0xC24A, 0x1DF8, 0x0E7C, 0xC883,
261                 0x1C10, 0x0699, 0xDA41, 0x1561, 0x0295, 0x0436,
262                 0x0000, 0x0000, 0x0000, 0x0000}, 0x000F},
263         {POP    , {0x1EB5, 0xFCB6, 0xC1D4, 0x1E5D, 0x0E23, 0xD92E,
264                 0x16E6, 0xFCB6, 0x0000, 0x0969, 0xF988, 0x0436,
265                 0x0000, 0x0000, 0x0000, 0x0000}, 0x000F},
266         {ROCK   , {0x1EB5, 0xFCB6, 0xC071, 0x1F95, 0x0424, 0xC30A,
267                 0x1D27, 0xF900, 0x0C5D, 0x0FC7, 0x0E23, 0x0436,
268                 0x0000, 0x0000, 0x0000, 0x0000}, 0x000F},
269         {OPPO   , {0x0000, 0x0000, 0xCA4A, 0x17F8, 0x0FEC, 0xCA4A,
270                 0x17F8, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
271                 0x0000, 0x0000, 0x0000, 0x0000}, 0x000F},
272         {TREBLE , {0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
273                 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x188D,
274                 0x1699, 0x0000, 0x0000, 0x0000}, 0x0010},
275         {BASS   , {0x1A43, 0x0C00, 0x0000, 0x0000, 0x0000, 0x0000,
276                 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
277                 0x0000, 0x0000, 0x0000, 0x0000}, 0x0001},
278         //      {HFREQ, {0x1BBC,0x0000,0xC9A4,0x1BBC,0x0000,0x2997,0x142D,0xFCB6,0xEF01,0x1BBC,0x0000,0xE835,0x0FEC,0xC66E,0x1A29,0x1CEE},0x0014},//orig
279         //{HFREQ, {0x1BBC,0x0000,0xC9A4,0x1BBC,0x0000,0x2997,0x142D,0xFCB6,0x1E97,0x08AC,0xFCB6,0xEEA6,0x095B,0xC66E,0x1A29,0x1CEE},0x0018},//roy 20120904 
280         {HFREQ, {0x1FBC,0x1D18,0x11C1,0x0B2B,0xFF1B,0x1F8D,0x09F3,0xFB54,0xEF01,0x1BBC,0x0000,0xE835,0x2298,0xC66E,0x1A29,0x1CEE},0x0014},//roy 20120914 
281         {SPK_FR,{0x1DE4,0xF405,0xC306,0x1D60,0x01F3,0x07CA,0x12AF,0xF805,0xE904,0x1C10,0x0000,0x1C8B,0x0000,0xc5e1,0x1afb,0x1d46},0x0003},
282 };
283
284 static int rt5631_reg_init(struct snd_soc_codec *codec)
285 {
286         int i;
287
288         for (i = 0; i < RT5631_INIT_REG_LEN; i++)
289                 rt5631_write(codec, init_list[i].reg, init_list[i].val);
290
291         return 0;
292 }
293 //bard 7-16 s
294 void rt5631_adc_on(struct work_struct *work)
295 {
296         int val;
297
298         val = snd_soc_read(rt5631_codec,RT5631_ADC_REC_MIXER);
299         snd_soc_write(rt5631_codec,RT5631_ADC_REC_MIXER,0xf0f0);
300
301         snd_soc_update_bits(rt5631_codec, RT5631_PWR_MANAG_ADD1,
302                 PWR_ADC_L_CLK | PWR_ADC_R_CLK, 0);
303         snd_soc_update_bits(rt5631_codec, RT5631_PWR_MANAG_ADD1,
304                 PWR_ADC_L_CLK | PWR_ADC_R_CLK,
305                 PWR_ADC_L_CLK | PWR_ADC_R_CLK);
306         snd_soc_write(rt5631_codec,RT5631_ADC_REC_MIXER,val);
307         snd_soc_update_bits(rt5631_codec, RT5631_ADC_CTRL_1,
308                                 RT_L_MUTE|RT_R_MUTE,0x0);
309
310 }
311 //bard 7-16 e
312 static const char *rt5631_spol_source_sel[] = {
313         "SPOLMIX", "MONOIN_RX", "VDAC", "DACL"};
314 static const char *rt5631_spor_source_sel[] = {
315         "SPORMIX", "MONOIN_RX", "VDAC", "DACR"};
316 static const char *rt5631_mono_source_sel[] = {"MONOMIX", "MONOIN_RX", "VDAC"};
317 static const char *rt5631_input_mode_source_sel[] = {
318         "Single-end", "Differential"};
319 static const char *rt5631_mic_boost[] = {"Bypass", "+20db", "+24db", "+30db",
320                         "+35db", "+40db", "+44db", "+50db", "+52db"};
321 static const char *rt5631_hpl_source_sel[] = {"LEFT HPVOL", "LEFT DAC"};
322 static const char *rt5631_hpr_source_sel[] = {"RIGHT HPVOL", "RIGHT DAC"};
323 static const char *rt5631_eq_sel[] = {"NORMAL", "CLUB", "DANCE", "LIVE", "POP",
324                                 "ROCK", "OPPO", "TREBLE", "BASS"};
325
326
327 static const struct soc_enum rt5631_enum[] = {
328 SOC_ENUM_SINGLE(RT5631_SPK_MONO_HP_OUT_CTRL, 14, 4, rt5631_spol_source_sel),
329 SOC_ENUM_SINGLE(RT5631_SPK_MONO_HP_OUT_CTRL, 10, 4, rt5631_spor_source_sel),
330 SOC_ENUM_SINGLE(RT5631_SPK_MONO_HP_OUT_CTRL, 6, 3, rt5631_mono_source_sel),
331 SOC_ENUM_SINGLE(RT5631_MIC_CTRL_1, 15, 2,  rt5631_input_mode_source_sel),
332 SOC_ENUM_SINGLE(RT5631_MIC_CTRL_1, 7, 2,  rt5631_input_mode_source_sel),
333 SOC_ENUM_SINGLE(RT5631_MONO_INPUT_VOL, 15, 2, rt5631_input_mode_source_sel),
334 SOC_ENUM_SINGLE(RT5631_MIC_CTRL_2, 12, 9, rt5631_mic_boost),
335 SOC_ENUM_SINGLE(RT5631_MIC_CTRL_2, 8, 9, rt5631_mic_boost),
336 SOC_ENUM_SINGLE(RT5631_SPK_MONO_HP_OUT_CTRL, 3, 2, rt5631_hpl_source_sel),
337 SOC_ENUM_SINGLE(RT5631_SPK_MONO_HP_OUT_CTRL, 2, 2, rt5631_hpr_source_sel),
338 SOC_ENUM_SINGLE(0, 4, 9, rt5631_eq_sel),
339 };
340
341 static int rt5631_dmic_get(struct snd_kcontrol *kcontrol,
342                 struct snd_ctl_elem_value *ucontrol)
343 {
344         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
345         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
346
347         ucontrol->value.integer.value[0] = rt5631->dmic_used_flag;
348
349         return 0;
350 }
351
352 static void rt5631_close_dmic(struct snd_soc_codec *codec)
353 {
354         rt5631_write_mask(codec, RT5631_DIG_MIC_CTRL,
355                 DMIC_L_CH_MUTE | DMIC_R_CH_MUTE,
356                 DMIC_L_CH_MUTE_MASK | DMIC_R_CH_MUTE_MASK);
357         rt5631_write_mask(codec, RT5631_DIG_MIC_CTRL,
358                 DMIC_DIS, DMIC_ENA_MASK);
359         return;
360 }
361
362 static int rt5631_dmic_put(struct snd_kcontrol *kcontrol,
363                 struct snd_ctl_elem_value *ucontrol)
364 {
365         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
366         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
367
368         if (rt5631->dmic_used_flag == ucontrol->value.integer.value[0])
369                 return 0;
370
371         if (ucontrol->value.integer.value[0]) {
372                 rt5631->dmic_used_flag = 1;
373         } else {
374                 rt5631_close_dmic(codec);
375                 rt5631->dmic_used_flag = 0;
376         }
377
378         return 0;
379 }
380
381 static int rt5631_eq_sel_get(struct snd_kcontrol *kcontrol,
382                 struct snd_ctl_elem_value *ucontrol)
383 {
384         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
385         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
386
387         ucontrol->value.integer.value[0] = rt5631->eq_mode;
388
389         return 0;
390 }
391
392 static void rt5631_update_eqmode(struct snd_soc_codec *codec, int mode)
393 {
394         int i;
395
396         DBG("enter rt5631_update_eqmode=========\n");
397         if (NORMAL == mode) {
398                 /* In Normal mode, the EQ parameter is cleared,
399                  * and hardware LP, BP1, BP2, BP3, HP1, HP2
400                  * block control and EQ block are disabled.
401                  */
402                 for (i = RT5631_EQ_BW_LOP; i <= RT5631_EQ_HPF_GAIN; i++)
403                         rt5631_write_index(codec, i,
404                                 hweq_preset[mode].value[i]);
405                 rt5631_write_mask(codec, RT5631_EQ_CTRL, 0x0000, 0x003f);
406                 rt5631_write_index_mask(codec, RT5631_EQ_PRE_VOL_CTRL
407                                                 , 0x0000, 0x8000);
408         } else {
409                 /* Fill and update EQ parameter,
410                  * and EQ block are enabled.
411                  */
412                 rt5631_write_index_mask(codec, RT5631_EQ_PRE_VOL_CTRL
413                                                 , 0x8000, 0x8000);
414                 rt5631_write(codec, RT5631_EQ_CTRL,
415                         hweq_preset[mode].ctrl);
416                 for (i = RT5631_EQ_BW_LOP; i <= RT5631_EQ_HPF_GAIN; i++)
417                         rt5631_write_index(codec, i,
418                                 hweq_preset[mode].value[i]);
419                 rt5631_write_mask(codec, RT5631_EQ_CTRL, 0x4000, 0x4000);
420         }
421
422         return;
423 }
424
425 static int rt5631_eq_sel_put(struct snd_kcontrol *kcontrol,
426                 struct snd_ctl_elem_value *ucontrol)
427 {
428         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
429         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
430
431         if (rt5631->eq_mode == ucontrol->value.integer.value[0])
432                 return 0;
433
434         rt5631_update_eqmode(codec, ucontrol->value.enumerated.item[0]);
435         rt5631->eq_mode = ucontrol->value.integer.value[0];
436
437         return 0;
438 }
439
440 #if (RT5631_SPK_TIMER == 1)
441 static void spk_work_handler(struct work_struct *work)
442 {
443         struct snd_soc_codec *codec = rt5631_codec;
444         int is_spk = (rt5631_read(codec, 0x4a)) & 0x04; //detect rt5631 reg4a[3], 1'b:SPK, 0'b:HP ; //bard 9-13
445         //if(last_is_spk != is_spk)
446         //      printk("%s---%s is in use.last is %s in use\n", __FUNCTION__,is_spk?"speaker":"headphone",last_is_spk?"speaker":"headphone");
447         //printk("last_is_spk=%d is_spk=%d\n",last_is_spk,is_spk);
448         if(is_spk && (last_is_spk != is_spk)){
449                 rt5631_write_index_mask(codec,0x11,0x0000,0x0007);      //0db
450                 rt5631_write_index(codec,0x12,0x0003);                  //0db
451                 rt5631_update_eqmode(codec, SPK_FR);            // SPK is in use, enable EQ mode of SPK_FR.
452         
453
454         }else if(!is_spk && (last_is_spk != is_spk)){
455         //flove071311   rt5631_update_eqmode(codec, NORMAL);            // HP is in use, enable EQ mode of NORMAL.
456                 rt5631_write_index_mask(codec,0x11,0x0002,0x0003);
457                 rt5631_write_index(codec,0x12,0x0007);  
458                 rt5631_update_eqmode(codec,HFREQ);              
459         }
460         last_is_spk = is_spk;
461 }
462
463 /* timer to judge SPK or HP in use, and handle EQ issues accordingly. */
464 void spk_timer_callback(unsigned long data )
465 {       
466         int ret = 0;
467
468         schedule_work(&spk_work);
469
470         //DBG("Starting timer to fire in 1000ms (%ld)\n", jiffies );
471   ret = mod_timer(&spk_timer, jiffies + msecs_to_jiffies(1000));
472   if (ret) printk("Error in mod_timer\n");
473 }
474 #endif
475
476 static const struct snd_kcontrol_new rt5631_snd_controls[] = {
477 SOC_ENUM("MIC1 Mode Control",  rt5631_enum[3]),
478 SOC_ENUM("MIC1 Boost", rt5631_enum[6]),
479 SOC_ENUM("MIC2 Mode Control", rt5631_enum[4]),
480 SOC_ENUM("MIC2 Boost", rt5631_enum[7]),
481 SOC_ENUM("MONOIN Mode Control", rt5631_enum[5]),
482 SOC_DOUBLE_TLV("PCM Playback Volume", RT5631_STEREO_DAC_VOL_2, 8, 0, 255, 1, dac_vol_tlv),
483 SOC_DOUBLE("PCM Playback Switch", RT5631_STEREO_DAC_VOL_1, 15, 7, 1, 1),
484 SOC_DOUBLE("MONOIN_RX Capture Volume", RT5631_MONO_INPUT_VOL, 8, 0, 31, 1),
485 SOC_DOUBLE("AXI Capture Volume", RT5631_AUX_IN_VOL, 8, 0, 31, 1),
486 SOC_SINGLE("AXO1 Playback Switch", RT5631_MONO_AXO_1_2_VOL, 15, 1, 1),
487 SOC_SINGLE("AXO2 Playback Switch", RT5631_MONO_AXO_1_2_VOL, 7, 1, 1),
488 SOC_DOUBLE("OUTVOL Playback Volume", RT5631_MONO_AXO_1_2_VOL, 8, 0, 31, 1),
489 SOC_DOUBLE("Speaker Playback Switch", RT5631_SPK_OUT_VOL, 15, 7, 1, 1),
490 SOC_DOUBLE("Speaker Playback Volume", RT5631_SPK_OUT_VOL, 8, 0, 63, 1),
491 SOC_SINGLE("MONO Playback Switch", RT5631_MONO_AXO_1_2_VOL, 13, 1, 1),
492 SOC_DOUBLE("HP Playback Switch", RT5631_HP_OUT_VOL, 15, 7, 1, 1),
493 SOC_DOUBLE("HP Playback Volume", RT5631_HP_OUT_VOL, 8, 0, 63, 1),
494 SOC_SINGLE_EXT("DMIC Capture Switch", 0, 2, 1, 0,
495         rt5631_dmic_get, rt5631_dmic_put),
496 SOC_ENUM_EXT("EQ Mode", rt5631_enum[10], rt5631_eq_sel_get, rt5631_eq_sel_put),
497 };
498
499 static const struct snd_kcontrol_new rt5631_recmixl_mixer_controls[] = {
500 SOC_DAPM_SINGLE("OUTMIXL Capture Switch", RT5631_ADC_REC_MIXER, 15, 1, 1),
501 SOC_DAPM_SINGLE("MIC1_BST1 Capture Switch", RT5631_ADC_REC_MIXER, 14, 1, 1),
502 SOC_DAPM_SINGLE("AXILVOL Capture Switch", RT5631_ADC_REC_MIXER, 13, 1, 1),
503 SOC_DAPM_SINGLE("MONOIN_RX Capture Switch", RT5631_ADC_REC_MIXER, 12, 1, 1),
504 };
505
506 static const struct snd_kcontrol_new rt5631_recmixr_mixer_controls[] = {
507 SOC_DAPM_SINGLE("MONOIN_RX Capture Switch", RT5631_ADC_REC_MIXER, 4, 1, 1),
508 SOC_DAPM_SINGLE("AXIRVOL Capture Switch", RT5631_ADC_REC_MIXER, 5, 1, 1),
509 SOC_DAPM_SINGLE("MIC2_BST2 Capture Switch", RT5631_ADC_REC_MIXER, 6, 1, 1),
510 SOC_DAPM_SINGLE("OUTMIXR Capture Switch", RT5631_ADC_REC_MIXER, 7, 1, 1),
511 };
512
513 static const struct snd_kcontrol_new rt5631_spkmixl_mixer_controls[] = {
514 SOC_DAPM_SINGLE("RECMIXL Playback Switch", RT5631_SPK_MIXER_CTRL, 15, 1, 1),
515 SOC_DAPM_SINGLE("MIC1_P Playback Switch", RT5631_SPK_MIXER_CTRL, 14, 1, 1),
516 SOC_DAPM_SINGLE("DACL Playback Switch", RT5631_SPK_MIXER_CTRL, 13, 1, 1),
517 SOC_DAPM_SINGLE("OUTMIXL Playback Switch", RT5631_SPK_MIXER_CTRL, 12, 1, 1),
518 };
519
520 static const struct snd_kcontrol_new rt5631_spkmixr_mixer_controls[] = {
521 SOC_DAPM_SINGLE("OUTMIXR Playback Switch", RT5631_SPK_MIXER_CTRL, 4, 1, 1),
522 SOC_DAPM_SINGLE("DACR Playback Switch", RT5631_SPK_MIXER_CTRL, 5, 1, 1),
523 SOC_DAPM_SINGLE("MIC2_P Playback Switch", RT5631_SPK_MIXER_CTRL, 6, 1, 1),
524 SOC_DAPM_SINGLE("RECMIXR Playback Switch", RT5631_SPK_MIXER_CTRL, 7, 1, 1),
525 };
526
527 static const struct snd_kcontrol_new rt5631_outmixl_mixer_controls[] = {
528 SOC_DAPM_SINGLE("RECMIXL Playback Switch", RT5631_OUTMIXER_L_CTRL, 15, 1, 1),
529 SOC_DAPM_SINGLE("RECMIXR Playback Switch", RT5631_OUTMIXER_L_CTRL, 14, 1, 1),
530 SOC_DAPM_SINGLE("DACL Playback Switch", RT5631_OUTMIXER_L_CTRL, 13, 1, 1),
531 SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_OUTMIXER_L_CTRL, 12, 1, 1),
532 SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_OUTMIXER_L_CTRL, 11, 1, 1),
533 SOC_DAPM_SINGLE("MONOIN_RXP Playback Switch", RT5631_OUTMIXER_L_CTRL, 10, 1, 1),
534 SOC_DAPM_SINGLE("AXILVOL Playback Switch", RT5631_OUTMIXER_L_CTRL, 9, 1, 1),
535 SOC_DAPM_SINGLE("AXIRVOL Playback Switch", RT5631_OUTMIXER_L_CTRL, 8, 1, 1),
536 SOC_DAPM_SINGLE("VDAC Playback Switch", RT5631_OUTMIXER_L_CTRL, 7, 1, 1),
537 };
538
539 static const struct snd_kcontrol_new rt5631_outmixr_mixer_controls[] = {
540 SOC_DAPM_SINGLE("VDAC Playback Switch", RT5631_OUTMIXER_R_CTRL, 7, 1, 1),
541 SOC_DAPM_SINGLE("AXIRVOL Playback Switch", RT5631_OUTMIXER_R_CTRL, 8, 1, 1),
542 SOC_DAPM_SINGLE("AXILVOL Playback Switch", RT5631_OUTMIXER_R_CTRL, 9, 1, 1),
543 SOC_DAPM_SINGLE("MONOIN_RXN Playback Switch", RT5631_OUTMIXER_R_CTRL, 10, 1, 1),
544 SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_OUTMIXER_R_CTRL, 11, 1, 1),
545 SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_OUTMIXER_R_CTRL, 12, 1, 1),
546 SOC_DAPM_SINGLE("DACR Playback Switch", RT5631_OUTMIXER_R_CTRL, 13, 1, 1),
547 SOC_DAPM_SINGLE("RECMIXR Playback Switch", RT5631_OUTMIXER_R_CTRL, 14, 1, 1),
548 SOC_DAPM_SINGLE("RECMIXL Playback Switch", RT5631_OUTMIXER_R_CTRL, 15, 1, 1),
549 };
550
551 static const struct snd_kcontrol_new rt5631_AXO1MIX_mixer_controls[] = {
552 SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_AXO1MIXER_CTRL, 15 , 1, 1),
553 SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_AXO1MIXER_CTRL, 11, 1, 1),
554 SOC_DAPM_SINGLE("OUTVOLL Playback Switch", RT5631_AXO1MIXER_CTRL, 7 , 1 , 1),
555 SOC_DAPM_SINGLE("OUTVOLR Playback Switch", RT5631_AXO1MIXER_CTRL, 6, 1, 1),
556 };
557
558 static const struct snd_kcontrol_new rt5631_AXO2MIX_mixer_controls[] = {
559 SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_AXO2MIXER_CTRL, 15, 1, 1),
560 SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_AXO2MIXER_CTRL, 11, 1, 1),
561 SOC_DAPM_SINGLE("OUTVOLL Playback Switch", RT5631_AXO2MIXER_CTRL, 7, 1, 1),
562 SOC_DAPM_SINGLE("OUTVOLR Playback Switch", RT5631_AXO2MIXER_CTRL, 6, 1 , 1),
563 };
564
565 static const struct snd_kcontrol_new rt5631_spolmix_mixer_controls[] = {
566 SOC_DAPM_SINGLE("SPKVOLL Playback Switch", RT5631_SPK_MONO_OUT_CTRL, 15, 1, 1),
567 SOC_DAPM_SINGLE("SPKVOLR Playback Switch", RT5631_SPK_MONO_OUT_CTRL, 14, 1, 1),
568 };
569
570 static const struct snd_kcontrol_new rt5631_spormix_mixer_controls[] = {
571 SOC_DAPM_SINGLE("SPKVOLL Playback Switch", RT5631_SPK_MONO_OUT_CTRL, 13, 1, 1),
572 SOC_DAPM_SINGLE("SPKVOLR Playback Switch", RT5631_SPK_MONO_OUT_CTRL, 12, 1, 1),
573 };
574
575 static const struct snd_kcontrol_new rt5631_monomix_mixer_controls[] = {
576 SOC_DAPM_SINGLE("OUTVOLL Playback Switch", RT5631_SPK_MONO_OUT_CTRL, 11, 1, 1),
577 SOC_DAPM_SINGLE("OUTVOLR Playback Switch", RT5631_SPK_MONO_OUT_CTRL, 10, 1, 1),
578 };
579
580 static const struct snd_kcontrol_new rt5631_spol_mux_control =
581 SOC_DAPM_ENUM("Route", rt5631_enum[0]);
582 static const struct snd_kcontrol_new rt5631_spor_mux_control =
583 SOC_DAPM_ENUM("Route", rt5631_enum[1]);
584 static const struct snd_kcontrol_new rt5631_mono_mux_control =
585 SOC_DAPM_ENUM("Route", rt5631_enum[2]);
586
587 static const struct snd_kcontrol_new rt5631_hpl_mux_control =
588 SOC_DAPM_ENUM("Route", rt5631_enum[8]);
589 static const struct snd_kcontrol_new rt5631_hpr_mux_control =
590 SOC_DAPM_ENUM("Route", rt5631_enum[9]);
591
592 //ALC for DAC function
593 #if (RT5631_ALC_DAC_FUNC_ENA == 1)
594 static void rt5631_alc_enable(struct snd_soc_codec *codec,unsigned int EnableALC)
595 {
596         if(EnableALC)
597         {
598                 rt5631_write(codec, 0x64,0x0206);
599                 rt5631_write(codec, 0x65,0x0003);
600                 rt5631_write_index(codec, 0x21,0x5000);
601                 rt5631_write_index(codec, 0x22,0xa480);
602                 rt5631_write_index(codec, 0x23,0x0a08);
603                 rt5631_write(codec, 0x0c,0x0010);
604                 rt5631_write(codec, 0x66,0x650a);
605                 
606         }
607         else
608         {
609                 rt5631_write(codec, 0x66,0x250A);
610                 rt5631_write(codec, 0x0c,0x0000);               
611         }       
612         
613 }
614 #endif
615
616 static int spk_event(struct snd_soc_dapm_widget *w,
617         struct snd_kcontrol *kcontrol, int event)
618 {
619         struct snd_soc_codec *codec = w->codec;
620         static int spkl_out_enable, spkr_out_enable;
621
622         switch (event) {
623         case SND_SOC_DAPM_POST_PMU:
624
625 #if (RT5631_ALC_DAC_FUNC_ENA == 1)              
626                rt5631_alc_enable(codec, 1);
627 #endif          
628
629                 if (!spkl_out_enable && !strcmp(w->name, "SPKL Amp")) {
630                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD4,
631                                         PWR_SPK_L_VOL, PWR_SPK_L_VOL);
632                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD1,
633                                         PWR_CLASS_D, PWR_CLASS_D);
634                         rt5631_write_mask(codec, RT5631_SPK_OUT_VOL,
635                                         0, RT_L_MUTE);
636                         spkl_out_enable = 1;
637                 }
638                 if (!spkr_out_enable && !strcmp(w->name, "SPKR Amp")) {
639                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD4,
640                                         PWR_SPK_R_VOL, PWR_SPK_R_VOL);
641                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD1,
642                                         PWR_CLASS_D, PWR_CLASS_D);
643                         rt5631_write_mask(codec, RT5631_SPK_OUT_VOL,
644                                         0, RT_R_MUTE);
645                         spkr_out_enable = 1;
646                 }
647                 break;
648
649         case SND_SOC_DAPM_POST_PMD:
650                 if (spkl_out_enable && !strcmp(w->name, "SPKL Amp")) {
651                         rt5631_write_mask(codec, RT5631_SPK_OUT_VOL,
652                                         RT_L_MUTE, RT_L_MUTE);
653                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD4,
654                                         0, PWR_SPK_L_VOL);
655                         spkl_out_enable = 0;
656                 }
657                 if (spkr_out_enable && !strcmp(w->name, "SPKR Amp")) {
658                         rt5631_write_mask(codec, RT5631_SPK_OUT_VOL,
659                                         RT_R_MUTE, RT_R_MUTE);
660                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD4,
661                                         0, PWR_SPK_R_VOL);
662                         spkr_out_enable = 0;
663                 }
664                 if (0 == spkl_out_enable && 0 == spkr_out_enable)
665                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD1,
666                                         0, PWR_CLASS_D);
667
668 #if (RT5631_ALC_DAC_FUNC_ENA == 1)                      
669                 rt5631_alc_enable(codec, 0);
670 #endif
671
672                 break;
673
674         default:
675                 return 0;
676         }
677
678         return 0;
679 }
680
681
682 static void hp_depop_mode2_onebit(struct snd_soc_codec *codec, int enable)
683 {
684         unsigned int soft_vol, hp_zc;
685
686         rt5631_write_mask(codec, RT5631_DEPOP_FUN_CTRL_2, 0, EN_ONE_BIT_DEPOP);
687
688         soft_vol = rt5631_read(codec, RT5631_SOFT_VOL_CTRL);
689         rt5631_write(codec, RT5631_SOFT_VOL_CTRL, 0);
690         hp_zc = rt5631_read(codec, RT5631_INT_ST_IRQ_CTRL_2);
691         rt5631_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
692         if (enable) {
693                 rt5631_write_index(codec, RT5631_TEST_MODE_CTRL, 0x84c0);
694                 rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x309f);
695                 rt5631_write_index(codec, RT5631_CP_INTL_REG2, 0x6530);
696                 rt5631_write(codec, RT5631_DEPOP_FUN_CTRL_2,
697                                 EN_CAP_FREE_DEPOP);
698         } else {
699                 rt5631_write(codec, RT5631_DEPOP_FUN_CTRL_2, 0);
700                 schedule_timeout_uninterruptible(msecs_to_jiffies(100));
701         }
702
703         rt5631_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol);
704         rt5631_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
705
706         return;
707 }
708
709 static void hp_mute_unmute_depop_onebit(struct snd_soc_codec *codec, int enable)
710 {
711         unsigned int soft_vol, hp_zc;
712
713         rt5631_write_mask(codec, RT5631_DEPOP_FUN_CTRL_2, 0, EN_ONE_BIT_DEPOP);
714         soft_vol = rt5631_read(codec, RT5631_SOFT_VOL_CTRL);
715         rt5631_write(codec, RT5631_SOFT_VOL_CTRL, 0);
716         hp_zc = rt5631_read(codec, RT5631_INT_ST_IRQ_CTRL_2);
717         rt5631_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
718         if (enable) {
719                 schedule_timeout_uninterruptible(msecs_to_jiffies(10));
720                 rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x307f);
721                 rt5631_write_mask(codec, RT5631_HP_OUT_VOL, 0,
722                                 RT_L_MUTE | RT_R_MUTE);
723                 schedule_timeout_uninterruptible(msecs_to_jiffies(300));
724
725         } else {
726                 rt5631_write_mask(codec, RT5631_HP_OUT_VOL,
727                         RT_L_MUTE | RT_R_MUTE, RT_L_MUTE | RT_R_MUTE);
728                 schedule_timeout_uninterruptible(msecs_to_jiffies(100));
729         }
730         rt5631_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol);
731         rt5631_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
732
733         return;
734 }
735
736 static void hp_depop2(struct snd_soc_codec *codec, int enable)
737 {
738         unsigned int soft_vol, hp_zc;
739
740         rt5631_write_mask(codec, RT5631_DEPOP_FUN_CTRL_2,
741                 EN_ONE_BIT_DEPOP, EN_ONE_BIT_DEPOP);
742         soft_vol = rt5631_read(codec, RT5631_SOFT_VOL_CTRL);
743         rt5631_write(codec, RT5631_SOFT_VOL_CTRL, 0);
744         hp_zc = rt5631_read(codec, RT5631_INT_ST_IRQ_CTRL_2);
745         rt5631_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
746         if (enable) {
747                 rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x303e);
748                 rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3,
749                         PWR_CHARGE_PUMP | PWR_HP_L_AMP | PWR_HP_R_AMP,
750                         PWR_CHARGE_PUMP | PWR_HP_L_AMP | PWR_HP_R_AMP);
751                 rt5631_write(codec, RT5631_DEPOP_FUN_CTRL_1,
752                         POW_ON_SOFT_GEN | EN_DEPOP2_FOR_HP);
753                 schedule_timeout_uninterruptible(msecs_to_jiffies(100));
754                 rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3,
755                         PWR_HP_DEPOP_DIS, PWR_HP_DEPOP_DIS);
756         } else {
757                 rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x303F);
758                 rt5631_write(codec, RT5631_DEPOP_FUN_CTRL_1,
759                         POW_ON_SOFT_GEN | EN_MUTE_UNMUTE_DEPOP |
760                         PD_HPAMP_L_ST_UP | PD_HPAMP_R_ST_UP);
761                 schedule_timeout_uninterruptible(msecs_to_jiffies(75));
762                 rt5631_write(codec, RT5631_DEPOP_FUN_CTRL_1,
763                         POW_ON_SOFT_GEN | PD_HPAMP_L_ST_UP | PD_HPAMP_R_ST_UP);
764                 rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3, 0,
765                                         PWR_HP_DEPOP_DIS);
766                 rt5631_write(codec, RT5631_DEPOP_FUN_CTRL_1,
767                         POW_ON_SOFT_GEN | EN_DEPOP2_FOR_HP |
768                         PD_HPAMP_L_ST_UP | PD_HPAMP_R_ST_UP);
769                 schedule_timeout_uninterruptible(msecs_to_jiffies(80));
770                 rt5631_write(codec, RT5631_DEPOP_FUN_CTRL_1, POW_ON_SOFT_GEN);
771                 rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3, 0,
772                         PWR_CHARGE_PUMP | PWR_HP_L_AMP | PWR_HP_R_AMP);
773         }
774
775         rt5631_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol);
776         rt5631_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
777
778         return;
779 }
780
781 static void hp_mute_unmute_depop(struct snd_soc_codec *codec, int enable)
782 {
783         unsigned int soft_vol, hp_zc;
784
785         rt5631_write_mask(codec, RT5631_DEPOP_FUN_CTRL_2,
786                 EN_ONE_BIT_DEPOP, EN_ONE_BIT_DEPOP);
787         soft_vol = rt5631_read(codec, RT5631_SOFT_VOL_CTRL);
788         rt5631_write(codec, RT5631_SOFT_VOL_CTRL, 0);
789         hp_zc = rt5631_read(codec, RT5631_INT_ST_IRQ_CTRL_2);
790         rt5631_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
791         if (enable) {
792                 schedule_timeout_uninterruptible(msecs_to_jiffies(10));
793                 rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x302f);
794                 rt5631_write(codec, RT5631_DEPOP_FUN_CTRL_1,
795                         POW_ON_SOFT_GEN | EN_MUTE_UNMUTE_DEPOP |
796                         EN_HP_R_M_UN_MUTE_DEPOP | EN_HP_L_M_UN_MUTE_DEPOP);
797                 rt5631_write_mask(codec, RT5631_HP_OUT_VOL, 0,
798                                 RT_L_MUTE | RT_R_MUTE);
799                 schedule_timeout_uninterruptible(msecs_to_jiffies(160));
800         } else {
801                 rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x302f);
802                 rt5631_write(codec, RT5631_DEPOP_FUN_CTRL_1,
803                         POW_ON_SOFT_GEN | EN_MUTE_UNMUTE_DEPOP |
804                         EN_HP_R_M_UN_MUTE_DEPOP | EN_HP_L_M_UN_MUTE_DEPOP);
805                 rt5631_write_mask(codec, RT5631_HP_OUT_VOL,
806                         RT_L_MUTE | RT_R_MUTE, RT_L_MUTE | RT_R_MUTE);
807                 schedule_timeout_uninterruptible(msecs_to_jiffies(150));
808         }
809
810         rt5631_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol);
811         rt5631_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
812
813         return;
814 }
815
816 static int hp_event(struct snd_soc_dapm_widget *w,
817         struct snd_kcontrol *kcontrol, int event)
818 {
819         struct snd_soc_codec *codec = w->codec;
820         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
821         static bool hp_en;
822         int pu_l, pu_r;
823
824         pu_l = rt5631_read(codec, RT5631_PWR_MANAG_ADD4) & PWR_HP_L_OUT_VOL;
825         pu_r = rt5631_read(codec, RT5631_PWR_MANAG_ADD4) & PWR_HP_R_OUT_VOL;
826         switch (event) {
827         case SND_SOC_DAPM_PRE_PMD:
828                 if ((pu_l && pu_r) && hp_en) {
829                         if (rt5631->codec_version) {
830                                 hp_mute_unmute_depop_onebit(codec, 0);
831                                 hp_depop_mode2_onebit(codec, 0);
832                         } else {
833                                 hp_mute_unmute_depop(codec, 0);
834                                 hp_depop2(codec, 0);
835                         }
836                         hp_en = false;
837                 }
838                 break;
839
840         case SND_SOC_DAPM_POST_PMU:
841                 if ((pu_l && pu_r) && !hp_en) {
842                         if (rt5631->codec_version) {
843                                 hp_depop_mode2_onebit(codec, 1);
844                                 hp_mute_unmute_depop_onebit(codec, 1);
845                         } else {
846                                 hp_depop2(codec, 1);
847                                 hp_mute_unmute_depop(codec, 1);
848                         }
849                         hp_en = true;
850                 }
851                 break;
852
853         default:
854                 break;
855         }
856
857         return 0;
858 }
859
860 static int dac_to_hp_event(struct snd_soc_dapm_widget *w,
861                 struct snd_kcontrol *kcontrol, int event)
862 {
863         struct snd_soc_codec *codec = w->codec;
864         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
865         static bool hp_en;
866
867         switch (event) {
868         case SND_SOC_DAPM_PRE_PMD:
869                 if (hp_en) {
870                         if (rt5631->codec_version) {
871                                 hp_mute_unmute_depop_onebit(codec, 0);
872                                 hp_depop_mode2_onebit(codec, 0);
873                         } else {
874                                 hp_mute_unmute_depop(codec, 0);
875                                 hp_depop2(codec, 0);
876                         }
877                         hp_en = false;
878                 }
879                 break;
880
881         case SND_SOC_DAPM_POST_PMU:
882                 if (!hp_en) {
883                         if (rt5631->codec_version) {
884                                 hp_depop_mode2_onebit(codec, 1);
885                                 hp_mute_unmute_depop_onebit(codec, 1);
886                         } else {
887                                 hp_depop2(codec, 1);
888                                 hp_mute_unmute_depop(codec, 1);
889                         }
890                         hp_en = true;
891                 }
892                 break;
893
894         default:
895                 break;
896         }
897
898         return 0;
899 }
900
901 static int mic_event(struct snd_soc_dapm_widget *w,
902         struct snd_kcontrol *kcontrol, int event)
903 {
904         struct snd_soc_codec *codec = w->codec;
905         int val_mic1, val_mic2;
906
907         val_mic1 = rt5631_read(codec, RT5631_PWR_MANAG_ADD2) &
908                                 PWR_MIC1_BOOT_GAIN;
909         val_mic2 = rt5631_read(codec, RT5631_PWR_MANAG_ADD2) &
910                                 PWR_MIC2_BOOT_GAIN;
911         switch (event) {
912         case SND_SOC_DAPM_POST_PMU:
913                 /*
914                  * If microphone is stereo, need not copy ADC channel
915                  * If mic1 is used, copy ADC left to right
916                  * If mic2 is used, copy ADC right to left
917                  */
918                 if (val_mic1 && val_mic2)
919                         rt5631_write_mask(codec, RT5631_INT_ST_IRQ_CTRL_2,
920                                                         0x0000, 0xc000);
921                 else if (val_mic1)
922                         rt5631_write_mask(codec, RT5631_INT_ST_IRQ_CTRL_2,
923                                                         0x4000, 0xc000);
924                 else if (val_mic2)
925                         rt5631_write_mask(codec, RT5631_INT_ST_IRQ_CTRL_2,
926                                                         0x8000, 0xc000);
927                 else
928                         rt5631_write_mask(codec, RT5631_INT_ST_IRQ_CTRL_2,
929                                                         0x0000, 0xc000);
930                 break;
931
932         default:
933                 break;
934         }
935
936         return 0;
937 }
938
939 static int auxo1_event(struct snd_soc_dapm_widget *w,
940         struct snd_kcontrol *kcontrol, int event)
941 {
942         struct snd_soc_codec *codec = w->codec;
943         static bool aux1_en;
944
945         switch (event) {
946         case SND_SOC_DAPM_PRE_PMD:
947                 if (aux1_en) {
948                         rt5631_write_mask(codec, RT5631_MONO_AXO_1_2_VOL,
949                                                 RT_L_MUTE, RT_L_MUTE);
950                         aux1_en = false;
951                 }
952                 break;
953
954         case SND_SOC_DAPM_POST_PMU:
955                 if (!aux1_en) {
956                         rt5631_write_mask(codec, RT5631_MONO_AXO_1_2_VOL,
957                                                 0, RT_L_MUTE);
958                         aux1_en = true;
959                 }
960                 break;
961
962         default:
963                 break;
964         }
965
966         return 0;
967 }
968
969 static int auxo2_event(struct snd_soc_dapm_widget *w,
970         struct snd_kcontrol *kcontrol, int event)
971 {
972         struct snd_soc_codec *codec = w->codec;
973         static bool aux2_en;
974
975         switch (event) {
976         case SND_SOC_DAPM_PRE_PMD:
977                 if (aux2_en) {
978                         rt5631_write_mask(codec, RT5631_MONO_AXO_1_2_VOL,
979                                                 RT_R_MUTE, RT_R_MUTE);
980                         aux2_en = false;
981                 }
982                 break;
983
984         case SND_SOC_DAPM_POST_PMU:
985                 if (!aux2_en) {
986                         rt5631_write_mask(codec, RT5631_MONO_AXO_1_2_VOL,
987                                                 0, RT_R_MUTE);
988                         aux2_en = true;
989                 }
990                 break;
991
992         default:
993                 break;
994         }
995
996         return 0;
997 }
998
999 static int mono_event(struct snd_soc_dapm_widget *w,
1000         struct snd_kcontrol *kcontrol, int event)
1001 {
1002         struct snd_soc_codec *codec = w->codec;
1003         static bool mono_en;
1004
1005         switch (event) {
1006         case SND_SOC_DAPM_PRE_PMD:
1007                 if (mono_en) {
1008                         rt5631_write_mask(codec, RT5631_MONO_AXO_1_2_VOL,
1009                                                 MUTE_MONO, MUTE_MONO);
1010                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3,
1011                                                 0, PWR_MONO_DEPOP_DIS);
1012                         mono_en = false;
1013                 }
1014                 break;
1015
1016         case SND_SOC_DAPM_POST_PMU:
1017                 if (!mono_en) {
1018                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3,
1019                                 PWR_MONO_DEPOP_DIS, PWR_MONO_DEPOP_DIS);
1020                         rt5631_write_mask(codec, RT5631_MONO_AXO_1_2_VOL,
1021                                                 0, MUTE_MONO);
1022                         mono_en = true;
1023                 }
1024                 break;
1025
1026         default:
1027                 break;
1028         }
1029
1030         return 0;
1031 }
1032
1033 /**
1034  * config_common_power - control all common power of codec system
1035  * @pmu: power up or not
1036  */
1037 static int config_common_power(struct snd_soc_codec *codec, bool pmu)
1038 {
1039         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
1040         unsigned int mux_val;
1041
1042         if (pmu) {
1043                 rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD1,
1044                         PWR_MAIN_I2S_EN | PWR_DAC_REF,
1045                         PWR_MAIN_I2S_EN | PWR_DAC_REF);
1046                 mux_val = rt5631_read(codec, RT5631_SPK_MONO_HP_OUT_CTRL);
1047                 //if (!(mux_val & HP_L_MUX_SEL_DAC_L))
1048                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD1,
1049                                 PWR_DAC_L_TO_MIXER, PWR_DAC_L_TO_MIXER);
1050                 //if (!(mux_val & HP_R_MUX_SEL_DAC_R))
1051                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD1,
1052                                 PWR_DAC_R_TO_MIXER, PWR_DAC_R_TO_MIXER);
1053                 if (rt5631->pll_used_flag)
1054                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD2,
1055                                                 PWR_PLL, PWR_PLL);
1056         } else if (isPlaybackon == false && isCaptureon == false){
1057                 rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD1, 0,
1058                         PWR_MAIN_I2S_EN | PWR_DAC_REF |
1059                         PWR_DAC_L_TO_MIXER | PWR_DAC_R_TO_MIXER);
1060                 if (rt5631->pll_used_flag)
1061                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD2,
1062                                                 0, PWR_PLL);
1063         }
1064
1065         return 0;
1066 }
1067
1068 static int adc_event(struct snd_soc_dapm_widget *w,
1069         struct snd_kcontrol *kcontrol, int event)
1070 {
1071         struct snd_soc_codec *codec = w->codec;
1072         static bool pmu;
1073
1074         switch (event) {
1075         case SND_SOC_DAPM_POST_PMD:
1076                 if (pmu) {
1077                         isPlaybackon = false;
1078                         config_common_power(codec, false);
1079                         pmu = false;
1080                 }
1081                 break;
1082
1083         case SND_SOC_DAPM_PRE_PMU:
1084                 if (!pmu) {
1085                         isPlaybackon = true;
1086                         config_common_power(codec, true);
1087                         pmu = true;
1088                 }
1089                 break;
1090
1091         default:
1092                 break;
1093         }
1094
1095         return 0;
1096 }
1097
1098 static int dac_event(struct snd_soc_dapm_widget *w,
1099         struct snd_kcontrol *kcontrol, int event)
1100 {
1101         struct snd_soc_codec *codec = w->codec;
1102         static bool pmu;
1103
1104         switch (event) {
1105         case SND_SOC_DAPM_POST_PMD:
1106                 if (pmu) {
1107                         isCaptureon = false;
1108                         config_common_power(codec, false);
1109                         pmu = false;
1110                 }
1111                 break;
1112
1113         case SND_SOC_DAPM_PRE_PMU:
1114                 if (!pmu) {
1115                         isCaptureon = true;
1116                         config_common_power(codec, true);
1117                         pmu = true;
1118                 }
1119                 break;
1120
1121         default:
1122                 break;
1123         }
1124
1125         return 0;
1126 }
1127
1128 static const struct snd_soc_dapm_widget rt5631_dapm_widgets[] = {
1129 SND_SOC_DAPM_INPUT("MIC1"),
1130 SND_SOC_DAPM_INPUT("MIC2"),
1131 SND_SOC_DAPM_INPUT("AXIL"),
1132 SND_SOC_DAPM_INPUT("AXIR"),
1133 SND_SOC_DAPM_INPUT("MONOIN_RXN"),
1134 SND_SOC_DAPM_INPUT("MONOIN_RXP"),
1135
1136 SND_SOC_DAPM_MICBIAS("Mic Bias1", RT5631_PWR_MANAG_ADD2, 3, 0),
1137 SND_SOC_DAPM_MICBIAS("Mic Bias2", RT5631_PWR_MANAG_ADD2, 2, 0),
1138
1139 SND_SOC_DAPM_PGA_E("Mic1 Boost", RT5631_PWR_MANAG_ADD2, 5, 0, NULL, 0,
1140                 mic_event, SND_SOC_DAPM_POST_PMU),
1141 SND_SOC_DAPM_PGA_E("Mic2 Boost", RT5631_PWR_MANAG_ADD2, 4, 0, NULL, 0,
1142                 mic_event, SND_SOC_DAPM_POST_PMU),
1143 SND_SOC_DAPM_PGA("MONOIN_RXP Boost", RT5631_PWR_MANAG_ADD4, 7, 0, NULL, 0),
1144 SND_SOC_DAPM_PGA("MONOIN_RXN Boost", RT5631_PWR_MANAG_ADD4, 6, 0, NULL, 0),
1145 SND_SOC_DAPM_PGA("AXIL Boost", RT5631_PWR_MANAG_ADD4, 9, 0, NULL, 0),
1146 SND_SOC_DAPM_PGA("AXIR Boost", RT5631_PWR_MANAG_ADD4, 8, 0, NULL, 0),
1147 SND_SOC_DAPM_MIXER("MONO_IN", SND_SOC_NOPM, 0, 0, NULL, 0),
1148
1149 SND_SOC_DAPM_MIXER("RECMIXL Mixer", RT5631_PWR_MANAG_ADD2, 11, 0,
1150                 &rt5631_recmixl_mixer_controls[0],
1151                 ARRAY_SIZE(rt5631_recmixl_mixer_controls)),
1152 SND_SOC_DAPM_MIXER("RECMIXR Mixer", RT5631_PWR_MANAG_ADD2, 10, 0,
1153                 &rt5631_recmixr_mixer_controls[0],
1154                 ARRAY_SIZE(rt5631_recmixr_mixer_controls)),
1155 SND_SOC_DAPM_MIXER("ADC Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
1156
1157 SND_SOC_DAPM_ADC_E("Left ADC", "Left ADC HIFI Capture",
1158                 RT5631_PWR_MANAG_ADD1, 11, 0,
1159                 adc_event, SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_PRE_PMU),
1160 SND_SOC_DAPM_ADC_E("Right ADC", "Right ADC HIFI Capture",
1161                 RT5631_PWR_MANAG_ADD1, 10, 0,
1162                 adc_event, SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_PRE_PMU),
1163 SND_SOC_DAPM_DAC_E("Left DAC", "Left DAC HIFI Playback",
1164                 RT5631_PWR_MANAG_ADD1, 9, 0,
1165                 dac_event, SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_PRE_PMU),
1166 SND_SOC_DAPM_DAC_E("Right DAC", "Right DAC HIFI Playback",
1167                 RT5631_PWR_MANAG_ADD1, 8, 0,
1168                 dac_event, SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_PRE_PMU),
1169 SND_SOC_DAPM_DAC("Voice DAC", "Voice DAC Mono Playback", SND_SOC_NOPM, 0, 0),
1170 SND_SOC_DAPM_PGA("Voice DAC Boost", SND_SOC_NOPM, 0, 0, NULL, 0),
1171
1172 SND_SOC_DAPM_MIXER("SPKMIXL Mixer", RT5631_PWR_MANAG_ADD2, 13, 0,
1173                 &rt5631_spkmixl_mixer_controls[0],
1174                 ARRAY_SIZE(rt5631_spkmixl_mixer_controls)),
1175 SND_SOC_DAPM_MIXER("OUTMIXL Mixer", RT5631_PWR_MANAG_ADD2, 15, 0,
1176                 &rt5631_outmixl_mixer_controls[0],
1177                 ARRAY_SIZE(rt5631_outmixl_mixer_controls)),
1178 SND_SOC_DAPM_MIXER("OUTMIXR Mixer", RT5631_PWR_MANAG_ADD2, 14, 0,
1179                 &rt5631_outmixr_mixer_controls[0],
1180                 ARRAY_SIZE(rt5631_outmixr_mixer_controls)),
1181 SND_SOC_DAPM_MIXER("SPKMIXR Mixer", RT5631_PWR_MANAG_ADD2, 12, 0,
1182                 &rt5631_spkmixr_mixer_controls[0],
1183                 ARRAY_SIZE(rt5631_spkmixr_mixer_controls)),
1184
1185 SND_SOC_DAPM_PGA("Left SPK Vol", RT5631_PWR_MANAG_ADD4, 15, 0, NULL, 0),
1186 SND_SOC_DAPM_PGA("Right SPK Vol", RT5631_PWR_MANAG_ADD4, 14, 0, NULL, 0),
1187 SND_SOC_DAPM_PGA_E("Left HP Vol", RT5631_PWR_MANAG_ADD4, 11, 0, NULL, 0,
1188                 hp_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1189 SND_SOC_DAPM_PGA_E("Right HP Vol", RT5631_PWR_MANAG_ADD4, 10, 0, NULL, 0,
1190                 hp_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1191
1192 SND_SOC_DAPM_PGA_E("Left DAC_HP", SND_SOC_NOPM, 0, 0, NULL, 0,
1193         dac_to_hp_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1194 SND_SOC_DAPM_PGA_E("Right DAC_HP", SND_SOC_NOPM, 0, 0, NULL, 0,
1195         dac_to_hp_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1196
1197 SND_SOC_DAPM_PGA("Left Out Vol", RT5631_PWR_MANAG_ADD4, 13, 0, NULL, 0),
1198 SND_SOC_DAPM_PGA("Right Out Vol", RT5631_PWR_MANAG_ADD4, 12, 0, NULL, 0),
1199
1200 SND_SOC_DAPM_MIXER_E("AXO1MIX Mixer", RT5631_PWR_MANAG_ADD3, 11, 0,
1201                 &rt5631_AXO1MIX_mixer_controls[0],
1202                 ARRAY_SIZE(rt5631_AXO1MIX_mixer_controls),
1203                 auxo1_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1204 SND_SOC_DAPM_MIXER("SPOLMIX Mixer", SND_SOC_NOPM, 0, 0,
1205                 &rt5631_spolmix_mixer_controls[0],
1206                 ARRAY_SIZE(rt5631_spolmix_mixer_controls)),
1207 SND_SOC_DAPM_MIXER("MONOMIX Mixer", RT5631_PWR_MANAG_ADD3, 9, 0,
1208                 &rt5631_monomix_mixer_controls[0],
1209                 ARRAY_SIZE(rt5631_monomix_mixer_controls)),
1210 SND_SOC_DAPM_MIXER("SPORMIX Mixer", SND_SOC_NOPM, 0, 0,
1211                 &rt5631_spormix_mixer_controls[0],
1212                 ARRAY_SIZE(rt5631_spormix_mixer_controls)),
1213 SND_SOC_DAPM_MIXER_E("AXO2MIX Mixer", RT5631_PWR_MANAG_ADD3, 10, 0,
1214                 &rt5631_AXO2MIX_mixer_controls[0],
1215                 ARRAY_SIZE(rt5631_AXO2MIX_mixer_controls),
1216                 auxo2_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1217
1218 SND_SOC_DAPM_MUX("SPOL Mux", SND_SOC_NOPM, 0, 0, &rt5631_spol_mux_control),
1219 SND_SOC_DAPM_MUX("SPOR Mux", SND_SOC_NOPM, 0, 0, &rt5631_spor_mux_control),
1220 SND_SOC_DAPM_MUX("Mono Mux", SND_SOC_NOPM, 0, 0, &rt5631_mono_mux_control),
1221 SND_SOC_DAPM_MUX("HPL Mux", SND_SOC_NOPM, 0, 0, &rt5631_hpl_mux_control),
1222 SND_SOC_DAPM_MUX("HPR Mux", SND_SOC_NOPM, 0, 0, &rt5631_hpr_mux_control),
1223
1224 SND_SOC_DAPM_PGA_E("Mono Amp", RT5631_PWR_MANAG_ADD3, 7, 0, NULL, 0,
1225                 mono_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1226 SND_SOC_DAPM_PGA_E("SPKL Amp", SND_SOC_NOPM, 0, 0, NULL, 0,
1227                 spk_event, SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
1228 SND_SOC_DAPM_PGA_E("SPKR Amp", SND_SOC_NOPM, 1, 0, NULL, 0,
1229                 spk_event, SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
1230
1231 SND_SOC_DAPM_OUTPUT("AUXO1"),
1232 SND_SOC_DAPM_OUTPUT("AUXO2"),
1233 SND_SOC_DAPM_OUTPUT("SPOL"),
1234 SND_SOC_DAPM_OUTPUT("SPOR"),
1235 SND_SOC_DAPM_OUTPUT("HPOL"),
1236 SND_SOC_DAPM_OUTPUT("HPOR"),
1237 SND_SOC_DAPM_OUTPUT("MONO"),
1238 };
1239
1240
1241 static const struct snd_soc_dapm_route audio_map[] = {
1242         {"Mic1 Boost", NULL, "MIC1"},
1243         {"Mic2 Boost", NULL, "MIC2"},
1244         {"MONOIN_RXP Boost", NULL, "MONOIN_RXP"},
1245         {"MONOIN_RXN Boost", NULL, "MONOIN_RXN"},
1246         {"AXIL Boost", NULL, "AXIL"},
1247         {"AXIR Boost", NULL, "AXIR"},
1248
1249         {"MONO_IN", NULL, "MONOIN_RXP Boost"},
1250         {"MONO_IN", NULL, "MONOIN_RXN Boost"},
1251
1252         {"RECMIXL Mixer", "OUTMIXL Capture Switch", "OUTMIXL Mixer"},
1253         {"RECMIXL Mixer", "MIC1_BST1 Capture Switch", "Mic1 Boost"},
1254         {"RECMIXL Mixer", "AXILVOL Capture Switch", "AXIL Boost"},
1255         {"RECMIXL Mixer", "MONOIN_RX Capture Switch", "MONO_IN"},
1256
1257         {"RECMIXR Mixer", "OUTMIXR Capture Switch", "OUTMIXR Mixer"},
1258         {"RECMIXR Mixer", "MIC2_BST2 Capture Switch", "Mic2 Boost"},
1259         {"RECMIXR Mixer", "AXIRVOL Capture Switch", "AXIR Boost"},
1260         {"RECMIXR Mixer", "MONOIN_RX Capture Switch", "MONO_IN"},
1261
1262         {"ADC Mixer", NULL, "RECMIXL Mixer"},
1263         {"ADC Mixer", NULL, "RECMIXR Mixer"},
1264         {"Left ADC", NULL, "ADC Mixer"},
1265         {"Right ADC", NULL, "ADC Mixer"},
1266
1267         {"Voice DAC Boost", NULL, "Voice DAC"},
1268
1269         {"SPKMIXL Mixer", "RECMIXL Playback Switch", "RECMIXL Mixer"},
1270         {"SPKMIXL Mixer", "MIC1_P Playback Switch", "MIC1"},
1271         {"SPKMIXL Mixer", "DACL Playback Switch", "Left DAC"},
1272         {"SPKMIXL Mixer", "OUTMIXL Playback Switch", "OUTMIXL Mixer"},
1273
1274         {"SPKMIXR Mixer", "OUTMIXR Playback Switch", "OUTMIXR Mixer"},
1275         {"SPKMIXR Mixer", "DACR Playback Switch", "Right DAC"},
1276         {"SPKMIXR Mixer", "MIC2_P Playback Switch", "MIC2"},
1277         {"SPKMIXR Mixer", "RECMIXR Playback Switch", "RECMIXR Mixer"},
1278
1279         {"OUTMIXL Mixer", "RECMIXL Playback Switch", "RECMIXL Mixer"},
1280         {"OUTMIXL Mixer", "RECMIXR Playback Switch", "RECMIXR Mixer"},
1281         {"OUTMIXL Mixer", "DACL Playback Switch", "Left DAC"},
1282         {"OUTMIXL Mixer", "MIC1_BST1 Playback Switch", "Mic1 Boost"},
1283         {"OUTMIXL Mixer", "MIC2_BST2 Playback Switch", "Mic2 Boost"},
1284         {"OUTMIXL Mixer", "MONOIN_RXP Playback Switch", "MONOIN_RXP Boost"},
1285         {"OUTMIXL Mixer", "AXILVOL Playback Switch", "AXIL Boost"},
1286         {"OUTMIXL Mixer", "AXIRVOL Playback Switch", "AXIR Boost"},
1287         {"OUTMIXL Mixer", "VDAC Playback Switch", "Voice DAC Boost"},
1288
1289         {"OUTMIXR Mixer", "RECMIXL Playback Switch", "RECMIXL Mixer"},
1290         {"OUTMIXR Mixer", "RECMIXR Playback Switch", "RECMIXR Mixer"},
1291         {"OUTMIXR Mixer", "DACR Playback Switch", "Right DAC"},
1292         {"OUTMIXR Mixer", "MIC1_BST1 Playback Switch", "Mic1 Boost"},
1293         {"OUTMIXR Mixer", "MIC2_BST2 Playback Switch", "Mic2 Boost"},
1294         {"OUTMIXR Mixer", "MONOIN_RXN Playback Switch", "MONOIN_RXN Boost"},
1295         {"OUTMIXR Mixer", "AXILVOL Playback Switch", "AXIL Boost"},
1296         {"OUTMIXR Mixer", "AXIRVOL Playback Switch", "AXIR Boost"},
1297         {"OUTMIXR Mixer", "VDAC Playback Switch", "Voice DAC Boost"},
1298
1299         {"Left SPK Vol",  NULL, "SPKMIXL Mixer"},
1300         {"Right SPK Vol",  NULL, "SPKMIXR Mixer"},
1301         {"Left HP Vol",  NULL, "OUTMIXL Mixer"},
1302         {"Left Out Vol",  NULL, "OUTMIXL Mixer"},
1303         {"Right Out Vol",  NULL, "OUTMIXR Mixer"},
1304         {"Right HP Vol",  NULL, "OUTMIXR Mixer"},
1305
1306         {"AXO1MIX Mixer", "MIC1_BST1 Playback Switch", "Mic1 Boost"},
1307         {"AXO1MIX Mixer", "OUTVOLL Playback Switch", "Left Out Vol"},
1308         {"AXO1MIX Mixer", "OUTVOLR Playback Switch", "Right Out Vol"},
1309         {"AXO1MIX Mixer", "MIC2_BST2 Playback Switch", "Mic2 Boost"},
1310
1311         {"AXO2MIX Mixer", "MIC1_BST1 Playback Switch", "Mic1 Boost"},
1312         {"AXO2MIX Mixer", "OUTVOLL Playback Switch", "Left Out Vol"},
1313         {"AXO2MIX Mixer", "OUTVOLR Playback Switch", "Right Out Vol"},
1314         {"AXO2MIX Mixer", "MIC2_BST2 Playback Switch", "Mic2 Boost"},
1315
1316         {"SPOLMIX Mixer", "SPKVOLL Playback Switch", "Left SPK Vol"},
1317         {"SPOLMIX Mixer", "SPKVOLR Playback Switch", "Right SPK Vol"},
1318
1319         {"SPORMIX Mixer", "SPKVOLL Playback Switch", "Left SPK Vol"},
1320         {"SPORMIX Mixer", "SPKVOLR Playback Switch", "Right SPK Vol"},
1321
1322         {"MONOMIX Mixer", "OUTVOLL Playback Switch", "Left Out Vol"},
1323         {"MONOMIX Mixer", "OUTVOLR Playback Switch", "Right Out Vol"},
1324
1325         {"SPOL Mux", "SPOLMIX", "SPOLMIX Mixer"},
1326         {"SPOL Mux", "MONOIN_RX", "MONO_IN"},
1327         {"SPOL Mux", "VDAC", "Voice DAC Boost"},
1328         {"SPOL Mux", "DACL", "Left DAC"},
1329
1330         {"SPOR Mux", "SPORMIX", "SPORMIX Mixer"},
1331         {"SPOR Mux", "MONOIN_RX", "MONO_IN"},
1332         {"SPOR Mux", "VDAC", "Voice DAC Boost"},
1333         {"SPOR Mux", "DACR", "Right DAC"},
1334
1335         {"Mono Mux", "MONOMIX", "MONOMIX Mixer"},
1336         {"Mono Mux", "MONOIN_RX", "MONO_IN"},
1337         {"Mono Mux", "VDAC", "Voice DAC Boost"},
1338
1339         {"Right DAC_HP", "NULL", "Right DAC"},
1340         {"Left DAC_HP", "NULL", "Left DAC"},
1341
1342         {"HPL Mux", "LEFT HPVOL", "Left HP Vol"},
1343         {"HPL Mux", "LEFT DAC", "Left DAC_HP"},
1344         {"HPR Mux", "RIGHT HPVOL", "Right HP Vol"},
1345         {"HPR Mux", "RIGHT DAC", "Right DAC_HP"},
1346
1347         {"SPKL Amp", NULL, "SPOL Mux"},
1348         {"SPKR Amp", NULL, "SPOR Mux"},
1349         {"Mono Amp", NULL, "Mono Mux"},
1350
1351         {"AUXO1", NULL, "AXO1MIX Mixer"},
1352         {"AUXO2", NULL, "AXO2MIX Mixer"},
1353         {"SPOL", NULL, "SPKL Amp"},
1354         {"SPOR", NULL, "SPKR Amp"},
1355
1356         {"HPOL", NULL, "HPL Mux"},
1357         {"HPOR", NULL, "HPR Mux"},
1358
1359         {"MONO", NULL, "Mono Amp"}
1360 };
1361
1362 static int rt5631_add_widgets(struct snd_soc_codec *codec)
1363 {
1364         struct snd_soc_dapm_context *dapm = &codec->dapm;
1365
1366         snd_soc_dapm_new_controls(dapm, rt5631_dapm_widgets,
1367                         ARRAY_SIZE(rt5631_dapm_widgets));
1368         snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
1369
1370         return 0;
1371 }
1372
1373 static int voltab[2][16] = 
1374 {
1375     //spk
1376     {0x27, 0x1b, 0x18, 0x15, 0x13, 0x11, 0x0f, 0x0e, 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x07, 0x06},
1377     //hp
1378     {0x1f, 0x1c, 0x1a, 0x18, 0x16, 0x14, 0x12, 0x10, 0x0e, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01},
1379 };
1380 static int gvolume = 0;
1381
1382 #if 1
1383 static int get_vol(int max, int min, int stage_num, int stage)
1384 {
1385         int ret, step=((max-min)<<8)/(stage_num-1);
1386         if(stage==stage_num-1)
1387                 ret=min;
1388         else if(stage==0)
1389                 ret=max;
1390         else {
1391                 ret=(stage_num-stage-1) * step;
1392                 ret >>= 8;
1393                 ret = min+ret;
1394         }
1395         DBG("%s(): ret=%02x, max=0x%02x, min=0x%02x, stage_num=%d, stage=%d\n", 
1396                 __FUNCTION__, 
1397                 ret,
1398                 max,
1399                 min,
1400                 stage_num,
1401                 stage);
1402         return ret;
1403 }
1404
1405 static void rt5631_set_volume(int vollevel)
1406 {
1407         struct snd_soc_codec *codec = rt5631_codec;
1408         int tmpvol1, tmpvol2;
1409
1410         //DBG("rt5631_set_volume = %d\n", vollevel);
1411     
1412         if (vollevel > 15) vollevel = 8;
1413         gvolume = vollevel;
1414         
1415 //      tmpvol1 = voltab[0][vollevel];
1416 //      tmpvol2 = voltab[1][vollevel];
1417         tmpvol1=get_vol(0x27, DEF_VOL_SPK&0x3f, 16, vollevel);
1418         tmpvol2=get_vol(0x1f, DEF_VOL&0x1f, 16, vollevel);
1419
1420         if(vollevel == 0){
1421                 rt5631_write_mask(codec, RT5631_SPK_OUT_VOL, 0x8080, 0x8080);
1422                 rt5631_write_mask(codec, RT5631_HP_OUT_VOL, 0x8080, 0x8080);
1423         }
1424 //      else{
1425 //              rt5631_write_mask(codec, RT5631_SPK_OUT_VOL, 0x00, 0x8080);
1426 //              rt5631_write_mask(codec, RT5631_HP_OUT_VOL, 0x00, 0x8080);
1427 //      }
1428
1429         rt5631_write_mask(codec, RT5631_SPK_OUT_VOL, ((tmpvol1<<8)|tmpvol1), 0x3f3f);
1430         rt5631_write_mask(codec, RT5631_HP_OUT_VOL,  ((tmpvol2<<8)|tmpvol2), 0x3f3f);
1431 }
1432
1433 static void rt5631_set_eq(int on)
1434 {
1435         struct snd_soc_codec *codec = rt5631_codec;
1436         unsigned int Reg0C;
1437
1438         Reg0C = rt5631_read(codec, RT5631_STEREO_DAC_VOL_1);
1439         DBG("------- rt5631_set_eq: read Reg0C = 0x%04x\n", Reg0C);
1440
1441         Reg0C &= 0xFF80;
1442         if(on) { 
1443                 Reg0C |= 0x10;
1444         } else {
1445                 Reg0C |= 0x00;
1446         }
1447
1448         DBG("------- rt5631_set_eq: write Reg0C = 0x%04x\n", Reg0C);
1449         rt5631_write(codec, RT5631_STEREO_DAC_VOL_1, Reg0C);
1450 }
1451
1452 #else
1453
1454 static void rt5631_set_volume(int vollevel)
1455 {
1456         struct snd_soc_codec *codec = rt5631_codec;
1457         u8 tmpvol1, tmpvol2;
1458         u16 spk_vol, hp_vol;
1459
1460         DBG("rt5631_set_volume = %d\n", vollevel);
1461     
1462         if (vollevel > 15) vollevel = 8;
1463         gvolume = vollevel;
1464         
1465         tmpvol1 = voltab[0][vollevel];
1466         tmpvol2 = voltab[1][vollevel];
1467
1468         spk_vol = snd_soc_read(codec, RT5631_SPK_OUT_VOL);
1469         hp_vol  = snd_soc_read(codec, RT5631_HP_OUT_VOL);
1470
1471         DBG("\n\nold value: 0x%04x, 0x%04x\n", spk_vol & 0x3F3F, hp_vol & 0x3F3F);
1472         DBG("new value: 0x%04x\n", (tmpvol1<<8)|tmpvol1, (tmpvol2<<8)|tmpvol2);
1473
1474         spk_vol &= 0x3C3C;
1475         spk_vol |= (tmpvol1<<8)|tmpvol1;
1476         hp_vol  &= 0x3C3C;
1477         hp_vol  |= (tmpvol2<<8)|tmpvol2;
1478
1479         snd_soc_write(codec, RT5631_SPK_OUT_VOL, spk_vol);
1480         snd_soc_write(codec, RT5631_HP_OUT_VOL , hp_vol);
1481 }
1482
1483 #endif
1484 struct coeff_clk_div {
1485         u32 mclk;
1486         u32 bclk;
1487         u32 rate;
1488         u16 reg_val;
1489 };
1490
1491 /* PLL divisors yes*/
1492 struct pll_div {
1493         u32 pll_in;
1494         u32 pll_out;
1495         u16 reg_val;
1496 };
1497
1498 static const struct pll_div codec_master_pll_div[] = {
1499         {2048000,  8192000,  0x0ea0},
1500         {3686400,  8192000,  0x4e27},
1501         {12000000,  8192000,  0x456b},
1502         {13000000,  8192000,  0x495f},
1503         {13100000,  8192000,  0x0320},
1504         {2048000,  11289600,  0xf637},
1505         {3686400,  11289600,  0x2f22},
1506         {12000000,  11289600,  0x3e2f},
1507         {13000000,  11289600,  0x4d5b},
1508         {13100000,  11289600,  0x363b},
1509         {2048000,  16384000,  0x1ea0},
1510         {3686400,  16384000,  0x9e27},
1511         {12000000,  16384000,  0x452b},
1512         {13000000,  16384000,  0x542f},
1513         {13100000,  16384000,  0x03a0},
1514         {2048000,  16934400,  0xe625},
1515         {3686400,  16934400,  0x9126},
1516         {12000000,  16934400,  0x4d2c},
1517         {13000000,  16934400,  0x742f},
1518         {13100000,  16934400,  0x3c27},
1519         {2048000,  22579200,  0x2aa0},
1520         {3686400,  22579200,  0x2f20},
1521         {12000000,  22579200,  0x7e2f},
1522         {13000000,  22579200,  0x742f},
1523         {13100000,  22579200,  0x3c27},
1524         {2048000,  24576000,  0x2ea0},
1525         {3686400,  24576000,  0xee27},
1526         {12000000,  24576000,  0x2915},
1527         {13000000,  24576000,  0x772e},
1528         {13100000,  24576000,  0x0d20},
1529         {26000000,  24576000,  0x2027},
1530         {26000000,  22579200,  0x392f},
1531         {24576000,  22579200,  0x0921},
1532         {24576000,  24576000,  0x02a0},
1533 };
1534
1535 static const struct pll_div codec_slave_pll_div[] = {
1536         {256000,  2048000,  0x46f0},
1537         {256000,  4096000,  0x3ea0},
1538         {352800,         5644800,  0x3ea0},
1539         {512000,         8192000,  0x3ea0},
1540         {1024000,  8192000,  0x46f0},
1541         {705600,  11289600,  0x3ea0},
1542         {1024000,  16384000,  0x3ea0},
1543         {1411200,  22579200,  0x3ea0},
1544         {1536000,  24576000,  0x3ea0},
1545         {2048000,  16384000,  0x1ea0},
1546         {2822400,  22579200,  0x1ea0},
1547         {2822400,  45158400,  0x5ec0},
1548         {5644800,  45158400,  0x46f0},
1549         {3072000,  24576000,  0x1ea0},
1550         {3072000,  49152000,  0x5ec0},
1551         {6144000,  49152000,  0x46f0},
1552         {705600,  11289600,  0x3ea0},
1553         {705600,  8467200,  0x3ab0},
1554         {24576000,  24576000,  0x02a0},
1555         {1411200,  11289600,  0x1690},
1556         {2822400,  11289600,  0x0a90},
1557         {1536000,  12288000,  0x1690},
1558         {3072000,  12288000,  0x0a90},
1559 };
1560
1561 struct coeff_clk_div coeff_div[] = {
1562         /* sysclk is 256fs */
1563         {2048000,  8000 * 32,  8000, 0x1000},
1564         {2048000,  8000 * 64,  8000, 0x0000},
1565         {2822400,  11025 * 32,  11025,  0x1000},
1566         {2822400,  11025 * 64,  11025,  0x0000},
1567         {4096000,  16000 * 32,  16000,  0x1000},
1568         {4096000,  16000 * 64,  16000,  0x0000},
1569         {5644800,  22050 * 32,  22050,  0x1000},
1570         {5644800,  22050 * 64,  22050,  0x0000},
1571         {8192000,  32000 * 32,  32000,  0x1000},
1572         {8192000,  32000 * 64,  32000,  0x0000},
1573         {11289600,  44100 * 32,  44100,  0x1000},
1574         {11289600,  44100 * 64,  44100,  0x0000},
1575         {12288000,  48000 * 32,  48000,  0x1000},
1576         {12288000,  48000 * 64,  48000,  0x0000},
1577         {22579200,  88200 * 32,  88200,  0x1000},
1578         {22579200,  88200 * 64,  88200,  0x0000},
1579         {24576000,  96000 * 32,  96000,  0x1000},
1580         {24576000,  96000 * 64,  96000,  0x0000},
1581         {22579200,  176400 * 32,  176400,  0x1000},
1582         {22579200,  176400 * 64,  176400,  0x0000},
1583         {24576000,  192000 * 32,  192000,  0x1000},
1584         {24576000,  162000 * 64,  192000,  0x0000},
1585         /* sysclk is 512fs */
1586         {4096000,  8000 * 32,  8000, 0x3000},
1587         {4096000,  8000 * 64,  8000, 0x2000},
1588         {5644800,  11025 * 32,  11025, 0x3000},
1589         {5644800,  11025 * 64,  11025, 0x2000},
1590         {8192000,  16000 * 32,  16000, 0x3000},
1591         {8192000,  16000 * 64,  16000, 0x2000},
1592         {11289600,  22050 * 32,  22050, 0x3000},
1593         {11289600,  22050 * 64,  22050, 0x2000},
1594         {16384000,  32000 * 32,  32000, 0x3000},
1595         {16384000,  32000 * 64,  32000, 0x2000},
1596         {22579200,  44100 * 32,  44100, 0x3000},
1597         {22579200,  44100 * 64,  44100, 0x2000},
1598         {24576000,  48000 * 32,  48000, 0x3000},
1599         {24576000,  48000 * 64,  48000, 0x2000},
1600         {45158400,  88200 * 32,  88200, 0x3000},
1601         {45158400,  88200 * 64,  88200, 0x2000},
1602         {49152000,  96000 * 32,  96000, 0x3000},
1603         {49152000,  96000 * 64,  96000, 0x2000},
1604         /* sysclk is 24.576Mhz or 22.5792Mhz */
1605         {24576000,  8000 * 32,  8000,  0x7080},
1606         {24576000,  8000 * 64,  8000,  0x6080},
1607         {24576000,  16000 * 32,  16000,  0x5080},
1608         {24576000,  16000 * 64,  16000,  0x4080},
1609         {24576000,  24000 * 32,  24000,  0x5000},
1610         {24576000,  24000 * 64,  24000,  0x4000},
1611         {24576000,  32000 * 32,  32000,  0x3080},
1612         {24576000,  32000 * 64,  32000,  0x2080},
1613         {22579200,  11025 * 32,  11025,  0x7000},
1614         {22579200,  11025 * 64,  11025,  0x6000},
1615         {22579200,  22050 * 32,  22050,  0x5000},
1616         {22579200,  22050 * 64,  22050,  0x4000},
1617 };
1618
1619 static int get_coeff(int mclk, int rate, int timesofbclk)
1620 {
1621         int i;
1622
1623         for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
1624                 if (coeff_div[i].mclk == mclk && coeff_div[i].rate == rate &&
1625                         (coeff_div[i].bclk / coeff_div[i].rate) == timesofbclk)
1626                         return i;
1627         }
1628         return -EINVAL;
1629 }
1630
1631 static int get_coeff_in_slave_mode(int mclk, int rate)
1632 {
1633         return get_coeff(mclk, rate, timesofbclk);
1634 }
1635
1636 static int get_coeff_in_master_mode(int mclk, int rate, int bclk)
1637 {
1638         return get_coeff(mclk, rate, (bclk / rate));
1639 }
1640
1641 static void rt5631_set_dmic_params(struct snd_soc_codec *codec,
1642         struct snd_pcm_hw_params *params)
1643 {
1644         int rate;
1645
1646         rt5631_write_mask(codec, RT5631_GPIO_CTRL,
1647                 GPIO_PIN_FUN_SEL_GPIO_DIMC | GPIO_DMIC_FUN_SEL_DIMC,
1648                 GPIO_PIN_FUN_SEL_MASK | GPIO_DMIC_FUN_SEL_MASK);
1649         rt5631_write_mask(codec, RT5631_DIG_MIC_CTRL, DMIC_ENA, DMIC_ENA_MASK);
1650         rt5631_write_mask(codec, RT5631_DIG_MIC_CTRL,
1651                 DMIC_L_CH_LATCH_FALLING | DMIC_R_CH_LATCH_RISING,
1652                 DMIC_L_CH_LATCH_MASK|DMIC_R_CH_LATCH_MASK);
1653
1654         rate = params_rate(params);
1655         switch (rate) {
1656         case 44100:
1657         case 48000:
1658                 rt5631_write_mask(codec, RT5631_DIG_MIC_CTRL,
1659                         DMIC_CLK_CTRL_TO_32FS, DMIC_CLK_CTRL_MASK);
1660                 break;
1661
1662         case 32000:
1663         case 22050:
1664                 rt5631_write_mask(codec, RT5631_DIG_MIC_CTRL,
1665                         DMIC_CLK_CTRL_TO_64FS, DMIC_CLK_CTRL_MASK);
1666                 break;
1667
1668         case 16000:
1669         case 11025:
1670         case 8000:
1671                 rt5631_write_mask(codec, RT5631_DIG_MIC_CTRL,
1672                         DMIC_CLK_CTRL_TO_128FS, DMIC_CLK_CTRL_MASK);
1673                 break;
1674
1675         default:
1676                 break;
1677         }
1678
1679         rt5631_write_mask(codec, RT5631_DIG_MIC_CTRL,
1680                 DMIC_L_CH_UNMUTE | DMIC_R_CH_UNMUTE,
1681                 DMIC_L_CH_MUTE_MASK | DMIC_R_CH_MUTE_MASK);
1682
1683         return;
1684 }
1685
1686 static int rt5631_hifi_pcm_params(struct snd_pcm_substream *substream,
1687                 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1688 {
1689         struct snd_soc_pcm_runtime *rtd = substream->private_data;
1690         struct snd_soc_codec *codec = rtd->codec;
1691         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
1692         int stream = substream->stream, rate = params_rate(params), coeff;
1693         unsigned int iface = 0;
1694
1695         pr_debug("enter %s\n", __func__);
1696
1697         if (!rt5631->master)
1698                 coeff = get_coeff_in_slave_mode(rt5631->sysclk, rate);
1699         else
1700                 coeff = get_coeff_in_master_mode(rt5631->sysclk, rate,
1701                                         rate * timesofbclk);
1702         if (coeff < 0)
1703                 pr_err("%s: get coeff err!\n", __func__);
1704
1705         switch (params_format(params)) {
1706         case SNDRV_PCM_FORMAT_S16_LE:
1707                 break;
1708         case SNDRV_PCM_FORMAT_S20_3LE:
1709                 iface |= SDP_I2S_DL_20;
1710                 break;
1711         case SNDRV_PCM_FORMAT_S24_LE:
1712                 iface |= SDP_I2S_DL_24;
1713                 break;
1714         case SNDRV_PCM_FORMAT_S8:
1715                 iface |= SDP_I2S_DL_8;
1716                 break;
1717         default:
1718                 return -EINVAL;
1719         }
1720
1721         if (SNDRV_PCM_STREAM_CAPTURE == stream) {
1722                 if (rt5631->dmic_used_flag)
1723                         rt5631_set_dmic_params(codec, params);
1724         }
1725
1726         rt5631_write_mask(codec, RT5631_SDP_CTRL, iface, SDP_I2S_DL_MASK);
1727
1728         if (coeff >= 0)
1729                 rt5631_write(codec, RT5631_STEREO_AD_DA_CLK_CTRL,
1730                                         coeff_div[coeff].reg_val);
1731
1732         return 0;
1733 }
1734
1735 static int rt5631_hifi_codec_set_dai_fmt(struct snd_soc_dai *codec_dai,
1736                                                 unsigned int fmt)
1737 {
1738         struct snd_soc_codec *codec = codec_dai->codec;
1739         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
1740         unsigned int iface = 0;
1741
1742         pr_debug("enter %s\n", __func__);
1743
1744         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1745         case SND_SOC_DAIFMT_CBM_CFM:
1746                 rt5631->master = 1;
1747                 break;
1748         case SND_SOC_DAIFMT_CBS_CFS:
1749                 iface |= SDP_MODE_SEL_SLAVE;
1750                 rt5631->master = 0;
1751                 break;
1752         default:
1753                 return -EINVAL;
1754         }
1755
1756         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1757         case SND_SOC_DAIFMT_I2S:
1758                 break;
1759         case SND_SOC_DAIFMT_LEFT_J:
1760                 iface |= SDP_I2S_DF_LEFT;
1761                 break;
1762         case SND_SOC_DAIFMT_DSP_A:
1763                 iface |= SDP_I2S_DF_PCM_A;
1764                 break;
1765         case SND_SOC_DAIFMT_DSP_B:
1766                 iface  |= SDP_I2S_DF_PCM_B;
1767                 break;
1768         default:
1769                 return -EINVAL;
1770         }
1771
1772         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1773         case SND_SOC_DAIFMT_NB_NF:
1774                 break;
1775         case SND_SOC_DAIFMT_IB_NF:
1776                 iface |= SDP_I2S_BCLK_POL_CTRL;
1777                 break;
1778         default:
1779                 return -EINVAL;
1780         }
1781
1782         rt5631_write(codec, RT5631_SDP_CTRL, iface);
1783
1784         return 0;
1785 }
1786
1787 static int rt5631_hifi_codec_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1788                                 int clk_id, unsigned int freq, int dir)
1789 {
1790         struct snd_soc_codec *codec = codec_dai->codec;
1791         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
1792
1793         DBG("enter %s, syclk=%d\n", __func__, freq);
1794         if ((freq >= (256 * 8000)) && (freq <= (512 * 96000))) {
1795                 rt5631->sysclk = freq;
1796                 return 0;
1797         }
1798
1799         pr_info("unsupported sysclk freq %u for audio i2s\n", freq);
1800         pr_info("set sysclk to 24.576Mhz by default\n");
1801
1802         rt5631->sysclk = 24576000;
1803         return 0;
1804 }
1805
1806 static int rt5631_codec_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
1807                 int source, unsigned int freq_in, unsigned int freq_out)
1808 {
1809         struct snd_soc_codec *codec = codec_dai->codec;
1810         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
1811         int i, ret = -EINVAL;
1812
1813         DBG(KERN_DEBUG "enter %s\n", __func__);
1814
1815         if (!freq_in || !freq_out)
1816                 return 0;
1817
1818         if (rt5631->master) {
1819                 for (i = 0; i < ARRAY_SIZE(codec_master_pll_div); i++)
1820                         if (freq_in == codec_master_pll_div[i].pll_in &&
1821                         freq_out == codec_master_pll_div[i].pll_out) {
1822                                 rt5631_write(codec, RT5631_PLL_CTRL,
1823                                         codec_master_pll_div[i].reg_val);
1824                                 schedule_timeout_uninterruptible(
1825                                         msecs_to_jiffies(20));
1826                                 rt5631_write(codec, RT5631_GLOBAL_CLK_CTRL,
1827                                         SYSCLK_SOUR_SEL_PLL);
1828                                 rt5631->pll_used_flag = 1;
1829                                 ret = 0;
1830                                 break;
1831                         }
1832         } else {
1833                 for (i = 0; i < ARRAY_SIZE(codec_slave_pll_div); i++)
1834                         if (freq_in == codec_slave_pll_div[i].pll_in &&
1835                         freq_out == codec_slave_pll_div[i].pll_out) {
1836                                 rt5631_write(codec, RT5631_PLL_CTRL,
1837                                         codec_slave_pll_div[i].reg_val);
1838                                 schedule_timeout_uninterruptible(
1839                                         msecs_to_jiffies(20));
1840                                 rt5631_write(codec, RT5631_GLOBAL_CLK_CTRL,
1841                                         SYSCLK_SOUR_SEL_PLL |
1842                                         PLLCLK_SOUR_SEL_BITCLK);
1843                                 rt5631->pll_used_flag = 1;
1844                                 ret = 0;
1845                                 break;
1846                         }
1847         }
1848
1849         return ret;
1850 }
1851
1852 #if defined(CONFIG_ADJUST_VOL_BY_CODEC)
1853 static int rt5631_trigger(struct snd_pcm_substream *substream, int status, struct snd_soc_dai *dai)
1854 {
1855         //DBG("rt5631_trigger\n");
1856         if(status == SNDRV_PCM_TRIGGER_VOLUME){
1857                 //DBG("rt5631_trigger: vol = %d\n", substream->number);
1858                 if(substream->number < 100){
1859                         rt5631_set_volume(substream->number);
1860                 } else {
1861                         if(substream->number == 100) { // eq off
1862                                 DBG("---------- eq off\n");
1863                                 rt5631_set_eq(0);
1864                         } else { // eq on   +6dB
1865                                 DBG("---------- eq on\n");
1866                                 rt5631_set_eq(1);
1867                         }
1868                 }               
1869         }
1870
1871         return 0;
1872 }
1873 #endif
1874
1875 static ssize_t rt5631_index_reg_show(struct device *dev,
1876         struct device_attribute *attr, char *buf)
1877 {
1878         #define IDX_REG_FMT "%02x: %04x\n"
1879         #define IDX_REG_LEN 9
1880         unsigned int val;
1881         int cnt = 0, i;
1882
1883         cnt += sprintf(buf, "RT5631 index register\n");
1884         for (i = 0; i < 0x55; i++) {
1885                 if (cnt + IDX_REG_LEN >= PAGE_SIZE - 1)
1886                         break;
1887                 val = rt5631_read_index(rt5631_codec, i);
1888                 if (!val)
1889                         continue;
1890                 cnt += sprintf(buf + cnt, IDX_REG_FMT, i, val);
1891         }
1892
1893         if (cnt >= PAGE_SIZE)
1894                 cnt = PAGE_SIZE - 1;
1895
1896         return cnt;
1897 }
1898 static DEVICE_ATTR(index_reg, 0444, rt5631_index_reg_show, NULL);
1899
1900 #define RT5631_STEREO_RATES SNDRV_PCM_RATE_8000_192000
1901 #define RT5631_FORMAT   (SNDRV_PCM_FMTBIT_S16_LE | \
1902                         SNDRV_PCM_FMTBIT_S20_3LE | \
1903                         SNDRV_PCM_FMTBIT_S24_LE | \
1904                         SNDRV_PCM_FMTBIT_S8)
1905
1906 struct snd_soc_dai_ops rt5631_ops = {
1907         .hw_params = rt5631_hifi_pcm_params,
1908         .set_fmt = rt5631_hifi_codec_set_dai_fmt,
1909         .set_sysclk = rt5631_hifi_codec_set_dai_sysclk,
1910         .set_pll = rt5631_codec_set_dai_pll,
1911 #if defined(CONFIG_ADJUST_VOL_BY_CODEC)
1912     .trigger = rt5631_trigger,
1913 #endif
1914 };
1915
1916 struct snd_soc_dai_driver rt5631_dai[] = {
1917         {
1918                 .name = "RT5631 HiFi",
1919                 .playback = {
1920                         .stream_name = "HIFI Playback",
1921                         .channels_min = 1,
1922                         .channels_max = 2,
1923                         .rates = RT5631_STEREO_RATES,
1924                         .formats = RT5631_FORMAT,
1925                 },
1926                 .capture = {
1927                         .stream_name = "HIFI Capture",
1928                         .channels_min = 1,
1929                         .channels_max = 2,
1930                         .rates = RT5631_STEREO_RATES,
1931                         .formats = RT5631_FORMAT,
1932                 },
1933                 .ops = &rt5631_ops,
1934         },
1935 };
1936 EXPORT_SYMBOL_GPL(rt5631_dai);
1937
1938 static int rt5631_set_bias_level(struct snd_soc_codec *codec,
1939                         enum snd_soc_bias_level level)
1940 {
1941         switch (level) {
1942         case SND_SOC_BIAS_ON:
1943                 break;
1944
1945         case SND_SOC_BIAS_PREPARE:
1946                 rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3,
1947                         PWR_VREF | PWR_MAIN_BIAS, PWR_VREF | PWR_MAIN_BIAS);
1948                 rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD2,
1949                         PWR_MICBIAS1_VOL | PWR_MICBIAS2_VOL,
1950                         PWR_MICBIAS1_VOL | PWR_MICBIAS2_VOL);
1951                 break;
1952
1953         case SND_SOC_BIAS_STANDBY:
1954         //      rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD2, 0,
1955         //              PWR_MICBIAS1_VOL | PWR_MICBIAS2_VOL);
1956                 printk("standby rt5631\n");
1957                 rt5631_write(codec, RT5631_PWR_MANAG_ADD1, 0x0000);
1958                 rt5631_write(codec, RT5631_PWR_MANAG_ADD2, 0x0000);
1959                 rt5631_write(codec, RT5631_PWR_MANAG_ADD3, 0x0000);
1960                 rt5631_write(codec, RT5631_PWR_MANAG_ADD4, 0x0000);             
1961                 break;
1962
1963         case SND_SOC_BIAS_OFF:
1964                 rt5631_write_mask(codec, RT5631_SPK_OUT_VOL,
1965                         RT_L_MUTE | RT_R_MUTE, RT_L_MUTE | RT_R_MUTE);
1966                 rt5631_write_mask(codec, RT5631_HP_OUT_VOL,
1967                         RT_L_MUTE | RT_R_MUTE, RT_L_MUTE | RT_R_MUTE);
1968                 rt5631_write(codec, RT5631_PWR_MANAG_ADD1, 0x0000);
1969                 rt5631_write(codec, RT5631_PWR_MANAG_ADD2, 0x0000);
1970                 rt5631_write(codec, RT5631_PWR_MANAG_ADD3, 0x0000);
1971                 rt5631_write(codec, RT5631_PWR_MANAG_ADD4, 0x0000);
1972                 break;
1973
1974         default:
1975                 break;
1976         }
1977         codec->dapm.bias_level = level;
1978
1979         return 0;
1980 }
1981
1982 static int rt5631_probe(struct snd_soc_codec *codec)
1983 {
1984         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
1985         unsigned int val;
1986         int ret;
1987         ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C);
1988         if (ret != 0) {
1989                 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
1990                 return ret;
1991         }
1992         codec->cache_bypass = 1;
1993
1994         val = rt5631_read_index(codec, RT5631_ADDA_MIXER_INTL_REG3);
1995         if (val & 0x0002)
1996                 rt5631->codec_version = 1;
1997         else
1998                 rt5631->codec_version = 0;
1999
2000         rt5631_reset(codec);
2001         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3,
2002                 PWR_VREF | PWR_MAIN_BIAS, PWR_VREF | PWR_MAIN_BIAS);
2003         schedule_timeout_uninterruptible(msecs_to_jiffies(80));
2004         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3, PWR_FAST_VREF_CTRL,
2005                                         PWR_FAST_VREF_CTRL);
2006         rt5631_reg_init(codec);
2007
2008         /* power off ClassD auto Recovery */
2009         if (rt5631->codec_version)
2010                 rt5631_write_mask(codec, RT5631_INT_ST_IRQ_CTRL_2,
2011                                         0x2000, 0x2000);
2012         else
2013                 rt5631_write_mask(codec, RT5631_INT_ST_IRQ_CTRL_2,
2014                                         0, 0x2000);
2015
2016         codec->dapm.bias_level = SND_SOC_BIAS_STANDBY;
2017         rt5631_codec = codec;
2018
2019 #if (RT5631_SPK_TIMER == 1)
2020         /* Timer module installing */
2021         setup_timer( &spk_timer, spk_timer_callback, 0 );
2022         DBG( "Starting timer to fire in 5s (%ld)\n", jiffies );
2023         ret = mod_timer( &spk_timer, jiffies + msecs_to_jiffies(5000) );
2024         if (ret) printk("Error in mod_timer\n");
2025
2026         INIT_WORK(&spk_work, spk_work_handler);
2027 #endif
2028 //bard 7-16 s
2029         INIT_DELAYED_WORK(&rt5631_delay_cap,rt5631_adc_on);
2030 //bard 7-16 e
2031         snd_soc_add_controls(codec, rt5631_snd_controls,
2032                 ARRAY_SIZE(rt5631_snd_controls));
2033         rt5631_add_widgets(codec);
2034
2035         ret = device_create_file(codec->dev, &dev_attr_index_reg);
2036         if (ret != 0) {
2037                 dev_err(codec->dev,
2038                         "Failed to create index_reg sysfs files: %d\n", ret);
2039                 return ret;
2040         }
2041
2042         DBG("RT5631 initial ok!\n");
2043
2044         return 0;
2045 }
2046
2047 static int rt5631_remove(struct snd_soc_codec *codec)
2048 {
2049
2050
2051 #if (RT5631_SPK_TIMER == 1)     
2052         /* Timer¡¡module¡¡uninstalling */
2053         int ret;
2054         ret = del_timer(&spk_timer);
2055         if(ret) printk("The timer is still in use...\n");
2056         DBG("Timer module uninstalling\n");
2057 #endif
2058
2059
2060         rt5631_set_bias_level(codec, SND_SOC_BIAS_OFF);
2061         return 0;
2062 }
2063
2064 static int rt5631_suspend(struct snd_soc_codec *codec, pm_message_t state)
2065 {
2066         rt5631_set_bias_level(codec, SND_SOC_BIAS_OFF);
2067         return 0;
2068 }
2069
2070 static int rt5631_resume(struct snd_soc_codec *codec)
2071 {
2072         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
2073
2074         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3,
2075                 PWR_VREF | PWR_MAIN_BIAS, PWR_VREF | PWR_MAIN_BIAS);
2076         schedule_timeout_uninterruptible(msecs_to_jiffies(110));
2077         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3,
2078                 PWR_FAST_VREF_CTRL, PWR_FAST_VREF_CTRL);
2079         rt5631_reg_init(codec);
2080
2081         /* power off ClassD auto Recovery */
2082         if (rt5631->codec_version)
2083                 rt5631_write_mask(codec, RT5631_INT_ST_IRQ_CTRL_2,
2084                                         0x2000, 0x2000);
2085         else
2086                 rt5631_write_mask(codec, RT5631_INT_ST_IRQ_CTRL_2,
2087                                         0, 0x2000);
2088
2089 #if (RT5631_SPK_TIMER == 1)
2090                 //last_is_spk = !last_is_spk;   //wired~, update eqmode right here by spk_timer.
2091                 last_is_spk = -1;       //wired~, update eqmode right here by spk_timer. //bard 9-13
2092 #endif
2093
2094         return 0;
2095 }
2096
2097 void codec_set_spk(bool on)
2098 {
2099         struct snd_soc_codec *codec = rt5631_codec;
2100
2101         DBG("%s: %d\n", __func__, on);
2102
2103         if(!codec)
2104                 return;
2105         mutex_lock(&codec->mutex);
2106         if(on){
2107                 DBG("snd_soc_dapm_enable_pin\n");
2108                 snd_soc_dapm_enable_pin(&codec->dapm, "Headphone Jack");
2109                 snd_soc_dapm_enable_pin(&codec->dapm, "Ext Spk");
2110         }
2111         else{
2112                 DBG("snd_soc_dapm_disable_pin\n");
2113                 snd_soc_dapm_disable_pin(&codec->dapm, "Headphone Jack");
2114                 snd_soc_dapm_disable_pin(&codec->dapm, "Ext Spk");
2115         }
2116
2117         snd_soc_dapm_sync(&codec->dapm);
2118         mutex_unlock(&codec->mutex);
2119         return;
2120 }
2121
2122 /*
2123  * detect short current for mic1
2124  */
2125 int rt5631_ext_mic_detect(void)
2126 {
2127         struct snd_soc_codec *codec = rt5631_codec;
2128         int det;
2129
2130         rt5631_write_mask(codec, RT5631_MIC_CTRL_2, MICBIAS1_S_C_DET_ENA,
2131                                 MICBIAS1_S_C_DET_MASK);
2132         det = rt5631_read(codec, RT5631_INT_ST_IRQ_CTRL_2) & 0x0001;
2133         rt5631_write_mask(codec, RT5631_INT_ST_IRQ_CTRL_2, 0x0001, 0x00001);
2134
2135         return det;
2136 }
2137 EXPORT_SYMBOL_GPL(rt5631_ext_mic_detect);
2138
2139 static struct snd_soc_codec_driver soc_codec_dev_rt5631 = {
2140         .probe = rt5631_probe,
2141         .remove = rt5631_remove,
2142         .suspend = rt5631_suspend,
2143         .resume = rt5631_resume,
2144         .set_bias_level = rt5631_set_bias_level,
2145         .reg_cache_size = ARRAY_SIZE(rt5631_reg),
2146         .reg_word_size = sizeof(u16),
2147         .reg_cache_default = rt5631_reg,
2148         .reg_cache_step = 1,
2149 };
2150
2151 void rt5631_shutdown(struct i2c_client *client)
2152 {
2153         rt5631_set_bias_level(rt5631_codec, SND_SOC_BIAS_OFF);
2154 }
2155
2156
2157 static const struct i2c_device_id rt5631_i2c_id[] = {
2158         { "rt5631", 0 },
2159         { }
2160 };
2161 MODULE_DEVICE_TABLE(i2c, rt5631_i2c_id);
2162
2163 static int rt5631_i2c_probe(struct i2c_client *i2c,
2164                     const struct i2c_device_id *id)
2165 {
2166         struct rt5631_priv *rt5631;
2167         int ret;
2168
2169         printk("RT5631 Audio Codec %s\n", RT5631_VERSION);
2170
2171         rt5631 = kzalloc(sizeof(struct rt5631_priv), GFP_KERNEL);
2172         if (NULL == rt5631)
2173                 return -ENOMEM;
2174
2175         i2c_set_clientdata(i2c, rt5631);
2176
2177         ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5631,
2178                         rt5631_dai, ARRAY_SIZE(rt5631_dai));
2179         if (ret < 0)
2180                 kfree(rt5631);
2181
2182         return ret;
2183 }
2184
2185 static __devexit int rt5631_i2c_remove(struct i2c_client *client)
2186 {
2187         snd_soc_unregister_codec(&client->dev);
2188         kfree(i2c_get_clientdata(client));
2189         return 0;
2190 }
2191
2192 struct i2c_driver rt5631_i2c_driver = {
2193         .driver = {
2194                 .name = "RT5631",
2195                 .owner = THIS_MODULE,
2196         },
2197         .probe = rt5631_i2c_probe,
2198         .remove   = __devexit_p(rt5631_i2c_remove),
2199         .id_table = rt5631_i2c_id,
2200         .shutdown = rt5631_shutdown,
2201 };
2202
2203 static int __init rt5631_modinit(void)
2204 {
2205         return i2c_add_driver(&rt5631_i2c_driver);
2206 }
2207 module_init(rt5631_modinit);
2208
2209 static void __exit rt5631_modexit(void)
2210 {
2211         i2c_del_driver(&rt5631_i2c_driver);
2212 }
2213 module_exit(rt5631_modexit);
2214
2215 MODULE_DESCRIPTION("ASoC RT5631 driver");
2216 MODULE_AUTHOR("flove <flove@realtek.com>");
2217 MODULE_LICENSE("GPL");