sound/soc/codecs/rt5512.c

   1 #include <linux/module.h>
   2 #include <linux/kernel.h>
   3 #include <linux/init.h>
   4 #include <linux/i2c.h>
   5 #include <linux/slab.h>
   6 #include <linux/err.h>
   7 #include <linux/delay.h>
   8
   9 #ifdef CONFIG_DEBUG_FS
  10 #include <linux/uaccess.h>
  11 #include <linux/debugfs.h>
  12 #include <linux/slab.h>
  13 #include <linux/string.h>
  14 #endif
  15
  16 #include <sound/soc.h>
  17 #include <sound/soc-dai.h>
  18 #include <sound/soc-dapm.h>
  19 #include <sound/pcm.h>
  20 #include <sound/pcm_params.h>
  21 #include <sound/tlv.h>
  22 #include <sound/jack.h>
  23
  24 #include "rt5512.h"
  25
  26 #define RT5512_SRATE_MASK 0x7
  27 #define RT5512_AUDBIT_MASK 0x3
  28 #define RT5512_MCLKSELBIT_MASK 0xf
  29 #define RT5512_CLKBASEBIT_MASK 0x2
  30 #define RT5512_AUDFMT_MASK 0xc
  31 #define RT5512_PDBIT_MASK 0x40
  32 #define RT5512_RSTBIT_MASK 0x80
  33
  34 #define RT5512_RATES SNDRV_PCM_RATE_8000_96000
  35 #define RT5512_FORMATS (SNDRV_PCM_FMTBIT_S16_LE|SNDRV_PCM_FMTBIT_S20_3LE|SNDRV_PCM_FMTBIT_S24_LE)
  36
  37 #define RT5512_MAX_REG 0xEC
  38 #define RT5512_VIRTUAL_REG      0xEC
  39
  40 struct rt5512_codec_reg
  41 {
  42         unsigned char reg_size;
  43         unsigned int reg_cache;  // support maximum 4 byte data
  44         unsigned char sync_needed;
  45 };
  46
  47 static struct rt5512_codec_reg rt5512_reg_priv[RT5512_MAX_REG+1] =
  48 {
  49         [0x00] = { 1, 0, 0},
  50         [0x01] = { 1, 0, 0},
  51         [0x02] = { 1, 0, 0},
  52         [0x03] = { 1, 0, 0},
  53         [0x04] = { 1, 0, 0},
  54         [0x05] = { 1, 0, 0},
  55         [0x06] = { 1, 0, 0},
  56         [0x07] = { 1, 0, 0},
  57         [0x08] = { 4, 0, 0},
  58         [0x09] = { 4, 0, 0},
  59         [0x0A] = { 4, 0, 0},
  60         [0x0B] = { 4, 0, 0},
  61         [0x0C] = { 4, 0, 0},
  62         [0x0D] = { 4, 0, 0},
  63         [0x0E] = { 4, 0, 0},
  64         [0x0F] = { 4, 0, 0},
  65         [0x10] = { 1, 0, 0},
  66         [0x11] = { 1, 0, 0},
  67         [0x12] = { 1, 0, 0},
  68         [0x13] = { 1, 0, 0},
  69         [0x14] = { 1, 0, 0},
  70         [0x15] = { 1, 0, 0},
  71         [0x16] = { 1, 0, 0},
  72         [0x17] = { 1, 0, 0},
  73         [0x1A] = { 1, 0, 0},
  74         [0x1B] = { 1, 0, 0},
  75         [0x1C] = { 1, 0, 0},
  76         [0x1D] = { 4, 0, 0},
  77         [0x1F] = { 1, 0, 0},
  78         [0x20] = { 20, 0, 0},
  79         [0x21] = { 20, 0, 0},
  80         [0x22] = { 20, 0, 0},
  81         [0x23] = { 20, 0, 0},
  82         [0x24] = { 20, 0, 0},
  83         [0x25] = { 20, 0, 0},
  84         [0x26] = { 20, 0, 0},
  85         [0x27] = { 20, 0, 0},
  86         [0x28] = { 20, 0, 0},
  87         [0x29] = { 20, 0, 0},
  88         [0x2A] = { 20, 0, 0},
  89         [0x2B] = { 20, 0, 0},
  90         [0x2C] = { 20, 0, 0},
  91         [0x30] = { 1, 0, 0},
  92         [0x31] = { 1, 0, 0},
  93         [0x38] = { 8, 0, 0},
  94         [0x39] = { 8, 0, 0},
  95         [0x3A] = { 8, 0, 0},
  96         [0x3B] = { 8, 0, 0},
  97         [0x3C] = { 8, 0, 0},
  98         [0x3D] = { 8, 0, 0},
  99         [0x3E] = { 8, 0, 0},
 100         [0x3F] = { 8, 0, 0},
 101         [0x40] = { 16, 0, 0},
 102         [0x41] = { 16, 0, 0},
 103         [0x42] = { 16, 0, 0},
 104         [0x43] = { 16, 0, 0},
 105         [0x44] = { 16, 0, 0},
 106         [0x45] = { 16, 0, 0},
 107         [0x50] = { 1, 0, 0},
 108         [0x51] = { 1, 0, 0},
 109         [0x52] = { 1, 0, 0},
 110         [0x55] = { 4, 0, 0},
 111         [0x56] = { 1, 0, 0},
 112         [0x57] = { 1, 0, 0},
 113         [0x58] = { 1, 0, 0},
 114         [0x59] = { 1, 0, 0},
 115         [0x5B] = { 1, 0, 0},
 116         [0x5C] = { 1, 0, 0},
 117         [0x5D] = { 1, 0, 0},
 118         [0x75] = { 1, 0, 0},
 119         [0x78] = { 1, 0, 0},
 120         [0x80] = { 1, 0, 0},
 121         [0x81] = { 1, 0, 0},
 122         [0x82] = { 1, 0, 0},
 123         [0x83] = { 1, 0, 0},
 124         [0x84] = { 1, 0, 0},
 125         [0x85] = { 1, 0, 0},
 126         [0x86] = { 1, 0, 0},
 127         [0x87] = { 1, 0, 0},
 128         [0x88] = { 1, 0, 0},
 129         [0x89] = { 1, 0, 0},
 130         [0x8A] = { 1, 0, 0},
 131         [0x8B] = { 1, 0, 0},
 132         [0x8C] = { 1, 0, 0},
 133         [0x8D] = { 1, 0, 0},
 134         [0x8E] = { 1, 0, 0},
 135         [0x8F] = { 1, 0, 0},
 136         [0x90] = { 1, 0, 0},
 137         [0x91] = { 1, 0, 0},
 138         [0x92] = { 1, 0, 0},
 139         [0x93] = { 1, 0, 0},
 140         [0x94] = { 1, 0, 0},
 141         [0x95] = { 1, 0, 0},
 142         [0x96] = { 1, 0, 0},
 143         [0x97] = { 1, 0, 0},
 144         [0x98] = { 1, 0, 0},
 145         [0x99] = { 1, 0, 0},
 146         [0x9A] = { 1, 0, 0},
 147         [0x9B] = { 1, 0, 0},
 148         [0x9C] = { 1, 0, 0},
 149         [0x9D] = { 1, 0, 0},
 150         [0x9E] = { 1, 0, 0},
 151         [0x9F] = { 1, 0, 0},
 152         [0xA0] = { 1, 0, 0},
 153         [0xA1] = { 1, 0, 0},
 154         [0xA2] = { 1, 0, 0},
 155         [0xA3] = { 1, 0, 0},
 156         [0xA4] = { 1, 0, 0},
 157         [0xA5] = { 1, 0, 0},
 158         [0xA6] = { 1, 0, 0},
 159         [0xA7] = { 1, 0, 0},
 160         [0xA8] = { 1, 0, 0},
 161         [0xCA] = { 1, 0, 0},
 162         [0xCC] = { 1, 0, 0},
 163         [0xCD] = { 1, 0, 0},
 164         [0xCE] = { 1, 0, 0},
 165     [0xE0] = { 1, 0, 0},
 166         [0xE8] = { 1, 0, 0},
 167         [0xEB] = { 1, 0, 0},
 168         [0xEC] = { 4, 0, 0},
 169 };
 170
 171 #if FOR_MID
 172
 173 struct rt5512_init_reg {
 174     u8 reg;
 175     u32 regval;
 176 };
 177
 178 static struct rt5512_init_reg init_list[] = {
 179     /*playback*/
 180     {0x10 , 0x30},
 181     {0x11 , 0x30},
 182     {0x82 , 0x30},
 183     {0x84 , 0x03},
 184     {0x8c , 0x09},
 185     {0xec , 0x27c},
 186     /*record*/
 187     {0x95 , 0x82},
 188     {0x85 , 0x30},
 189 };
 190 #define RT5512_INIT_REG_LEN ARRAY_SIZE(init_list)
 191
 192 static int rt5512_reg_init(struct snd_soc_codec *codec)
 193 {
 194         int i;
 195
 196         for (i = 0; i < RT5512_INIT_REG_LEN; i++)
 197                 snd_soc_write(codec, init_list[i].reg, init_list[i].regval);
 198
 199         return 0;
 200 }
 201 #endif
 202
 203 static int rt5512_hw_params(struct snd_pcm_substream *substream,
 204                 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
 205 {
 206         struct snd_soc_codec *codec = dai->codec;
 207         unsigned short  srate_reg;
 208         unsigned int new_srate_regval, new_datfmt_regval;
 209
 210         // set sampling rate
 211         RT_DBG("codec hw_param\n");
 212         RT_DBG("codec hw_param dai id %d\n", dai->id);
 213         switch (dai->id)
 214         {
 215                 case 0: // AIF1
 216                         srate_reg = 0x03;
 217                         break;
 218                 case 1: // AIF2
 219                         srate_reg = 0x04;
 220                         break;
 221                 default:
 222                         dev_err(codec->dev, "this codec dai id is not supported\n");
 223                         return -EINVAL;
 224         }
 225
 226         RT_DBG("codec hw_param rate%d\n", params_rate(params));
 227         switch (params_rate(params))
 228         {
 229                 case 8000:
 230                         new_srate_regval = 0x0;
 231                         break;
 232                 case 11025:
 233                 case 12000:
 234                         new_srate_regval = 0x1;
 235                         break;
 236                 case 16000:
 237                         new_srate_regval = 0x2;
 238                         break;
 239                 case 22050:
 240                 case 24000:
 241                         new_srate_regval = 0x3;
 242                         break;
 243                 case 32000:
 244                         new_srate_regval = 0x4;
 245                         break;
 246                 case 44100:
 247                 case 48000:
 248                         new_srate_regval = 0x5;
 249                         break;
 250                 case 88200:
 251                 case 96000:
 252                         new_srate_regval = 0x6;
 253                         break;
 254                 default:
 255                         dev_err(codec->dev, "not supported sampling rate\n");
 256                         return -EINVAL;
 257         }
 258         snd_soc_update_bits(codec, srate_reg, RT5512_SRATE_MASK, new_srate_regval);
 259
 260         // set data format
 261         RT_DBG("codec hw_param format%d\n", params_format(params));
 262         switch (params_format(params))
 263         {
 264                 case SNDRV_PCM_FORMAT_S16_LE:
 265                         new_datfmt_regval = 0x3;
 266                         break;
 267                 case SNDRV_PCM_FORMAT_S20_3LE:
 268                         new_datfmt_regval = 0x1;
 269                         break;
 270                 case SNDRV_PCM_FORMAT_S24_LE:
 271                         new_datfmt_regval = 0x0;
 272                         break;
 273                 default:
 274                         dev_err(codec->dev, "not supported data bit format\n");
 275                         return -EINVAL;
 276         }
 277         snd_soc_update_bits(codec, 0x02, RT5512_AUDBIT_MASK, new_datfmt_regval);
 278
 279         RT_DBG("stream direction %d\n", substream->stream);
 280         if (substream->stream == 0)  //Playback
 281                 snd_soc_write(codec, 0x56, 0xA4);
 282         else if (substream->stream == 1) //Record
 283         {
 284                 snd_soc_update_bits(codec, 0x9F, 0xC0, 0x40);
 285                 snd_soc_update_bits(codec, 0x81, 0x40, 0x00);
 286                 snd_soc_write(codec, 0x9E, 0x00);
 287         }
 288
 289         RT_DBG("special register configuration\n");
 290     snd_soc_write(codec, 0xE0, 0x2F);
 291         snd_soc_write(codec, 0xEB, 0xB4);
 292         snd_soc_write(codec, 0xE8, 0x53);
 293
 294         return 0;
 295 }
 296
 297 static int rt5512_set_dai_sysclk(struct snd_soc_dai *dai,
 298                 int clk_id, unsigned int freq, int dir)
 299 {
 300         struct snd_soc_codec *codec = dai->codec;
 301         unsigned int new_mclk_sel, new_clk_basesel;
 302
 303         RT_DBG("codec dai_sysclk\n");
 304         switch (dai->id)
 305         {
 306                 case 0: // AIF1
 307                         new_mclk_sel = 0x1;
 308                         break;
 309                 case 1: // AIF2
 310                         new_mclk_sel = 0x1;
 311                         break;
 312                 default:
 313                         dev_err(codec->dev, "no this codec dai id\n");
 314                         return -EINVAL;
 315         }
 316         snd_soc_update_bits(codec, 0x01, RT5512_MCLKSELBIT_MASK, new_mclk_sel);
 317
 318         if (freq == 11289600)   //22.579200 MHz
 319                 new_clk_basesel = RT5512_CLKBASEBIT_MASK;
 320         else                    //24.576000  MHz
 321                 new_clk_basesel = 0;
 322
 323         snd_soc_update_bits(codec, 0x1A, RT5512_CLKBASEBIT_MASK, new_clk_basesel);
 324
 325         snd_soc_dapm_sync(&codec->dapm);
 326         return 0;
 327 }
 328
 329 static int rt5512_digital_mute(struct snd_soc_dai *dai, int mute)
 330 {
 331         struct snd_soc_codec *codec = dai->codec;
 332         unsigned int mute_mask;
 333
 334         RT_DBG("codec digital_mute id = %d\n", dai->id);
 335         switch (dai->id)
 336         {
 337                 case 0:  // AIF1
 338                         mute_mask = 0x03;
 339                         break;
 340                 case 1:  // AIF2
 341                         mute_mask = 0x0C;
 342                         break;
 343                 default:
 344                         dev_err(codec->dev, "no this codec dai id\n");
 345                         return -EINVAL;
 346         }
 347         snd_soc_update_bits(codec, 0x07, mute_mask, (mute?mute_mask:0));
 348     if (!mute)
 349         msleep(50);
 350         return 0;
 351 }
 352
 353 static int rt5512_set_dai_fmt(struct snd_soc_dai *codec_dai,
 354                 unsigned int fmt)
 355 {
 356         struct snd_soc_codec *codec = codec_dai->codec;
 357         unsigned int new_daifmt_regval;
 358
 359         RT_DBG("codec dai_fmt\n");
 360         if (fmt & SND_SOC_DAIFMT_I2S)
 361                 new_daifmt_regval = 0x00;
 362         else if (fmt & SND_SOC_DAIFMT_RIGHT_J)
 363                 new_daifmt_regval = 0x08;
 364         else if (fmt & SND_SOC_DAIFMT_LEFT_J)
 365                 new_daifmt_regval = 0x04;
 366         else
 367                 new_daifmt_regval = 0x00;
 368
 369         snd_soc_update_bits(codec, 0x02, RT5512_AUDFMT_MASK, new_daifmt_regval);
 370         return 0;
 371 }
 372
 373 static int rt5512_set_clkdiv(struct snd_soc_dai *codec_dai, int div_id, int div)
 374 {
 375         struct snd_soc_codec *codec = codec_dai->codec;
 376
 377         RT_DBG("codec clk_div(%d) value %d\n", div_id, div);
 378         switch (div_id)
 379         {
 380                 case RT5512_CLK_DIV_ID:
 381                         snd_soc_write(codec, 0x55, (div&0x1ffff) << 16);
 382                         break;
 383                 default:
 384                         dev_err(codec->dev, "Invalid clock divider");
 385                         return -EINVAL;
 386         }
 387
 388         return 0;
 389 }
 390
 391 static struct snd_soc_dai_ops rt5512_dai_ops =
 392 {
 393         .hw_params      = rt5512_hw_params,
 394         .digital_mute   = rt5512_digital_mute,
 395         .set_sysclk     = rt5512_set_dai_sysclk,
 396         .set_fmt        = rt5512_set_dai_fmt,
 397         .set_clkdiv     = rt5512_set_clkdiv,
 398 };
 399
 400 static struct snd_soc_dai_driver rt5512_dai[] =
 401 {
 402         // AIF1
 403         {
 404         .name = "RT5512-aif1",
 405         .playback =
 406         {
 407                 .stream_name = "AIF1 Playback",
 408                 .channels_min = 1,
 409                 .channels_max = 2,
 410                 .rates = RT5512_RATES,
 411                 .formats = RT5512_FORMATS,
 412         },
 413         .capture =
 414         {
 415                 .stream_name = "AIF1 Capture",
 416                 .channels_min = 1,
 417                 .channels_max = 2,
 418                 .rates = RT5512_RATES,
 419                 .formats = RT5512_FORMATS,
 420         },
 421         .ops = &rt5512_dai_ops,
 422         .symmetric_rates = 1,
 423         },
 424         #if 0
 425         // AIF2
 426         {
 427         .name = "RT5512-aif2",
 428         .playback =
 429         {
 430                 .stream_name = "AIF2 Playback",
 431                 .channels_min = 1,
 432                 .channels_max = 2,
 433                 .rates = RT5512_RATES,
 434                 .formats = RT5512_FORMATS,
 435         },
 436         .capture =
 437         {
 438                 .stream_name = "AIF2 Capture",
 439                 .channels_min = 1,
 440                 .channels_max = 2,
 441                 .rates = RT5512_RATES,
 442                 .formats = RT5512_FORMATS,
 443         },
 444         .ops = &rt5512_dai_ops,
 445         .symmetric_rates = 1,
 446         },
 447         #endif /* #if 0 */
 448 };
 449
 450 static const DECLARE_TLV_DB_SCALE(mic_pga_tlv, -1650, 150, 0);
 451 static const DECLARE_TLV_DB_SCALE(mic_lrpga_tlv, 0, 600, 0);
 452 static const DECLARE_TLV_DB_SCALE(aux_pga_tlv, -500, 100, 0);   // range from -5dB to 26dB
 453 static const DECLARE_TLV_DB_SCALE(aux_lrpga_tlv, -300, 300, 0);
 454 static const DECLARE_TLV_DB_SCALE(lrpga2lrspk_tlv, -600, 300, 0);
 455 static const DECLARE_TLV_DB_SCALE(lrpga2lrhp_tlv, -6000, 300, 0);
 456 static const DECLARE_TLV_DB_SCALE(lrspkpga_tlv, -4300, 100, 0);
 457 static const DECLARE_TLV_DB_SCALE(lrhppga_tlv, -3100, 100, 0);
 458 static const DECLARE_TLV_DB_SCALE(recvoutdrv_tlv, -600, 600, 0);
 459 static const DECLARE_TLV_DB_SCALE(spkoutdrv_tlv, 600, 300, 0);
 460 static const DECLARE_TLV_DB_SCALE(hpoutdrv_tlv, -1200, 100, 0);
 461 static const DECLARE_TLV_DB_SCALE(digital_tlv, -10375, 25, 0);
 462 static const char *mic_mode_sel[] = {"Single Ended", "Differential"};
 463 static const char *mic_inv_mode_sel[] = {"Non-inverting mode", "Inverting mode"};
 464 static const char *analog_bypass_sel[] = {"Aux", "Mic1", "Mic2", "Mic3"};
 465 static const char *digital_output_percent[] = {"zero", "quarter", "half", "one"};
 466 static const char *out_path[] = { "Off", "Recv", "LR_SPK", "LR_HP"};
 467 static const char *in_path[] = {"Off", "Mic1", "Mic2", "Mic3", "Aux"};
 468 static const char *hpf_freqcut_option[] = {"4Hz", "379Hz", "770Hz", "1594Hz"};
 469 static const struct soc_enum rt5512_enum[] =
 470 {
 471         SOC_ENUM_SINGLE(0x92, 7, 2, mic_mode_sel),
 472         SOC_ENUM_SINGLE(0x92, 6, 2, mic_inv_mode_sel),
 473         SOC_ENUM_SINGLE(0x98, 0, 4, analog_bypass_sel),
 474         SOC_ENUM_SINGLE(0x10, 6, 4, digital_output_percent),
 475         SOC_ENUM_SINGLE(0x10, 4, 4, digital_output_percent), //4
 476         SOC_ENUM_SINGLE(0x10, 2, 4, digital_output_percent),
 477         SOC_ENUM_SINGLE(0x10, 0, 4, digital_output_percent),
 478         SOC_ENUM_SINGLE(0x11, 6, 4, digital_output_percent),
 479         SOC_ENUM_SINGLE(0x11, 4, 4, digital_output_percent),
 480         SOC_ENUM_SINGLE(0x11, 2, 4, digital_output_percent),
 481         SOC_ENUM_SINGLE(0x11, 0, 4, digital_output_percent),
 482         SOC_ENUM_SINGLE(0x12, 6, 4, digital_output_percent),
 483         SOC_ENUM_SINGLE(0x12, 4, 4, digital_output_percent),
 484         SOC_ENUM_SINGLE(0x12, 2, 4, digital_output_percent),
 485         SOC_ENUM_SINGLE(0x12, 0, 4, digital_output_percent),
 486         SOC_ENUM_SINGLE(0x13, 6, 4, digital_output_percent),
 487         SOC_ENUM_SINGLE(0x13, 4, 4, digital_output_percent),
 488         SOC_ENUM_SINGLE(0x13, 2, 4, digital_output_percent),
 489         SOC_ENUM_SINGLE(0x13, 0, 4, digital_output_percent),
 490         SOC_ENUM_SINGLE(0x93, 7, 2, mic_mode_sel),
 491         SOC_ENUM_SINGLE(0x93, 6, 2, mic_inv_mode_sel),
 492         SOC_ENUM_SINGLE(0x94, 7, 2, mic_mode_sel),
 493         SOC_ENUM_SINGLE(0x94, 6, 2, mic_inv_mode_sel),
 494         SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(out_path), out_path),
 495         SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(in_path), in_path),
 496         SOC_ENUM_SINGLE(0x17, 0, 4, hpf_freqcut_option),
 497         SOC_ENUM_SINGLE(0x17, 2, 4, hpf_freqcut_option),
 498         SOC_ENUM_SINGLE(0x17, 4, 4, hpf_freqcut_option),
 499 };
 500
 501 #if FOR_MID
 502 static const char *rt5512_playback_path_mode[] = {"OFF", "RCV", "SPK", "HP", "HP_NO_MIC", "BT", "SPK_HP", //0-6
 503                                                                                                         "RING_SPK", "RING_HP", "RING_HP_NO_MIC", "RING_SPK_HP"};//7-10
 504
 505 static const SOC_ENUM_SINGLE_DECL(rt5512_path_type, 0, 0, rt5512_playback_path_mode);
 506
 507 static int rt5512_playback_path_get(struct snd_kcontrol *kcontrol,
 508                 struct snd_ctl_elem_value *ucontrol)
 509 {
 510     struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
 511         struct rt5512_codec_chip *chip = snd_soc_codec_get_drvdata(codec);
 512
 513         RT_DBG("\n");
 514     RT_DBG("%s:playback_path=%ld\n",__func__,ucontrol->value.integer.value[0]);
 515
 516         ucontrol->value.integer.value[0] = chip->curr_outpath;
 517         return 0;
 518 }
 519
 520
 521 static int rt5512_playback_path_put(struct snd_kcontrol *kcontrol,
 522         struct snd_ctl_elem_value *ucontrol)
 523 {
 524         int ret = 0;
 525         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
 526         struct rt5512_codec_chip *chip = snd_soc_codec_get_drvdata(codec);
 527         struct snd_soc_dapm_context *dapm = &codec->dapm;
 528
 529         RT_DBG("\n");
 530         if (ucontrol->value.integer.value[0] != chip->curr_outpath)
 531         {
 532             mutex_lock(&codec->mutex);
 533                 switch (ucontrol->value.integer.value[0])
 534                 {
 535                         case OFF:
 536                 RT_DBG(">>>>>>>>>>>>>>>>%s OFF",__FUNCTION__);
 537                                 snd_soc_dapm_disable_pin(dapm, "Headphone Jack");
 538                 snd_soc_dapm_disable_pin(dapm, "Ext Spk");
 539                 snd_soc_dapm_sync(dapm);
 540                                 chip->curr_outpath = ucontrol->value.integer.value[0];
 541                                 break;
 542
 543             case RCV:
 544                         break;
 545
 546                         case SPK_PATH:
 547                 case RING_SPK:
 548                 RT_DBG(">>>>>>>>>>>>>>>>%s spk",__FUNCTION__);
 549                 snd_soc_dapm_enable_pin(dapm, "Ext Spk");
 550                 snd_soc_dapm_disable_pin(dapm, "Headphone Jack");
 551                 snd_soc_dapm_sync(dapm);
 552                 RT_DBG("Ext Spk status=%d\n", snd_soc_dapm_get_pin_status(dapm, "Ext Spk"));
 553                 RT_DBG("Headphone Jack status=%d\n", snd_soc_dapm_get_pin_status(dapm, "Headphone Jack"));
 554                                 chip->curr_outpath = ucontrol->value.integer.value[0];
 555                                 break;
 556
 557                         case HP_PATH:
 558                 case HP_NO_MIC:
 559                 case RING_HP:
 560                 case RING_HP_NO_MIC:
 561                 RT_DBG(">>>>>>>>>>>>>>>>%s hp",__FUNCTION__);
 562                                 snd_soc_dapm_disable_pin(dapm, "Ext Spk");
 563                 snd_soc_dapm_enable_pin(dapm, "Headphone Jack");
 564                 snd_soc_dapm_sync(dapm);
 565                                 chip->curr_outpath = ucontrol->value.integer.value[0];
 566                                 break;
 567
 568             case BT:
 569                         break;
 570
 571             case SPK_HP:
 572                 case RING_SPK_HP:
 573                 RT_DBG(">>>>>>>>>>>>>>>>%s spk+hp",__FUNCTION__);
 574                 snd_soc_dapm_enable_pin(dapm, "Ext Spk");
 575                                 snd_soc_dapm_enable_pin(dapm, "Headphone Jack");
 576                 snd_soc_dapm_sync(dapm);
 577                                 chip->curr_outpath = ucontrol->value.integer.value[0];
 578                                 break;
 579
 580                         default:
 581                                 dev_err(codec->dev, "Not valid path\n");
 582                 mutex_unlock(&codec->mutex);
 583                                 ret = -EINVAL;
 584                                 break;
 585                 }
 586         mutex_unlock(&codec->mutex);
 587         }
 588
 589         return ret;
 590 }
 591
 592 static const char *rt5512_capture_path_mode[] = {"MIC OFF", "Main Mic", "Hands Free Mic", "BT Sco Mic"};//
 593
 594 static const SOC_ENUM_SINGLE_DECL(rt5512_capture_type, 0, 0, rt5512_capture_path_mode);
 595
 596 static int rt5512_capture_path_get(struct snd_kcontrol *kcontrol,
 597                 struct snd_ctl_elem_value *ucontrol)
 598 {
 599     struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
 600         struct rt5512_codec_chip *chip = snd_soc_codec_get_drvdata(codec);
 601
 602         RT_DBG("\n");
 603     RT_DBG("%s:capture_path=%ld\n",__func__,ucontrol->value.integer.value[0]);
 604
 605         ucontrol->value.integer.value[0] = chip->curr_outpath;
 606         return 0;
 607 }
 608
 609
 610 static int rt5512_capture_path_put(struct snd_kcontrol *kcontrol,
 611         struct snd_ctl_elem_value *ucontrol)
 612 {
 613         int ret = 0;
 614         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
 615         struct rt5512_codec_chip *chip = snd_soc_codec_get_drvdata(codec);
 616         struct snd_soc_dapm_context *dapm = &codec->dapm;
 617
 618         RT_DBG("\n");
 619         if (ucontrol->value.integer.value[0] != chip->curr_outpath)
 620         {
 621             mutex_lock(&codec->mutex);
 622                 switch (ucontrol->value.integer.value[0])
 623                 {
 624                         case MIC_OFF:
 625                 RT_DBG(">>>>>>>>>>>>>>>>%s MIC_OFF",__FUNCTION__);
 626                                 snd_soc_dapm_disable_pin(dapm, "Main Mic");
 627                 snd_soc_dapm_disable_pin(dapm, "LineIn");
 628                 snd_soc_dapm_sync(dapm);
 629                                 chip->curr_outpath = ucontrol->value.integer.value[0];
 630                                 break;
 631
 632                         case Main_Mic:
 633                 RT_DBG(">>>>>>>>>>>>>>>>%s Main_Mic",__FUNCTION__);
 634                 /*Mic2 record gain*/
 635                 snd_soc_update_bits(codec, 0x93, 0x1f, 0x15);
 636                 snd_soc_update_bits(codec, 0x97, 0x0c, 0x08);
 637                 snd_soc_dapm_enable_pin(dapm, "Main Mic");
 638                 snd_soc_dapm_disable_pin(dapm, "LineIn");
 639                 snd_soc_dapm_sync(dapm);
 640                 RT_DBG("Main Mic status=%d\n", snd_soc_dapm_get_pin_status(dapm, "Main Mic"));
 641                 RT_DBG("LineIn status=%d\n", snd_soc_dapm_get_pin_status(dapm, "LineIn"));
 642                                 chip->curr_outpath = ucontrol->value.integer.value[0];
 643                                 break;
 644
 645                         case Hands_Free_Mic:
 646                 RT_DBG(">>>>>>>>>>>>>>>>%s Hands_Free_Mic",__FUNCTION__);
 647                 /*Aux record gain*/
 648                 snd_soc_update_bits(codec, 0x91, 0x1f, 0x15);
 649                 snd_soc_update_bits(codec, 0x96, 0xc0, 0x80);
 650                                 snd_soc_dapm_disable_pin(dapm, "Main Mic");
 651                 snd_soc_dapm_enable_pin(dapm, "LineIn");
 652                 snd_soc_dapm_sync(dapm);
 653                                 chip->curr_outpath = ucontrol->value.integer.value[0];
 654                                 break;
 655
 656             case BT_Sco_Mic:
 657                         break;
 658
 659                         default:
 660                                 dev_err(codec->dev, "Not valid path\n");
 661                 mutex_unlock(&codec->mutex);
 662                                 ret = -EINVAL;
 663                                 break;
 664                 }
 665         mutex_unlock(&codec->mutex);
 666         }
 667
 668         return ret;
 669 }
 670
 671 #else
 672 static int rt5512_inpath_get(struct snd_kcontrol *kcontrol,
 673         struct snd_ctl_elem_value *ucontrol)
 674 {
 675         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
 676         struct rt5512_codec_chip *chip = snd_soc_codec_get_drvdata(codec);
 677
 678         RT_DBG("\n");
 679         ucontrol->value.integer.value[0] = chip->curr_inpath;
 680         return 0;
 681 }
 682
 683 static int rt5512_inpath_set(struct snd_kcontrol *kcontrol,
 684         struct snd_ctl_elem_value *ucontrol)
 685 {
 686         int ret = 0;
 687         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
 688         struct rt5512_codec_chip *chip = snd_soc_codec_get_drvdata(codec);
 689         struct snd_soc_dapm_context *dapm = &codec->dapm;
 690
 691         RT_DBG("\n");
 692         if (ucontrol->value.integer.value[0] != chip->curr_inpath)
 693         {
 694                 switch (ucontrol->value.integer.value[0])
 695                 {
 696                         case 0:
 697                                 snd_soc_dapm_disable_pin(dapm, "Mic1");
 698                                 snd_soc_dapm_disable_pin(dapm, "Mic2");
 699                                 snd_soc_dapm_disable_pin(dapm, "Mic3");
 700                                 snd_soc_dapm_disable_pin(dapm, "Aux");
 701                                 chip->curr_inpath = ucontrol->value.integer.value[0];
 702                                 break;
 703                         case 1:
 704                                 snd_soc_dapm_enable_pin(dapm, "Mic1");
 705                                 snd_soc_dapm_disable_pin(dapm, "Mic2");
 706                                 snd_soc_dapm_disable_pin(dapm, "Mic3");
 707                                 snd_soc_dapm_disable_pin(dapm, "Aux");
 708                                 chip->curr_inpath = ucontrol->value.integer.value[0];
 709                                 break;
 710                         case 2:
 711                                 snd_soc_dapm_disable_pin(dapm, "Mic1");
 712                                 snd_soc_dapm_enable_pin(dapm, "Mic2");
 713                                 snd_soc_dapm_disable_pin(dapm, "Mic3");
 714                                 snd_soc_dapm_enable_pin(dapm, "Aux");
 715                                 chip->curr_inpath = ucontrol->value.integer.value[0];
 716                                 break;
 717                         case 3:
 718                                 snd_soc_dapm_disable_pin(dapm, "Mic1");
 719                                 snd_soc_dapm_disable_pin(dapm, "Mic2");
 720                                 snd_soc_dapm_enable_pin(dapm, "Mic3");
 721                                 snd_soc_dapm_disable_pin(dapm, "Aux");
 722                                 chip->curr_inpath = ucontrol->value.integer.value[0];
 723                                 break;
 724                         case 4:
 725                                 snd_soc_dapm_disable_pin(dapm, "Mic1");
 726                                 snd_soc_dapm_disable_pin(dapm, "Mic2");
 727                                 snd_soc_dapm_disable_pin(dapm, "Mic3");
 728                                 snd_soc_dapm_enable_pin(dapm, "Aux");
 729                                 chip->curr_inpath = ucontrol->value.integer.value[0];
 730                                 break;
 731                         default:
 732                                 dev_err(codec->dev, "Not valid path\n");
 733                                 ret = -EINVAL;
 734                                 break;
 735                 }
 736         }
 737
 738         return ret;
 739 }
 740
 741 static int rt5512_outpath_get(struct snd_kcontrol *kcontrol,
 742         struct snd_ctl_elem_value *ucontrol)
 743 {
 744         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
 745         struct rt5512_codec_chip *chip = snd_soc_codec_get_drvdata(codec);
 746
 747         RT_DBG("\n");
 748         ucontrol->value.integer.value[0] = chip->curr_outpath;
 749         return 0;
 750 }
 751
 752 static int rt5512_outpath_set(struct snd_kcontrol *kcontrol,
 753         struct snd_ctl_elem_value *ucontrol)
 754 {
 755         int ret = 0;
 756         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
 757         struct rt5512_codec_chip *chip = snd_soc_codec_get_drvdata(codec);
 758         struct snd_soc_dapm_context *dapm = &codec->dapm;
 759
 760         RT_DBG("\n");
 761         if (ucontrol->value.integer.value[0] != chip->curr_outpath)
 762         {
 763                 switch (ucontrol->value.integer.value[0])
 764                 {
 765                         case 0:
 766                                 snd_soc_dapm_disable_pin(dapm, "Receiver");
 767                                 snd_soc_dapm_disable_pin(dapm, "LSpeaker");
 768                                 snd_soc_dapm_disable_pin(dapm, "RSpeaker");
 769                                 snd_soc_dapm_disable_pin(dapm, "LHeadphone");
 770                                 snd_soc_dapm_disable_pin(dapm, "RHeadphone");
 771                                 chip->curr_outpath = ucontrol->value.integer.value[0];
 772                                 break;
 773                         case 1:
 774                                 snd_soc_dapm_enable_pin(dapm, "Receiver");
 775                                 snd_soc_dapm_disable_pin(dapm, "LSpeaker");
 776                                 snd_soc_dapm_disable_pin(dapm, "RSpeaker");
 777                                 snd_soc_dapm_disable_pin(dapm, "LHeadphone");
 778                                 snd_soc_dapm_disable_pin(dapm, "RHeadphone");
 779                                 chip->curr_outpath = ucontrol->value.integer.value[0];
 780                                 break;
 781                         case 2:
 782                                 snd_soc_dapm_disable_pin(dapm, "Receiver");
 783                                 snd_soc_dapm_enable_pin(dapm, "LSpeaker");
 784                                 snd_soc_dapm_enable_pin(dapm, "RSpeaker");
 785                                 snd_soc_dapm_disable_pin(dapm, "LHeadphone");
 786                                 snd_soc_dapm_disable_pin(dapm, "RHeadphone");
 787                                 chip->curr_outpath = ucontrol->value.integer.value[0];
 788                                 break;
 789                         case 3:
 790                                 snd_soc_dapm_disable_pin(dapm, "Receiver");
 791                                 snd_soc_dapm_disable_pin(dapm, "LSpeaker");
 792                                 snd_soc_dapm_disable_pin(dapm, "RSpeaker");
 793                                 snd_soc_dapm_enable_pin(dapm, "LHeadphone");
 794                                 snd_soc_dapm_enable_pin(dapm, "RHeadphone");
 795                                 chip->curr_outpath = ucontrol->value.integer.value[0];
 796                                 break;
 797                         default:
 798                                 dev_err(codec->dev, "Not valid path\n");
 799                                 ret = -EINVAL;
 800                                 break;
 801                 }
 802         }
 803
 804         return ret;
 805 }
 806
 807 #endif
 808
 809 static const struct snd_kcontrol_new rt5512_snd_controls[] =
 810 {
 811         //MicMode parameter
 812         SOC_ENUM("Mic1 ModeSel", rt5512_enum[0]),
 813         SOC_ENUM("Mic1 InvModeSel", rt5512_enum[1]),
 814         SOC_ENUM("Mic2 ModeSel", rt5512_enum[19]),
 815         SOC_ENUM("Mic2 InvModeSel", rt5512_enum[20]),
 816         SOC_ENUM("Mic3 ModeSel", rt5512_enum[21]),
 817         SOC_ENUM("Mic3 InvModeSel", rt5512_enum[22]),
 818         SOC_SINGLE_TLV("Aux PGA Volume",   0x91, 0, 31, 0, aux_pga_tlv),
 819         SOC_SINGLE_TLV("Mic1 PGA Volume",  0x92, 0, 31, 0, mic_pga_tlv),
 820         SOC_SINGLE_TLV("Mic2 PGA Volume",  0x93, 0, 31, 0, mic_pga_tlv),
 821         SOC_SINGLE_TLV("Mic3 PGA Volume",  0x94, 0, 31, 0, mic_pga_tlv),
 822         SOC_SINGLE_TLV("AuxL LPGA Volume", 0x96, 6,  3, 0, aux_lrpga_tlv),
 823         SOC_SINGLE_TLV("AuxR RPGA Volume", 0x97, 6,  3, 0, aux_lrpga_tlv),
 824         SOC_SINGLE_TLV("Mic1 LPGA Volume", 0x96, 4,  3, 0, mic_lrpga_tlv),
 825         SOC_SINGLE_TLV("Mic1 RPGA Volume", 0x97, 4,  3, 0, mic_lrpga_tlv),
 826         SOC_SINGLE_TLV("Mic2 LPGA Volume", 0x96, 2,  3, 0, mic_lrpga_tlv),
 827         SOC_SINGLE_TLV("Mic2 RPGA Volume", 0x97, 2,  3, 0, mic_lrpga_tlv),
 828         SOC_SINGLE_TLV("Mic3 LPGA Volume", 0x96, 0,  3, 0, mic_lrpga_tlv),
 829         SOC_SINGLE_TLV("Mic3 RPGA Volume", 0x97, 0,  3, 0, mic_lrpga_tlv),
 830         SOC_SINGLE_TLV("LPGA2LSPK PGA Volume",  0x8d, 6,  3, 0, lrpga2lrspk_tlv),
 831         SOC_SINGLE_TLV("RPGA2LSPK PGA Volume",  0x8d, 4,  3, 0, lrpga2lrspk_tlv),
 832         SOC_SINGLE_TLV("LPGA2RSPK PGA Volume",  0x8d, 2,  3, 0, lrpga2lrspk_tlv),
 833         SOC_SINGLE_TLV("RPGA2RSPK PGA Volume",  0x8d, 0,  3, 0, lrpga2lrspk_tlv),
 834         SOC_SINGLE_TLV("LPGA2LHP PGA Volume",   0x87, 6,  3, 0, lrpga2lrhp_tlv),
 835         SOC_SINGLE_TLV("RPGA2LHP PGA Volume",   0x87, 4,  3, 0, lrpga2lrhp_tlv),
 836         SOC_SINGLE_TLV("LPGA2RHP PGA Volume",   0x87, 2,  3, 0, lrpga2lrhp_tlv),
 837         SOC_SINGLE_TLV("RPGA2RHP PGA Volume",   0x87, 0,  3, 0, lrpga2lrhp_tlv),
 838         SOC_SINGLE_TLV("LSPKPreMixer PGA Volume",  0x8e, 0, 46, 0, lrspkpga_tlv),
 839         SOC_SINGLE_TLV("RSPKPreMixer PGA Volume",  0x8f, 0, 46, 0, lrspkpga_tlv),
 840         SOC_SINGLE_TLV("LHPPreMixer PGA Volume",   0x88, 0, 31, 0, lrhppga_tlv),
 841         SOC_SINGLE_TLV("RHPPreMixer PGA Volume",   0x89, 0, 31, 0, lrhppga_tlv),
 842         SOC_SINGLE_TLV("RECVDrv Volume", 0x84, 3, 1, 0, recvoutdrv_tlv),
 843         SOC_SINGLE_TLV("LSPKDrv Volume", 0x90, 4, 3, 0, spkoutdrv_tlv),
 844         SOC_SINGLE_TLV("RSPKDrv Volume", 0x90, 0, 3, 0, spkoutdrv_tlv),
 845         SOC_SINGLE_TLV("LHPDrv Volume", 0x8a, 0, 15, 0, hpoutdrv_tlv),
 846         SOC_SINGLE_TLV("RHPDrv Volume", 0x8b, 0, 15, 0, hpoutdrv_tlv),
 847         SOC_DOUBLE_TLV("AUD_ADC1 PGA Volume", 0x0c, 17, 1, 511, 1, digital_tlv),
 848         SOC_DOUBLE_TLV("AUD_ADC2 PGA Volume", 0x0d, 17, 1, 511, 1, digital_tlv),
 849         SOC_DOUBLE_TLV("AUD_DAC1 PGA Volume", 0x0a, 17, 1, 511, 1, digital_tlv),
 850         SOC_DOUBLE_TLV("AUD_DAC2 PGA Volume", 0x0b, 17, 1, 511, 1, digital_tlv),
 851         SOC_DOUBLE_TLV("Sidetone PGA Volume", 0x0e, 17, 1, 511, 1, digital_tlv),
 852         SOC_ENUM("AIF2L2DACL sel", rt5512_enum[3]),
 853         SOC_ENUM("AIF1L2DACL sel", rt5512_enum[4]),
 854         SOC_ENUM("ADCL2DACL sel",  rt5512_enum[5]),
 855         SOC_ENUM("ADCR2DACL sel",  rt5512_enum[6]),
 856         SOC_ENUM("AIF2R2DACR sel", rt5512_enum[7]),
 857         SOC_ENUM("AIF1R2DACR sel", rt5512_enum[8]),
 858         SOC_ENUM("ADCL2DACR sel",  rt5512_enum[9]),
 859         SOC_ENUM("ADCR2DACR sel",  rt5512_enum[10]),
 860         SOC_ENUM("AIF2L2TX2L sel", rt5512_enum[11]),
 861         SOC_ENUM("AIF1L2TX2L sel", rt5512_enum[12]),
 862         SOC_ENUM("ADCL2TX2L sel",  rt5512_enum[13]),
 863         SOC_ENUM("ADCR2TX2L sel",  rt5512_enum[14]),
 864         SOC_ENUM("AIF2R2TX2R sel", rt5512_enum[15]),
 865         SOC_ENUM("AIF1R2TX2R sel", rt5512_enum[16]),
 866         SOC_ENUM("ADCL2TX2R sel",  rt5512_enum[17]),
 867         SOC_ENUM("ADCR2TX2R sel",  rt5512_enum[18]),
 868         SOC_SINGLE("ADC_HPF1 Switch", 0x16, 1, 1, 0),
 869         SOC_ENUM("ADC_HPF1 FC", rt5512_enum[25]),
 870         SOC_SINGLE("ADC_HPF2 Switch", 0x16, 2, 1, 0),
 871         SOC_ENUM("ADC_HPF2 FC", rt5512_enum[26]),
 872         SOC_SINGLE("ADC_HPF3 Switch", 0x16, 3, 1, 0),
 873         SOC_ENUM("ADC_HPF3 FC", rt5512_enum[27]),
 874         SOC_SINGLE("ADC_DRC1 Switch", 0x16, 4, 1, 0),
 875         SOC_SINGLE("ADC_DRC2 Switch", 0x16, 5, 1, 0),
 876         SOC_SINGLE("ADC_DRC NG Switch", 0x31, 0, 1, 0),
 877         SOC_SINGLE("DAC_3D1 Switch", 0x14, 0, 1, 0),
 878         SOC_SINGLE("DAC_3D2 Switch", 0x14, 1, 1, 0),
 879         SOC_SINGLE("DAC_DRC1 Switch", 0x15, 2, 1, 0),
 880         SOC_SINGLE("DAC_DRC2 Switch", 0x15, 3, 1, 0),
 881         SOC_SINGLE("DAC_DRC3 Switch", 0x15, 4, 1, 0),
 882         SOC_SINGLE("DAC_DRC4 Switch", 0x15, 5, 1, 0),
 883         SOC_SINGLE("DAC_DRC NG Switch", 0x31, 1, 1, 0),
 884         SOC_SINGLE("DAC_BASS1 Switch", 0x14, 2, 1, 0),
 885         SOC_SINGLE("DAC_BASS2 Switch", 0x14, 3, 1, 0),
 886         SOC_SINGLE("DAC_EQ1 Switch", 0x15, 0, 1, 0),
 887         SOC_SINGLE("DAC_EQ2 Switch", 0x15, 1, 1, 0),
 888 #if FOR_MID
 889     SOC_ENUM_EXT("Playback Path", rt5512_path_type,
 890                 rt5512_playback_path_get, rt5512_playback_path_put),
 891         SOC_ENUM_EXT("Capture MIC Path", rt5512_capture_type,
 892                 rt5512_capture_path_get, rt5512_capture_path_put),
 893 #else
 894     SOC_ENUM_EXT("Out Sel", rt5512_enum[23], rt5512_outpath_get, rt5512_outpath_set),
 895     SOC_ENUM_EXT("In Sel", rt5512_enum[24], rt5512_inpath_get, rt5512_inpath_set),
 896 #endif
 897 };
 898
 899 static const struct snd_kcontrol_new linput_mixer_controls[] =
 900 {
 901         SOC_DAPM_SINGLE("AuxL Switch", 0x95, 7, 1, 0),
 902         SOC_DAPM_SINGLE("Mic1 Switch", 0x95, 6, 1, 0),
 903         SOC_DAPM_SINGLE("Mic2 Switch", 0x95, 5, 1, 0),
 904         SOC_DAPM_SINGLE("Mic3 Switch", 0x95, 4, 1, 0),
 905 };
 906
 907 static const struct snd_kcontrol_new rinput_mixer_controls[] =
 908 {
 909         SOC_DAPM_SINGLE("AuxR Switch", 0x95, 3, 1, 0),
 910         SOC_DAPM_SINGLE("Mic1 Switch", 0x95, 2, 1, 0),
 911         SOC_DAPM_SINGLE("Mic2 Switch", 0x95, 1, 1, 0),
 912         SOC_DAPM_SINGLE("Mic3 Switch", 0x95, 0, 1, 0),
 913 };
 914
 915 static const struct snd_kcontrol_new analog_bypass_controls =
 916         SOC_DAPM_ENUM("Analog Bypass", rt5512_enum[2]);
 917
 918 static const struct snd_kcontrol_new lspkpre_mixer_controls[] =
 919 {
 920         SOC_DAPM_SINGLE("LPGA Switch", 0x8c, 7, 1, 0),
 921         SOC_DAPM_SINGLE("LSPKDAC Switch", 0x84, 1, 1, 0),
 922         SOC_DAPM_SINGLE("RPGA Switch", 0x8c, 6, 1, 0),
 923 };
 924
 925 static const struct snd_kcontrol_new rspkpre_mixer_controls[] =
 926 {
 927         SOC_DAPM_SINGLE("LPGA Switch", 0x8c, 5, 1, 0),
 928         SOC_DAPM_SINGLE("RSPKDAC Switch", 0x84, 0, 1, 0),
 929         SOC_DAPM_SINGLE("RPGA Switch", 0x8c, 4, 1, 0),
 930 };
 931
 932 static const struct snd_kcontrol_new recvout_mixer_controls[] =
 933 {
 934         SOC_DAPM_SINGLE("LSPKPGA Switch", 0x84, 6, 1, 0),
 935         SOC_DAPM_SINGLE("RSPKPGA Switch", 0x84, 5, 1, 0),
 936         SOC_DAPM_SINGLE("BYPASS Switch",  0x84, 4, 1, 0),
 937 };
 938
 939 static const struct snd_kcontrol_new lspkpost_mixer_controls[] =
 940 {
 941         SOC_DAPM_SINGLE("RSPKPGA Switch", 0x8c, 2, 1, 0),
 942         SOC_DAPM_SINGLE("LSPKPGA Switch", 0x8c, 3, 1, 0),
 943         SOC_DAPM_SINGLE("BYPASS Switch",  0x90, 7, 1, 0),
 944 };
 945
 946 static const struct snd_kcontrol_new rspkpost_mixer_controls[] =
 947 {
 948         SOC_DAPM_SINGLE("LSPKPGA Switch", 0x8c, 1, 1, 0),
 949         SOC_DAPM_SINGLE("RSPKPGA Switch", 0x8c, 0, 1, 0),
 950         SOC_DAPM_SINGLE("BYPASS Switch",  0x90, 3, 1, 0),
 951 };
 952
 953 static const struct snd_kcontrol_new lhppre_mixer_controls[] =
 954 {
 955         SOC_DAPM_SINGLE("LPGA Switch", 0x86, 7, 1, 0),
 956         SOC_DAPM_SINGLE("RPGA Switch", 0x86, 6, 1, 0),
 957 };
 958
 959 static const struct snd_kcontrol_new rhppre_mixer_controls[] =
 960 {
 961         SOC_DAPM_SINGLE("LPGA Switch", 0x86, 5, 1, 0),
 962         SOC_DAPM_SINGLE("RPGA Switch", 0x86, 4, 1, 0),
 963 };
 964
 965 static const struct snd_kcontrol_new lhppost_mixer_controls[] =
 966 {
 967         SOC_DAPM_SINGLE("LHPDAC Switch", RT5512_VIRTUAL_REG, 6, 1, 0),
 968         SOC_DAPM_SINGLE("BYPASS Switch", 0x86, 1, 1, 0),
 969         SOC_DAPM_SINGLE("LRPGAMixer Switch",  RT5512_VIRTUAL_REG, 7, 1, 0),
 970 };
 971
 972 static const struct snd_kcontrol_new rhppost_mixer_controls[] =
 973 {
 974         SOC_DAPM_SINGLE("LRPGAMixer Switch", RT5512_VIRTUAL_REG, 8, 1, 0),
 975         SOC_DAPM_SINGLE("BYPASS Switch", 0x86, 0, 1, 0),
 976         SOC_DAPM_SINGLE("RHPDAC Switch",  RT5512_VIRTUAL_REG, 9, 1, 0),
 977 };
 978
 979 static int rt5512_power_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event)
 980 {
 981         RT_DBG("\n");
 982         switch (event)
 983         {
 984                 case SND_SOC_DAPM_PRE_PMU:
 985                         snd_soc_update_bits(w->codec, 0x81, 0x7, 0x7);
 986                         mdelay(20);
 987                         snd_soc_update_bits(w->codec, 0x81, 0x4, 0x0);
 988                         mdelay(1);
 989                         break;
 990                 case SND_SOC_DAPM_POST_PMD:
 991                         snd_soc_update_bits(w->codec, 0x81, 0x7, 0x4);
 992                         break;
 993         }
 994         return 0;
 995 }
 996
 997 static int rt5512_lhpdrv_pevent(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event)
 998 {
 999         RT_DBG("\n");
1000         switch (event)
1001         {
1002                 case SND_SOC_DAPM_PRE_PMU:
1003                         snd_soc_update_bits(w->codec, 0x83, 0x80, 0x80);
1004                         mdelay(1);
1005                         break;
1006         case SND_SOC_DAPM_PRE_PMD:
1007             snd_soc_update_bits(w->codec, 0x8A, 0x0F, 0x00);
1008             mdelay(50);
1009             break;
1010                 case SND_SOC_DAPM_POST_PMD:
1011                         mdelay(10);
1012                         snd_soc_update_bits(w->codec, 0x83, 0x80, 0x0);
1013             mdelay(10);
1014             snd_soc_update_bits(w->codec, 0x8A, 0x0F, 0x0B);
1015                         break;
1016         }
1017         return 0;
1018 }
1019
1020 static int rt5512_rhpdrv_pevent(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event)
1021 {
1022         RT_DBG("\n");
1023         switch (event)
1024         {
1025                 case SND_SOC_DAPM_PRE_PMU:
1026                         snd_soc_update_bits(w->codec, 0x83, 0x80, 0x80);
1027                         mdelay(1);
1028                         break;
1029         case SND_SOC_DAPM_PRE_PMD:
1030             snd_soc_update_bits(w->codec, 0x8B, 0x0F, 0x00);
1031             mdelay(50);
1032             break;
1033                 case SND_SOC_DAPM_POST_PMD:
1034                         mdelay(10);
1035             snd_soc_update_bits(w->codec, 0x83, 0x80, 0x0);
1036             mdelay(10);
1037             snd_soc_update_bits(w->codec, 0x8B, 0x0F, 0x0B);
1038                         break;
1039         }
1040         return 0;
1041 }
1042
1043 static int rt5512_spkdac_pevent(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event)
1044 {
1045         RT_DBG("\n");
1046         switch (event)
1047         {
1048                 case SND_SOC_DAPM_POST_PMU:
1049                         mdelay(125);
1050                         break;
1051         }
1052         return 0;
1053 }
1054
1055 static int rt5512_spkdrv_pevent(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event)
1056 {
1057         RT_DBG("\n");
1058         switch (event)
1059         {
1060                 case SND_SOC_DAPM_PRE_PMU:
1061                         mdelay(1);
1062                         break;
1063                 case SND_SOC_DAPM_POST_PMD:
1064                         mdelay(1);
1065                         break;
1066         }
1067         return 0;
1068 }
1069
1070 static int rt5512_recvdrv_pevent(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event)
1071 {
1072         RT_DBG("\n");
1073         switch (event)
1074         {
1075                 case SND_SOC_DAPM_PRE_PMU:
1076                         snd_soc_update_bits(w->codec, 0x83, 0x80, 0x80);
1077                         mdelay(2);
1078                         break;
1079                 case SND_SOC_DAPM_POST_PMD:
1080                         mdelay(1);
1081                         snd_soc_update_bits(w->codec, 0x83, 0x80, 0x0);
1082                         mdelay(1);
1083                         break;
1084         }
1085         return 0;
1086 }
1087
1088 static const struct snd_soc_dapm_widget rt5512_dapm_widgets[] =
1089 {
1090         SND_SOC_DAPM_PRE("Pre Power", rt5512_power_event),
1091         SND_SOC_DAPM_POST("Post Power",rt5512_power_event),
1092         // Input Related
1093         // Analog Input Pin
1094         SND_SOC_DAPM_INPUT("Mic1"),
1095         SND_SOC_DAPM_INPUT("Mic2"),
1096         SND_SOC_DAPM_INPUT("Mic3"),
1097         SND_SOC_DAPM_INPUT("Aux"),
1098         // Analog Bypass
1099         SND_SOC_DAPM_MUX("Analog Bypass Mux", RT5512_VIRTUAL_REG, 0, 0, &analog_bypass_controls),
1100         // Input PGA
1101         SND_SOC_DAPM_PGA("Aux PGA",  0x85, 3, 0, NULL, 0),
1102         SND_SOC_DAPM_PGA("Mic1 PGA", 0x85, 2, 0, NULL, 0),
1103         SND_SOC_DAPM_PGA("Mic2 PGA", 0x85, 1, 0, NULL, 0),
1104         SND_SOC_DAPM_PGA("Mic3 PGA", 0x85, 0, 0, NULL, 0),
1105         // Input Mixer
1106         SND_SOC_DAPM_MIXER("LInput Mixer", 0x85, 5, 0, linput_mixer_controls, ARRAY_SIZE(linput_mixer_controls)),
1107         SND_SOC_DAPM_MIXER("RInput Mixer", 0x85, 4, 0, rinput_mixer_controls, ARRAY_SIZE(rinput_mixer_controls)),
1108         // Input ADC
1109         SND_SOC_DAPM_ADC("LADC", NULL, 0x85, 7, 0),
1110         SND_SOC_DAPM_ADC("RADC", NULL, 0x85, 6, 0),
1111         // Digital Input Interface
1112         SND_SOC_DAPM_AIF_OUT("AIF1ADC", NULL, 0, 0x06, 0, 0),
1113         //SND_SOC_DAPM_AIF_OUT("AIF1ADCR", NULL, 0, 0x06, 0, 0),
1114         SND_SOC_DAPM_AIF_OUT("AIF1ADCDAT", "AIF1 Capture", 0, 0x05, 2, 1),
1115         SND_SOC_DAPM_AIF_OUT("AIF2ADC", NULL, 0, 0x06, 1, 0),
1116         //SND_SOC_DAPM_AIF_OUT("AIF2ADCR", NULL, 0, 0x06, 1, 0),
1117         SND_SOC_DAPM_AIF_OUT("AIF2ADCDAT", "AIF2 Capture", 0, 0x05, 3, 1),
1118
1119         //Digital DSP Routing
1120         //Mixer
1121         SND_SOC_DAPM_MIXER("DACL Mixer", 0x07, 7, 1, NULL, 0),
1122         SND_SOC_DAPM_MIXER("DACR Mixer", 0x07, 6, 1, NULL, 0),
1123         SND_SOC_DAPM_MIXER("TX2L Mixer", 0x07, 5, 1, NULL, 0),
1124         SND_SOC_DAPM_MIXER("TX2R Mixer", 0x07, 4, 1, NULL, 0),
1125
1126         // Output Related
1127         SND_SOC_DAPM_AIF_IN("AIF1DAC", NULL, 0, 0x06, 2, 0),
1128         //SND_SOC_DAPM_AIF_IN("AIF1DACR", NULL, 0, 0x06, 2, 0),
1129         SND_SOC_DAPM_AIF_IN("AIF1DACDAT", "AIF1 Playback", 0, 0x05, 0, 1),
1130         SND_SOC_DAPM_AIF_IN("AIF2DAC", NULL, 0, 0x06, 3, 0),
1131         //SND_SOC_DAPM_AIF_IN("AIF2DACR", NULL, 0, 0x06, 3, 0),
1132         SND_SOC_DAPM_AIF_IN("AIF2DACDAT", "AIF2 Playback", 0, 0x05, 1, 1),
1133         // Output DAC
1134         SND_SOC_DAPM_DAC_E("LSPKDAC", NULL, 0x82, 1, 0, rt5512_spkdac_pevent,
1135                 SND_SOC_DAPM_POST_PMU),
1136         SND_SOC_DAPM_DAC("RSPKDAC", NULL, 0x82, 0, 0),
1137         SND_SOC_DAPM_DAC("LHPDAC",  NULL, 0x82, 3, 0),
1138         SND_SOC_DAPM_DAC("RHPDAC",  NULL, 0x82, 2, 0),
1139         // Output Mixer
1140         SND_SOC_DAPM_MIXER("LSPK Pre Mixer", 0x82, 5, 0, lspkpre_mixer_controls, ARRAY_SIZE(lspkpre_mixer_controls)),
1141         SND_SOC_DAPM_MIXER("RSPK Pre Mixer", 0x82, 4, 0, rspkpre_mixer_controls, ARRAY_SIZE(rspkpre_mixer_controls)),
1142         SND_SOC_DAPM_MIXER("RECV Mixer", RT5512_VIRTUAL_REG, 1, 0, recvout_mixer_controls, ARRAY_SIZE(recvout_mixer_controls)),
1143         SND_SOC_DAPM_MIXER("LSPK Post Mixer", RT5512_VIRTUAL_REG, 2, 0, lspkpost_mixer_controls, ARRAY_SIZE(lspkpost_mixer_controls)),
1144         SND_SOC_DAPM_MIXER("RSPK Post Mixer", RT5512_VIRTUAL_REG, 3, 0, rspkpost_mixer_controls, ARRAY_SIZE(rspkpost_mixer_controls)),
1145         SND_SOC_DAPM_MIXER("LHP Pre Mixer", 0x82, 7, 0, lhppre_mixer_controls, ARRAY_SIZE(lhppre_mixer_controls)),
1146         SND_SOC_DAPM_MIXER("RHP Pre Mixer", 0x82, 6, 0, rhppre_mixer_controls, ARRAY_SIZE(rhppre_mixer_controls)),
1147         SND_SOC_DAPM_MIXER("LHP Post Mixer", RT5512_VIRTUAL_REG, 4, 0, lhppost_mixer_controls, ARRAY_SIZE(lhppost_mixer_controls)),
1148         SND_SOC_DAPM_MIXER("RHP Post Mixer", RT5512_VIRTUAL_REG, 5, 0, rhppost_mixer_controls, ARRAY_SIZE(rhppost_mixer_controls)),
1149         // Output Drv
1150         SND_SOC_DAPM_OUT_DRV_E("RECV Drv", 0x84, 7, 0, NULL, 0, rt5512_recvdrv_pevent,
1151                 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1152         SND_SOC_DAPM_OUT_DRV_E("LSPK Drv", 0x83, 3, 0, NULL, 0, rt5512_spkdrv_pevent,
1153                 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1154         SND_SOC_DAPM_OUT_DRV_E("RSPK Drv", 0x83, 2, 0, NULL, 0, rt5512_spkdrv_pevent,
1155                 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1156         SND_SOC_DAPM_OUT_DRV_E("LHP Drv", 0x83, 1, 0, NULL, 0, rt5512_lhpdrv_pevent,
1157                 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_PRE_PMD|SND_SOC_DAPM_POST_PMD),
1158         SND_SOC_DAPM_OUT_DRV_E("RHP Drv", 0x83, 0, 0, NULL, 0, rt5512_rhpdrv_pevent,
1159                 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_PRE_PMD||SND_SOC_DAPM_POST_PMU),
1160         // Output Pin
1161         SND_SOC_DAPM_OUTPUT("Receiver"),
1162         SND_SOC_DAPM_OUTPUT("LSpeaker"),
1163         SND_SOC_DAPM_OUTPUT("RSpeaker"),
1164         SND_SOC_DAPM_OUTPUT("LHeadphone"),
1165         SND_SOC_DAPM_OUTPUT("RHeadphone"),
1166         //MicBias
1167         SND_SOC_DAPM_MICBIAS("MicBias1", 0x81, 5, 0),
1168         SND_SOC_DAPM_MICBIAS("MicBias2", 0x81, 5, 0),
1169 };
1170
1171 static const struct snd_soc_dapm_route rt5512_dapm_routes[] =
1172 {
1173         // Input
1174         {"Mic1 PGA", NULL, "Mic1"},
1175         {"Mic2 PGA", NULL, "Mic2"},
1176         {"Mic3 PGA", NULL, "Mic3"},
1177         {"Aux PGA",  NULL, "Aux"},
1178         {"Analog Bypass Mux", "Mic1", "Mic1"},
1179         {"Analog Bypass Mux", "Mic2", "Mic2"},
1180         {"Analog Bypass Mux", "Mic3", "Mic3"},
1181         {"Analog Bypass Mux", "Aux",  "Aux"},
1182         {"LInput Mixer", "Mic1 Switch", "Mic1 PGA"},
1183         {"LInput Mixer", "Mic2 Switch", "Mic2 PGA"},
1184         {"LInput Mixer", "Mic3 Switch", "Mic3 PGA"},
1185         {"LInput Mixer", "AuxL Switch", "Aux PGA"},
1186         {"RInput Mixer", "Mic1 Switch", "Mic1 PGA"},
1187         {"RInput Mixer", "Mic2 Switch", "Mic2 PGA"},
1188         {"RInput Mixer", "Mic3 Switch", "Mic3 PGA"},
1189         {"RInput Mixer", "AuxR Switch", "Aux PGA"},
1190         {"LADC", NULL, "LInput Mixer"},
1191         {"RADC", NULL, "RInput Mixer"},
1192         {"AIF1ADC", NULL, "LADC"},
1193         {"AIF1ADC", NULL, "RADC"},
1194         {"AIF1ADCDAT", NULL, "AIF1ADC"},
1195         //{"AIF1ADCDAT", NULL, "AIF1ADCR"},
1196         {"AIF2ADC", NULL, "TX2L Mixer"},
1197         {"AIF2ADC", NULL, "TX2R Mixer"},
1198         {"AIF2ADCDAT", NULL, "AIF2ADC"},
1199         //{"AIF2ADCDAT", NULL, "AIF2ADCR"},
1200         // Output
1201         {"AIF1DAC", NULL, "AIF1DACDAT"},
1202         //{"AIF1DACR", NULL, "AIF1DACDAT"},
1203         {"AIF2DAC", NULL, "AIF2DACDAT"},
1204         //{"AIF2DACR", NULL, "AIF2DACDAT"},
1205         {"DACL Mixer", NULL, "AIF1DAC"},
1206         {"DACL Mixer", NULL, "AIF2DAC"},
1207         {"DACL Mixer", NULL, "LADC"},
1208         {"DACL Mixer", NULL, "RADC"},
1209         {"DACR Mixer", NULL, "AIF1DAC"},
1210         {"DACR Mixer", NULL, "AIF2DAC"},
1211         {"DACR Mixer", NULL, "LADC"},
1212         {"DACR Mixer", NULL, "RADC"},
1213         {"TX2L Mixer", NULL, "AIF1DAC"},
1214         {"TX2L Mixer", NULL, "AIF2DAC"},
1215         {"TX2L Mixer", NULL, "LADC"},
1216         {"TX2L Mixer", NULL, "RADC"},
1217         {"TX2R Mixer", NULL, "AIF1DAC"},
1218         {"TX2R Mixer", NULL, "AIF2DAC"},
1219         {"TX2R Mixer", NULL, "LADC"},
1220         {"TX2R Mixer", NULL, "RADC"},
1221         {"LSPKDAC", NULL, "DACL Mixer"},
1222         {"RSPKDAC", NULL, "DACR Mixer"},
1223         {"LHPDAC", NULL, "DACL Mixer"},
1224         {"RHPDAC", NULL, "DACR Mixer"},
1225         {"LSPK Pre Mixer", "LPGA Switch", "LInput Mixer"},
1226         {"LSPK Pre Mixer", "LSPKDAC Switch", "LSPKDAC"},
1227         {"LSPK Pre Mixer", "RPGA Switch", "RInput Mixer"},
1228         {"RSPK Pre Mixer", "LPGA Switch", "LInput Mixer"},
1229         {"RSPK Pre Mixer", "RSPKDAC Switch", "RSPKDAC"},
1230         {"RSPK Pre Mixer", "RPGA Switch", "RInput Mixer"},
1231         {"LHP Pre Mixer", "LPGA Switch", "LInput Mixer"},
1232         {"LHP Pre Mixer", "RPGA Switch", "RInput Mixer"},
1233         {"RHP Pre Mixer", "LPGA Switch", "LInput Mixer"},
1234         {"RHP Pre Mixer", "RPGA Switch", "RInput Mixer"},
1235         {"RECV Mixer", "LSPKPGA Switch", "LSPK Pre Mixer"},
1236         {"RECV Mixer", "RSPKPGA Switch", "RSPK Pre Mixer"},
1237         {"RECV Mixer", "BYPASS Switch", "Analog Bypass Mux"},
1238         {"LSPK Post Mixer", "RSPKPGA Switch", "RSPK Pre Mixer"},
1239         {"LSPK Post Mixer", "LSPKPGA Switch", "LSPK Pre Mixer"},
1240         {"LSPK Post Mixer", "BYPASS Switch", "Analog Bypass Mux"},
1241         {"RSPK Post Mixer", "LSPKPGA Switch", "LSPK Pre Mixer"},
1242         {"RSPK Post Mixer", "RSPKPGA Switch", "RSPK Pre Mixer"},
1243         {"RSPK Post Mixer", "BYPASS Switch", "Analog Bypass Mux"},
1244         {"LHP Post Mixer", "LHPDAC Switch", "LHPDAC"},
1245         {"LHP Post Mixer", "BYPASS Switch", "Analog Bypass Mux"},
1246         {"LHP Post Mixer", "LRPGAMixer Switch", "LHP Pre Mixer"},
1247         {"RHP Post Mixer", "LRPGAMixer Switch", "RHP Pre Mixer"},
1248         {"RHP Post Mixer", "BYPASS Switch", "Analog Bypass Mux"},
1249         {"RHP Post Mixer", "RHPDAC Switch", "RHPDAC"},
1250         {"RECV Drv", NULL, "RECV Mixer"},
1251         {"LSPK Drv", NULL, "LSPK Post Mixer"},
1252         {"RSPK Drv", NULL, "RSPK Post Mixer"},
1253         {"LHP Drv", NULL, "LHP Post Mixer"},
1254         {"RHP Drv", NULL, "RHP Post Mixer"},
1255         {"Receiver", NULL, "RECV Drv"},
1256         {"LSpeaker", NULL, "LSPK Drv"},
1257         {"RSpeaker", NULL, "RSPK Drv"},
1258         {"LHeadphone", NULL, "LHP Drv"},
1259         {"RHeadphone", NULL, "RHP Drv"},
1260 };
1261
1262 void    odroid_audio_tvout(bool tvout)
1263 {
1264         return;
1265 }
1266
1267
1268 static int rt5512_id_check(struct snd_soc_codec *codec)
1269 {
1270     int ret = -1;
1271     u8 regaddr = 0x00; // always revision id register
1272     u8 regval;
1273
1274     ret = i2c_master_send(codec->control_data, &regaddr, 1);
1275         if (ret != 1)
1276         {
1277                 dev_err(codec->dev, "send reg addr fail\n");
1278                 return -EIO;
1279         }
1280         ret = i2c_master_recv(codec->control_data, &regval, 1);
1281         if (ret != 1)
1282         {
1283                 dev_err(codec->dev, "read regval fail\n");
1284                 return -EIO;
1285         }
1286
1287     return regval;
1288 }
1289 static unsigned int rt5512_io_read(struct snd_soc_codec *codec, unsigned int reg)
1290 {
1291         int ret;
1292         char regaddr = reg&0xff;  // 8bit register address
1293         char regval[4] = {0};
1294         int len = rt5512_reg_priv[reg].reg_size;
1295         int i;
1296
1297         RT_DBG("reg 0x%02x\n", reg);
1298         if (reg == RT5512_VIRTUAL_REG)
1299         {
1300                 return rt5512_reg_priv[reg].reg_cache;
1301         }
1302
1303         if (len == 8 || len == 16 || len == 20)
1304         {
1305                 pr_err("rt5512-codec: not supported reg data size in this read function\n");
1306                 return -EINVAL;
1307         }
1308         else if (len == 0)
1309         {
1310                 dev_err(codec->dev, "Invalid reg_addr 0x%02x\n", reg);
1311                 return -EINVAL;
1312         }
1313
1314         if (rt5512_reg_priv[reg].sync_needed)
1315         {
1316                 ret = i2c_master_send(codec->control_data, &regaddr, 1);
1317                 if (ret != 1)
1318                 {
1319                         dev_err(codec->dev, "send reg addr fail\n");
1320                         return -EIO;
1321                 }
1322                 ret = i2c_master_recv(codec->control_data, regval, len);
1323                 if (ret != len)
1324                 {
1325                         dev_err(codec->dev, "read regval fail\n");
1326                         return -EIO;
1327                 }
1328
1329                 switch (len)
1330                 {
1331                         case 1:
1332                                 ret = 0x00 | regval[0];
1333                                 break;
1334                         case 4:
1335                                 for (i=0, ret=0x0; i<4 ; i++)
1336                                         ret |= (regval[i] << (24-8*i));
1337                                 break;
1338                 }
1339                 rt5512_reg_priv[reg].reg_cache = ret;
1340                 rt5512_reg_priv[reg].sync_needed = 0;
1341         }
1342         else
1343                 ret = rt5512_reg_priv[reg].reg_cache;
1344
1345         return ret;
1346 }
1347
1348 static int rt5512_io_write(struct snd_soc_codec *codec, unsigned int reg, unsigned int regval)
1349 {
1350         int ret;
1351         char data[5] = {0};
1352         int len = rt5512_reg_priv[reg].reg_size;
1353         int i;
1354
1355         RT_DBG("reg 0x%02x, val 0x%08x\n", reg, regval);
1356         if (reg == RT5512_VIRTUAL_REG)
1357         {
1358                 rt5512_reg_priv[reg].reg_cache = regval;
1359                 return 0;
1360         }
1361
1362         if (len == 8 || len == 16 || len == 20)
1363         {
1364                 pr_err("rt5512-codec: not supported reg data size in this write function\n");
1365                 return -EINVAL;
1366         }
1367         else if (len == 0)
1368         {
1369                 dev_err(codec->dev, "Invalid reg_addr 0x%02x\n", reg);
1370                 return -EINVAL;
1371         }
1372
1373         data[0] = reg&0xff;
1374
1375         switch (len)
1376         {
1377                 case 1:
1378                         data[1] = regval&0xff;
1379                         break;
1380                 case 4:
1381                         for (i=1; i<5; i++)
1382                                 data[i] = (regval>>(32-8*i))&0xff;
1383                         break;
1384         }
1385
1386         ret = i2c_master_send(codec->control_data, data, 1+len);
1387         if (ret != (1+len))
1388         {
1389                 dev_err(codec->dev, "write register fail\n");
1390                 return -EIO;
1391         }
1392         rt5512_reg_priv[reg].sync_needed = 1;
1393         return 0;
1394 }
1395
1396 static int rt5512_set_codec_io(struct snd_soc_codec *codec)
1397 {
1398         struct rt5512_codec_chip *chip = snd_soc_codec_get_drvdata(codec);
1399
1400         RT_DBG("\n");
1401         codec->read = rt5512_io_read;
1402         codec->write = rt5512_io_write;
1403         codec->control_data = chip->client;
1404         return 0;
1405 }
1406
1407 static int rt5512_digital_block_power(struct snd_soc_codec *codec, int pd)
1408 {
1409         RT_DBG("powerdown = %d\n", pd);
1410         snd_soc_update_bits(codec, 0x80, RT5512_PDBIT_MASK, (pd?RT5512_PDBIT_MASK:0));
1411         return 0;
1412 }
1413
1414 static int rt5512_set_bias_level(struct snd_soc_codec *codec,
1415                               enum snd_soc_bias_level level)
1416 {
1417         RT_DBG("bias_level->%d\n",(int)level);
1418         if (codec->dapm.bias_level != level)
1419         {
1420                 switch (level)
1421                 {
1422                         case SND_SOC_BIAS_ON:
1423                         case SND_SOC_BIAS_PREPARE:
1424                         case SND_SOC_BIAS_STANDBY:
1425                                 rt5512_digital_block_power(codec, 0);
1426                                 break;
1427                         case SND_SOC_BIAS_OFF:
1428                                 rt5512_digital_block_power(codec, 1);
1429                                 break;
1430                         default:
1431                                 dev_err(codec->dev, "not supported bias level\n");
1432                 }
1433                 //snd_soc_write(codec, reg, value);
1434                 codec->dapm.bias_level = level;
1435         }
1436         else
1437                 dev_warn(codec->dev, "the same bias level, no need to change\n");
1438         return 0;
1439 }
1440
1441 static void rt5512_codec_reset(struct snd_soc_codec *codec)
1442 {
1443         RT_DBG("\n");
1444         snd_soc_update_bits(codec, 0x80, RT5512_RSTBIT_MASK, RT5512_RSTBIT_MASK);
1445 }
1446
1447 static void rt5512_codec_force_reload_cache(struct snd_soc_codec *codec)
1448 {
1449         int i;
1450         int ret;
1451         RT_DBG("\n");
1452         for (i=0; i<RT5512_MAX_REG; i++)
1453         {
1454                 if (rt5512_reg_priv[i].reg_size == 1 || rt5512_reg_priv[i].reg_size == 4)
1455                 {
1456                         rt5512_reg_priv[i].sync_needed = 1;
1457                         ret = snd_soc_read(codec, i);
1458                         rt5512_reg_priv[i].reg_cache = ret;
1459                 }
1460         }
1461 }
1462
1463 static int rt5512_codec_probe(struct snd_soc_codec *codec)
1464 {
1465         RT_DBG("\n");
1466   //  unsigned int val1,val2;
1467         rt5512_set_codec_io(codec);
1468
1469     if (rt5512_id_check(codec) != 0x20)
1470         return -EINVAL;
1471     printk("read codec chip id is 0x%x\n",rt5512_id_check(codec));
1472
1473     rt5512_codec_reset(codec);
1474         rt5512_codec_force_reload_cache(codec);
1475
1476 #if FOR_MID
1477     rt5512_reg_init(codec);
1478 #endif
1479         rt5512_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1480
1481
1482
1483         snd_soc_add_codec_controls(codec, rt5512_snd_controls,
1484                         ARRAY_SIZE(rt5512_snd_controls));
1485         return 0;
1486 }
1487
1488 static int rt5512_codec_remove(struct snd_soc_codec *codec)
1489 {
1490         RT_DBG("\n");
1491         rt5512_set_bias_level(codec, SND_SOC_BIAS_OFF);
1492         return 0;
1493 }
1494
1495 #ifdef CONFIG_PM
1496 static int rt5512_codec_suspend(struct snd_soc_codec *codec)
1497 {
1498         RT_DBG("\n");
1499         rt5512_set_bias_level(codec, SND_SOC_BIAS_OFF);
1500         return 0;
1501 }
1502
1503 static int rt5512_codec_resume(struct snd_soc_codec *codec)
1504 {
1505         RT_DBG("\n");
1506         rt5512_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1507         return 0;
1508 }
1509 #else
1510 #define rt5512_codec_suspend NULL
1511 #define rt5512_codec_resume  NULL
1512 #endif /* #ifdef CONFIG_PM */
1513
1514 static struct snd_soc_codec_driver soc_codec_dev_rt5512 =
1515 {
1516         .probe =        rt5512_codec_probe,
1517         .remove =       rt5512_codec_remove,
1518         .suspend =      rt5512_codec_suspend,
1519         .resume =       rt5512_codec_resume,
1520         .set_bias_level = rt5512_set_bias_level,
1521         //.reg_cache_size = ARRAY_SIZE(rt5512_reg),
1522         //.reg_word_size = sizeof(u32),
1523         //.reg_cache_default = rt5512_reg,
1524         .dapm_widgets = rt5512_dapm_widgets,
1525         .num_dapm_widgets = ARRAY_SIZE(rt5512_dapm_widgets),
1526         .dapm_routes = rt5512_dapm_routes,
1527         .num_dapm_routes = ARRAY_SIZE(rt5512_dapm_routes),
1528 };
1529
1530 #ifdef CONFIG_DEBUG_FS
1531 static struct i2c_client *this_client;
1532 static struct dentry *debugfs_rt_dent;
1533 static struct dentry *debugfs_peek;
1534 static struct dentry *debugfs_poke;
1535 static struct dentry *debugfs_headset_test;
1536
1537 static unsigned char read_data[20];
1538 static unsigned int read_size;
1539
1540 static int codec_debug_open(struct inode *inode, struct file *file)
1541 {
1542         RT_DBG("\n");
1543
1544         file->private_data = inode->i_private;
1545         return 0;
1546 }
1547
1548 static int get_parameters(char *buf, long int *param1, int num_of_par)
1549 {
1550         char *token;
1551         int base, cnt;
1552
1553         RT_DBG("\n");
1554
1555         token = strsep(&buf, " ");
1556
1557         for (cnt = 0; cnt < num_of_par; cnt++) {
1558                 if (token != NULL) {
1559                         if ((token[1] == 'x') || (token[1] == 'X'))
1560                                 base = 16;
1561                         else
1562                                 base = 10;
1563
1564                         if (strict_strtoul(token, base, &param1[cnt]) != 0)
1565                                 return -EINVAL;
1566
1567                         token = strsep(&buf, " ");
1568                         }
1569                 else
1570                         break;
1571         }
1572         return cnt;
1573 }
1574
1575 #define STR_4TIMES "0x%02x 0x%02x 0x%02x 0x%02x "
1576
1577 static ssize_t codec_debug_read(struct file *filp, char __user *ubuf,
1578                                 size_t count, loff_t *ppos)
1579 {
1580         char lbuf[200];
1581
1582         RT_DBG("\n");
1583
1584         switch (read_size)
1585         {
1586                 case 1:
1587                         snprintf(lbuf, sizeof(lbuf), "0x%02x\n", read_data[0]);
1588                         break;
1589                 case 4:
1590                         snprintf(lbuf, sizeof(lbuf), STR_4TIMES "\n",
1591                                 read_data[0], read_data[1], read_data[2], read_data[3]);
1592                         break;
1593                 case 8:
1594                         snprintf(lbuf, sizeof(lbuf), STR_4TIMES STR_4TIMES "\n",
1595                                 read_data[0], read_data[1], read_data[2], read_data[3],
1596                                 read_data[4], read_data[5], read_data[6], read_data[7]);
1597                         break;
1598                 case 16:
1599                         snprintf(lbuf, sizeof(lbuf), STR_4TIMES STR_4TIMES STR_4TIMES STR_4TIMES "\n",
1600                                 read_data[0], read_data[1], read_data[2], read_data[3],
1601                                 read_data[4], read_data[5], read_data[6], read_data[7],
1602                                 read_data[8], read_data[9], read_data[10], read_data[11],
1603                                 read_data[12], read_data[13], read_data[14], read_data[15]);
1604                         break;
1605                 case 20:
1606                         snprintf(lbuf, sizeof(lbuf), STR_4TIMES STR_4TIMES STR_4TIMES STR_4TIMES STR_4TIMES "\n",
1607                                 read_data[0], read_data[1], read_data[2], read_data[3],
1608                                 read_data[4], read_data[5], read_data[6], read_data[7],
1609                                 read_data[8], read_data[9], read_data[10], read_data[11],
1610                                 read_data[12], read_data[13], read_data[14], read_data[15],
1611                                 read_data[16], read_data[17], read_data[18], read_data[19]);
1612                         break;
1613                 default:
1614                         return 0;
1615         }
1616         return simple_read_from_buffer(ubuf, count, ppos, lbuf, strlen(lbuf));
1617 }
1618
1619 static int rt5512_simulate_headset(struct i2c_client *client, int id)
1620 {
1621         struct rt5512_codec_chip *chip = i2c_get_clientdata(client);
1622
1623         RT_DBG("id = %d\n", id);
1624         switch (id)
1625         {
1626                 case 0: // simulate headset insert
1627                         snd_soc_jack_report(chip->rt_jack, SND_JACK_HEADSET, SND_JACK_HEADSET);
1628                         break;
1629                 case 1: // simulate headset plug out
1630                         snd_soc_jack_report(chip->rt_jack, 0, SND_JACK_HEADSET);
1631                         break;
1632                 case 2: // simulate headphone(no microphone) insert
1633                         snd_soc_jack_report(chip->rt_jack, SND_JACK_HEADPHONE, SND_JACK_HEADPHONE);
1634                         break;
1635                 case 3: // simulate headphone(no microphone) plug out
1636                         snd_soc_jack_report(chip->rt_jack, 0, SND_JACK_HEADPHONE);
1637                         break;
1638                 case 4: // simulate headset jack btn 0 click
1639                         snd_soc_jack_report(chip->rt_jack, SND_JACK_BTN_0, SND_JACK_BTN_0);
1640                         mdelay(1);
1641                         snd_soc_jack_report(chip->rt_jack, 0, SND_JACK_BTN_0);
1642                         break;
1643                 case 5: // simulate headset jack btn 1 click
1644                         snd_soc_jack_report(chip->rt_jack, SND_JACK_BTN_1, SND_JACK_BTN_1);
1645                         mdelay(1);
1646                         snd_soc_jack_report(chip->rt_jack, 0, SND_JACK_BTN_1);
1647                         break;
1648                 case 6: // simulate headset jack btn 2 click
1649                         snd_soc_jack_report(chip->rt_jack, SND_JACK_BTN_2, SND_JACK_BTN_2);
1650                         mdelay(1);
1651                         snd_soc_jack_report(chip->rt_jack, 0, SND_JACK_BTN_2);
1652                         break;
1653         }
1654         return 0;
1655 }
1656
1657 static ssize_t codec_debug_write(struct file *filp,
1658         const char __user *ubuf, size_t cnt, loff_t *ppos)
1659 {
1660         char *access_str = filp->private_data;
1661         char lbuf[200];
1662         int rc;
1663         long int param[21];
1664         int i = 0;
1665         int reg_dsize = 0;
1666
1667         RT_DBG("\n");
1668
1669         if (cnt > sizeof(lbuf) - 1)
1670                 return -EINVAL;
1671
1672         rc = copy_from_user(lbuf, ubuf, cnt);
1673         if (rc)
1674                 return -EFAULT;
1675
1676         lbuf[cnt] = '\0';
1677
1678         if (!strcmp(access_str, "poke")) {
1679                 /* write */
1680                 rc = get_parameters(lbuf, param, 21);
1681                 if (rc > 0 && param[0]<=RT5512_MAX_REG && rc == (rt5512_reg_priv[param[0]].reg_size+1))
1682                 {
1683                         reg_dsize = rt5512_reg_priv[param[0]].reg_size;
1684                         switch (reg_dsize)
1685                         {
1686                                 case 1:
1687                                 case 4:
1688                                 case 8:
1689                                 case 16:
1690                                 case 20:
1691                                         for (i = 0; i<reg_dsize+1; i++)
1692                                                 lbuf[i] = (unsigned char)param[i];
1693
1694                                         i2c_master_send(this_client, lbuf, reg_dsize+1);
1695                                         rt5512_reg_priv[param[0]].sync_needed = 1;
1696                                         break;
1697                                 default:
1698                                         rc = -EINVAL;
1699                                         break;
1700                         }
1701                 }
1702                 else
1703                         rc = -EINVAL;
1704         } else if (!strcmp(access_str, "peek")) {
1705                 /* read */
1706                 rc = get_parameters(lbuf, param, 1);
1707                 if (rc > 0 && param[0] <= RT5512_MAX_REG)
1708                 {
1709                         reg_dsize = rt5512_reg_priv[param[0]].reg_size;
1710                         switch (reg_dsize)
1711                         {
1712                                 case 1:
1713                                 case 4:
1714                                 case 8:
1715                                 case 16:
1716                                 case 20:
1717                                         lbuf[0] = (unsigned char)param[0];
1718                                         i2c_master_send(this_client, lbuf, 1);
1719                                         i2c_master_recv(this_client, lbuf, reg_dsize);
1720                                         for (i=0; i< reg_dsize; i++)
1721                                                 read_data[i] = lbuf[i];
1722                                         read_size = reg_dsize;
1723                                         break;
1724                                 default:
1725                                         break;
1726                         }
1727                 }
1728                 else
1729                         rc = -EINVAL;
1730         } else if (!strcmp(access_str, "headset_test")) {
1731                 rc = get_parameters(lbuf, param, 1);
1732                 if (rc > 0)
1733                 {
1734                         if (param[0] >= 0 && param[0] <= 6)
1735                                 rt5512_simulate_headset(this_client, param[0]);
1736                         else
1737                                 rc = -EINVAL;
1738                 }
1739                 else
1740                         rc = -EINVAL;
1741         }
1742
1743         if (rc > 0)
1744                 rc = cnt;
1745
1746         return rc;
1747 }
1748
1749 static const struct file_operations codec_debug_ops = {
1750         .open = codec_debug_open,
1751         .write = codec_debug_write,
1752         .read = codec_debug_read
1753 };
1754 #endif
1755
1756 static int rt5512_i2c_probe(struct i2c_client *client, const struct i2c_device_id *id)
1757 {
1758         int ret;
1759         struct rt5512_codec_chip *chip;
1760
1761         RT_DBG("\n");
1762         chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1763         if (!chip)
1764         {
1765                 pr_err("%s: could not allocate kernel memory\n", __func__);
1766                 return -ENOMEM;
1767         }
1768
1769         chip->dev = &client->dev;
1770         chip->client = client;
1771         chip->control_type = SND_SOC_I2C;
1772
1773         i2c_set_clientdata(client, chip);
1774
1775         ret = snd_soc_register_codec(&client->dev,
1776                         &soc_codec_dev_rt5512, rt5512_dai, ARRAY_SIZE(rt5512_dai));
1777         if (ret < 0)
1778         {
1779                 dev_err(&client->dev, "register codec failed\n");
1780                 goto codec_reg_fail;
1781         }
1782
1783         #ifdef CONFIG_DEBUG_FS
1784         RT_DBG("add debugfs for core debug\n");
1785         this_client = client;
1786         debugfs_rt_dent = debugfs_create_dir("rt5512_codec_dbg", 0);
1787         if (!IS_ERR(debugfs_rt_dent)) {
1788                 debugfs_peek = debugfs_create_file("peek",
1789                 S_IFREG | S_IRUGO, debugfs_rt_dent,
1790                 (void *) "peek", &codec_debug_ops);
1791
1792                 debugfs_poke = debugfs_create_file("poke",
1793                 S_IFREG | S_IRUGO, debugfs_rt_dent,
1794                 (void *) "poke", &codec_debug_ops);
1795
1796                 debugfs_headset_test = debugfs_create_file("headset_test",
1797                 S_IFREG | S_IRUGO, debugfs_rt_dent,
1798                 (void *) "headset_test", &codec_debug_ops);
1799         }
1800         #endif
1801
1802         pr_info("rt5512-codec driver successfully loaded\n");
1803         return 0;
1804
1805 codec_reg_fail:
1806         kfree(chip);
1807         return ret;
1808 }
1809
1810 static int rt5512_i2c_remove(struct i2c_client *client)
1811 {
1812         struct rt5512_codec_chip *chip = i2c_get_clientdata(client);
1813
1814         if (!IS_ERR(debugfs_rt_dent))
1815                 debugfs_remove_recursive(debugfs_rt_dent);
1816         kfree(chip);
1817         return 0;
1818 }
1819
1820 static const struct i2c_device_id rt5512_i2c_id[] =
1821 {
1822         {"rt5512", 0},
1823         {}
1824 };
1825 MODULE_DEVICE_TABLE(i2c, rt5512_i2c_id);
1826
1827 struct i2c_driver rt5512_i2c_driver =
1828 {
1829         .driver = {
1830                 .name = "rt5512",
1831                 .owner = THIS_MODULE,
1832         },
1833         .probe = rt5512_i2c_probe,
1834         .remove = rt5512_i2c_remove,
1835         .id_table = rt5512_i2c_id,
1836 };
1837
1838 static int __init rt5512_init(void)
1839 {
1840         return i2c_add_driver(&rt5512_i2c_driver);
1841 }
1842
1843 static void __exit rt5512_exit(void)
1844 {
1845         i2c_del_driver(&rt5512_i2c_driver);
1846 }
1847
1848 module_init(rt5512_init);
1849 module_exit(rt5512_exit);
1850
1851 MODULE_AUTHOR("cy_huang <cy_huang@richtek.com>");
1852 MODULE_DESCRIPTION("RT5512 audio codec for Rockchip board");
1853 MODULE_LICENSE("GPL");
1854 MODULE_VERSION(RT5512_DRV_VER);