sound/soc/codecs/rk3026_codec.c

   1 /*
   2  * rk3026.c  --  RK3026 CODEC ALSA SoC audio driver
   3  *
   4  * Copyright 2013 Rockchip
   5  * Author: chenjq <chenjq@rock-chips.com>
   6  */
   7
   8 #include <linux/module.h>
   9 #include <linux/moduleparam.h>
  10 #include <linux/init.h>
  11 #include <linux/delay.h>
  12 #include <linux/pm.h>
  13 #include <linux/i2c.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/spi/spi.h>
  16 #include <linux/gpio.h>
  17 #include <linux/clk.h>
  18 #include <sound/core.h>
  19 #include <sound/pcm.h>
  20 #include <sound/pcm_params.h>
  21 #include <sound/soc.h>
  22 #include <sound/soc-dapm.h>
  23 #include <sound/initval.h>
  24 #include <sound/tlv.h>
  25 #include <asm/io.h>
  26 #include <mach/board.h>
  27 #include <mach/io.h>
  28 #include <mach/iomux.h>
  29 #include <mach/cru.h>
  30 #include "rk3026_codec.h"
  31
  32
  33 #ifdef CONFIG_RK_HEADSET_DET
  34 #include "../../../drivers/headset_observe/rk_headset.h"
  35 #endif
  36
  37 static int debug;
  38 module_param(debug, int, S_IRUGO|S_IWUSR);
  39
  40 #define dbg_codec(level, fmt, arg...) do {                      \
  41         if (debug >= level)                                     \
  42         printk(fmt , ## arg); } while (0)
  43
  44 #define DBG(fmt,...)    dbg_codec(1,fmt,## __VA_ARGS__)
  45
  46
  47 /* volume setting
  48  *  0: -39dB
  49  *  26: 0dB
  50  *  31: 6dB
  51  *  Step: 1.5dB
  52 */
  53 #define  OUT_VOLUME    31//0~31
  54
  55 /* capture vol set
  56  * 0: -18db
  57  * 12: 0db
  58  * 31: 28.5db
  59  * step: 1.5db
  60 */
  61 #define CAP_VOL    17//0-31
  62
  63 //with capacity or  not
  64 #define WITH_CAP
  65 #ifdef CONFIG_MACH_RK_FAC
  66         rk3026_hdmi_ctrl=0;
  67 #endif
  68 struct rk3026_codec_priv {
  69         struct snd_soc_codec *codec;
  70
  71         unsigned int stereo_sysclk;
  72         unsigned int rate;
  73
  74         int playback_active;
  75         int capture_active;
  76
  77         int spk_ctl_gpio;
  78         int hp_ctl_gpio;
  79         int delay_time;
  80
  81         long int playback_path;
  82         long int capture_path;
  83         long int voice_call_path;
  84
  85         int      regbase;
  86         int     regbase_phy;
  87         int     regsize_phy;
  88         struct clk      *pclk;
  89 };
  90
  91 static struct rk3026_codec_priv *rk3026_priv = NULL;
  92
  93 #define RK3026_CODEC_ALL        0
  94 #define RK3026_CODEC_PLAYBACK   1
  95 #define RK3026_CODEC_CAPTURE    2
  96 #define RK3026_CODEC_INCALL     3
  97
  98 #define RK3026_CODEC_WORK_NULL  0
  99 #define RK3026_CODEC_WORK_POWER_DOWN    1
 100 #define RK3026_CODEC_WORK_POWER_UP      2
 101
 102 static struct workqueue_struct *rk3026_codec_workq;
 103
 104 static void rk3026_codec_capture_work(struct work_struct *work);
 105 static DECLARE_DELAYED_WORK(capture_delayed_work, rk3026_codec_capture_work);
 106 static int rk3026_codec_work_capture_type = RK3026_CODEC_WORK_NULL;
 107 static bool rk3026_for_mid = 1;
 108
 109 static int rk3026_get_parameter(void)
 110 {
 111         int val;
 112         char *command_line = strstr(saved_command_line, "ap_has_alsa=");
 113
 114         if (command_line == NULL) {
 115                 printk("%s : Can not get ap_has_alsa from kernel command line!\n", __func__);
 116                 return 0;
 117         }
 118
 119         command_line += 12;
 120
 121         val = simple_strtol(command_line, NULL, 10);
 122         if (val == 0 || val == 1) {
 123                 rk3026_for_mid = (val ? 0 : 1);
 124                 printk("%s : THIS IS FOR %s\n", __func__, rk3026_for_mid ? "mid" : "phone");
 125         } else {
 126                 printk("%s : get ap_has_alsa error, val = %d\n", __func__, val);
 127         }
 128
 129         return 0;
 130 }
 131
 132 static const unsigned int rk3026_reg_defaults[RK3026_PGAR_AGC_CTL5+1] = {
 133         [RK3026_RESET] = 0x0003,
 134         [RK3026_ADC_INT_CTL1] = 0x0050,
 135         [RK3026_ADC_INT_CTL2] = 0x000e,
 136         [RK3026_DAC_INT_CTL1] = 0x0050,
 137         [RK3026_DAC_INT_CTL2] = 0x000e,
 138         [RK3026_DAC_INT_CTL3] = 0x22,
 139         [RK3026_ADC_MIC_CTL] = 0x0000,
 140         [RK3026_BST_CTL] = 0x000,
 141         [RK3026_ALC_MUNIN_CTL] = 0x0044,
 142         [RK3026_BSTL_ALCL_CTL] = 0x000c,
 143         [RK3026_ALCR_GAIN_CTL] = 0x000C,
 144         [RK3026_ADC_ENABLE] = 0x0000,
 145         [RK3026_DAC_CTL] = 0x0000,
 146         [RK3026_DAC_ENABLE] = 0x0000,
 147         [RK3026_HPMIX_CTL] = 0x0000,
 148         [RK3026_HPMIX_S_SELECT] = 0x0000,
 149         [RK3026_HPOUT_CTL] = 0x0000,
 150         [RK3026_HPOUTL_GAIN] = 0x0000,
 151         [RK3026_HPOUTR_GAIN] = 0x0000,
 152         [RK3026_SELECT_CURRENT] = 0x003e,
 153         [RK3026_PGAL_AGC_CTL1] = 0x0000,
 154         [RK3026_PGAL_AGC_CTL2] = 0x0046,
 155         [RK3026_PGAL_AGC_CTL3] = 0x0041,
 156         [RK3026_PGAL_AGC_CTL4] = 0x002c,
 157         [RK3026_PGAL_ASR_CTL] = 0x0000,
 158         [RK3026_PGAL_AGC_MAX_H] = 0x0026,
 159         [RK3026_PGAL_AGC_MAX_L] = 0x0040,
 160         [RK3026_PGAL_AGC_MIN_H] = 0x0036,
 161         [RK3026_PGAL_AGC_MIN_L] = 0x0020,
 162         [RK3026_PGAL_AGC_CTL5] = 0x0038,
 163         [RK3026_PGAR_AGC_CTL1] = 0x0000,
 164         [RK3026_PGAR_AGC_CTL2] = 0x0046,
 165         [RK3026_PGAR_AGC_CTL3] = 0x0041,
 166         [RK3026_PGAR_AGC_CTL4] = 0x002c,
 167         [RK3026_PGAR_ASR_CTL] = 0x0000,
 168         [RK3026_PGAR_AGC_MAX_H] = 0x0026,
 169         [RK3026_PGAR_AGC_MAX_L] = 0x0040,
 170         [RK3026_PGAR_AGC_MIN_H] = 0x0036,
 171         [RK3026_PGAR_AGC_MIN_L] = 0x0020,
 172         [RK3026_PGAR_AGC_CTL5] = 0x0038,
 173 };
 174
 175 static struct rk3026_init_bit_typ rk3026_init_bit_list[] = {
 176         {RK3026_HPOUT_CTL, RK3026_HPOUTL_EN, RK3026_HPOUTL_WORK,RK3026_HPVREF_EN},
 177         {RK3026_HPOUT_CTL, RK3026_HPOUTR_EN, RK3026_HPOUTR_WORK,RK3026_HPVREF_WORK},
 178         {RK3026_HPMIX_CTL, RK3026_HPMIXR_EN, RK3026_HPMIXR_WORK2,RK3026_HPMIXR_WORK1},
 179         {RK3026_HPMIX_CTL, RK3026_HPMIXL_EN, RK3026_HPMIXL_WORK2,RK3026_HPMIXL_WORK1},
 180
 181 };
 182 #define RK3026_INIT_BIT_LIST_LEN ARRAY_SIZE(rk3026_init_bit_list)
 183
 184 static int rk3026_init_bit_register(unsigned int reg, int i)
 185 {
 186         for (; i < RK3026_INIT_BIT_LIST_LEN; i++) {
 187                 if (rk3026_init_bit_list[i].reg == reg)
 188                         return i;
 189         }
 190
 191         return -1;
 192 }
 193
 194 static unsigned int rk3026_codec_read(struct snd_soc_codec *codec, unsigned int reg);
 195 static inline void rk3026_write_reg_cache(struct snd_soc_codec *codec,
 196         unsigned int reg, unsigned int value);
 197
 198 static unsigned int rk3026_set_init_value(struct snd_soc_codec *codec, unsigned int reg, unsigned int value)
 199 {
 200         unsigned int read_value, power_bit, set_bit2,set_bit1;
 201         int i;
 202         int tmp = 0;
 203         // read codec init register
 204         i = rk3026_init_bit_register(reg, 0);
 205
 206         // set codec init bit
 207         // widget init bit should be setted 0 after widget power up or unmute,
 208         // and should be setted 1 after widget power down or mute.
 209         if (i >= 0) {
 210                 read_value = rk3026_codec_read(codec, reg);
 211                 while (i >= 0) {
 212                         power_bit = rk3026_init_bit_list[i].power_bit;
 213                         set_bit2 = rk3026_init_bit_list[i].init2_bit;
 214                         set_bit1 = rk3026_init_bit_list[i].init1_bit;
 215
 216                         if ((read_value & power_bit) != (value & power_bit))
 217                         {
 218                                 if (value & power_bit)
 219                                 {
 220                                         tmp = value | set_bit2 | set_bit1;
 221                                         writel(value, rk3026_priv->regbase+reg);
 222                                         writel(tmp, rk3026_priv->regbase+reg);
 223
 224                                 }
 225                                 else
 226                                 {
 227                                         tmp = value & (~set_bit2) & (~set_bit1);
 228                                         writel(tmp, rk3026_priv->regbase+reg);
 229                                         writel(value, rk3026_priv->regbase+reg);
 230                                 }
 231                                 value = tmp;
 232                         }
 233                         else
 234                         {
 235                                 if (read_value != value)
 236                                         writel(value, rk3026_priv->regbase+reg);
 237                         }
 238
 239                         i = rk3026_init_bit_register(reg, ++i);
 240
 241                         rk3026_write_reg_cache(codec, reg, value);
 242                 }
 243         }
 244         else
 245         {
 246                 return i;
 247         }
 248
 249         return value;
 250 }
 251
 252 static int rk3026_volatile_register(struct snd_soc_codec *codec, unsigned int reg)
 253 {
 254         switch (reg) {
 255         case RK3026_RESET:
 256                 return 1;
 257         default:
 258                 return 0;
 259         }
 260 }
 261
 262 static int rk3026_codec_register(struct snd_soc_codec *codec, unsigned int reg)
 263 {
 264         switch (reg) {
 265         case RK3026_RESET:
 266         case RK3026_ADC_INT_CTL1:
 267         case RK3026_ADC_INT_CTL2:
 268         case RK3026_DAC_INT_CTL1:
 269         case RK3026_DAC_INT_CTL2:
 270         case RK3026_DAC_INT_CTL3:
 271         case RK3026_ADC_MIC_CTL:
 272         case RK3026_BST_CTL:
 273         case RK3026_ALC_MUNIN_CTL:
 274         case RK3026_BSTL_ALCL_CTL:
 275         case RK3026_ALCR_GAIN_CTL:
 276         case RK3026_ADC_ENABLE:
 277         case RK3026_DAC_CTL:
 278         case RK3026_DAC_ENABLE:
 279         case RK3026_HPMIX_CTL:
 280         case RK3026_HPMIX_S_SELECT:
 281         case RK3026_HPOUT_CTL:
 282         case RK3026_HPOUTL_GAIN:
 283         case RK3026_HPOUTR_GAIN:
 284         case RK3026_SELECT_CURRENT:
 285         case RK3026_PGAL_AGC_CTL1:
 286         case RK3026_PGAL_AGC_CTL2:
 287         case RK3026_PGAL_AGC_CTL3:
 288         case RK3026_PGAL_AGC_CTL4:
 289         case RK3026_PGAL_ASR_CTL:
 290         case RK3026_PGAL_AGC_MAX_H:
 291         case RK3026_PGAL_AGC_MAX_L:
 292         case RK3026_PGAL_AGC_MIN_H:
 293         case RK3026_PGAL_AGC_MIN_L:
 294         case RK3026_PGAL_AGC_CTL5:
 295         case RK3026_PGAR_AGC_CTL1:
 296         case RK3026_PGAR_AGC_CTL2:
 297         case RK3026_PGAR_AGC_CTL3:
 298         case RK3026_PGAR_AGC_CTL4:
 299         case RK3026_PGAR_ASR_CTL:
 300         case RK3026_PGAR_AGC_MAX_H:
 301         case RK3026_PGAR_AGC_MAX_L:
 302         case RK3026_PGAR_AGC_MIN_H:
 303         case RK3026_PGAR_AGC_MIN_L:
 304         case RK3026_PGAR_AGC_CTL5:
 305                 return 1;
 306         default:
 307                 return 0;
 308         }
 309 }
 310
 311 static inline unsigned int rk3026_read_reg_cache(struct snd_soc_codec *codec,
 312         unsigned int reg)
 313 {
 314         unsigned int *cache = codec->reg_cache;
 315
 316         if (rk3026_codec_register(codec, reg) )
 317                 return  cache[reg];
 318
 319         printk("%s : reg error!\n", __func__);
 320
 321         return -EINVAL;
 322 }
 323
 324 static inline void rk3026_write_reg_cache(struct snd_soc_codec *codec,
 325         unsigned int reg, unsigned int value)
 326 {
 327         unsigned int *cache = codec->reg_cache;
 328
 329         if (rk3026_codec_register(codec, reg)) {
 330                 cache[reg] = value;
 331                 return;
 332         }
 333
 334         printk("%s : reg error!\n", __func__);
 335 }
 336
 337 static unsigned int rk3026_codec_read(struct snd_soc_codec *codec, unsigned int reg)
 338 {
 339         unsigned int value;
 340
 341         if (!rk3026_priv) {
 342                 printk("%s : rk3026 is NULL\n", __func__);
 343                 return -EINVAL;
 344         }
 345
 346         if (!rk3026_codec_register(codec, reg)) {
 347                 printk("%s : reg error!\n", __func__);
 348                 return -EINVAL;
 349         }
 350
 351         if (rk3026_volatile_register(codec, reg) == 0) {
 352                 value = rk3026_read_reg_cache(codec, reg);
 353         } else {
 354                 value = readl_relaxed(rk3026_priv->regbase+reg);
 355         }
 356
 357         value = readl_relaxed(rk3026_priv->regbase+reg);
 358         dbg_codec(2,"%s : reg = 0x%x, val= 0x%x\n", __func__, reg, value);
 359
 360         return value;
 361 }
 362
 363 static int rk3026_codec_write(struct snd_soc_codec *codec, unsigned int reg, unsigned int value)
 364 {
 365         int new_value;
 366
 367         if (!rk3026_priv) {
 368                 printk("%s : rk3026 is NULL\n", __func__);
 369                 return -EINVAL;
 370         } else if (!rk3026_codec_register(codec, reg)) {
 371                 printk("%s : reg error!\n", __func__);
 372                 return -EINVAL;
 373         }
 374
 375         new_value = rk3026_set_init_value(codec, reg, value);
 376
 377         if (new_value == -1)
 378         {
 379                 writel(value, rk3026_priv->regbase+reg);
 380                 rk3026_write_reg_cache(codec, reg, value);
 381         }
 382
 383         dbg_codec(2,"%s : reg = 0x%x, val = 0x%x, new_value=%d\n", __func__, reg, value,new_value);
 384         return 0;
 385 }
 386
 387 static int rk3026_hw_write(const struct i2c_client *client, const char *buf, int count)
 388 {
 389         unsigned int reg, value;
 390
 391         if (!rk3026_priv || !rk3026_priv->codec) {
 392                 printk("%s : rk3026_priv or rk3026_priv->codec is NULL\n", __func__);
 393                 return -EINVAL;
 394         }
 395
 396         if (count == 3) {
 397                 reg = (unsigned int)buf[0];
 398                 value = (buf[1] & 0xff00) | (0x00ff & buf[2]);
 399                 writel(value, rk3026_priv->regbase+reg);
 400         } else {
 401                 printk("%s : i2c len error\n", __func__);
 402         }
 403
 404         return  count;
 405 }
 406
 407 static int rk3026_reset(struct snd_soc_codec *codec)
 408 {
 409         writel(0x00, rk3026_priv->regbase+RK3026_RESET);
 410         mdelay(10);
 411         writel(0x03, rk3026_priv->regbase+RK3026_RESET);
 412         mdelay(10);
 413
 414         memcpy(codec->reg_cache, rk3026_reg_defaults,
 415                sizeof(rk3026_reg_defaults));
 416
 417         return 0;
 418 }
 419
 420 int rk3026_headset_mic_detect(bool headset_status)
 421 {
 422 #if 0
 423         struct snd_soc_codec *codec = rk3026_priv->codec;
 424
 425         DBG("%s\n", __func__);
 426
 427         if (!rk3026_priv || !rk3026_priv->codec) {
 428                 printk("%s : rk3026_priv or rk3026_priv->codec is NULL\n", __func__);
 429                 return -EINVAL;
 430         }
 431
 432         if (headset_status) {
 433                 snd_soc_update_bits(codec, RK3026_ADC_MIC_CTL,
 434                                 RK3026_MICBIAS2_PWRD | RK3026_MICBIAS2_V_MASK,
 435                                 RK3026_MICBIAS2_V_1_7);
 436         } else {// headset is out, disable MIC2 && MIC1 Bias
 437                 DBG("%s : headset is out,disable Mic2 Bias\n", __func__);
 438                 snd_soc_update_bits(codec, RK3026_ADC_MIC_CTL,
 439                                 RK3026_MICBIAS2_PWRD | RK3026_MICBIAS2_V_MASK,
 440                                 RK3026_MICBIAS2_V_1_0|RK3026_MICBIAS2_PWRD);
 441         }
 442 #endif
 443         return 0;
 444 }
 445 EXPORT_SYMBOL(rk3026_headset_mic_detect);
 446
 447 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -3900, 150, 0);
 448 static const DECLARE_TLV_DB_SCALE(pga_vol_tlv, -1800, 150, 0);
 449 static const DECLARE_TLV_DB_SCALE(bst_vol_tlv, 0, 2000, 0);
 450 static const DECLARE_TLV_DB_SCALE(pga_agc_max_vol_tlv, -1350, 600, 0);
 451 static const DECLARE_TLV_DB_SCALE(pga_agc_min_vol_tlv, -1800, 600, 0);
 452
 453 static const char *rk3026_input_mode[] = {"Differential","Single-Ended"};
 454
 455 static const char *rk3026_micbias_ratio[] = {"1.0 Vref", "1.1 Vref",
 456                 "1.2 Vref", "1.3 Vref", "1.4 Vref", "1.5 Vref", "1.6 Vref", "1.7 Vref",};
 457
 458 static const char *rk3026_dis_en_sel[] = {"Disable", "Enable"};
 459
 460 static const char *rk3026_pga_agc_way[] = {"Normal", "Jack"};
 461
 462 static const char *rk3026_agc_backup_way[] = {"Normal", "Jack1", "Jack2", "Jack3"};
 463
 464 static const char *rk3026_pga_agc_hold_time[] = {"0ms", "2ms",
 465                 "4ms", "8ms", "16ms", "32ms", "64ms", "128ms", "256ms", "512ms", "1s"};
 466
 467 static const char *rk3026_pga_agc_ramp_up_time[] = {"Normal:500us Jack:125us",
 468                 "Normal:1ms Jack:250us", "Normal:2ms Jack:500us", "Normal:4ms Jack:1ms",
 469                 "Normal:8ms Jack:2ms", "Normal:16ms Jack:4ms", "Normal:32ms Jack:8ms",
 470                 "Normal:64ms Jack:16ms", "Normal:128ms Jack:32ms", "Normal:256ms Jack:64ms",
 471                 "Normal:512ms Jack:128ms"};
 472
 473 static const char *rk3026_pga_agc_ramp_down_time[] = {"Normal:125us Jack:32us",
 474                 "Normal:250us Jack:64us", "Normal:500us Jack:125us", "Normal:1ms Jack:250us",
 475                 "Normal:2ms Jack:500us", "Normal:4ms Jack:1ms", "Normal:8ms Jack:2ms",
 476                 "Normal:16ms Jack:4ms", "Normal:32ms Jack:8ms", "Normal:64ms Jack:16ms",
 477                 "Normal:128ms Jack:32ms"};
 478
 479 static const char *rk3026_pga_agc_mode[] = {"Normal", "Limiter"};
 480
 481 static const char *rk3026_pga_agc_recovery_mode[] = {"Right Now", "After AGC to Limiter"};
 482
 483 static const char *rk3026_pga_agc_noise_gate_threhold[] = {"-39dB", "-45dB", "-51dB",
 484                 "-57dB", "-63dB", "-69dB", "-75dB", "-81dB"};
 485
 486 static const char *rk3026_pga_agc_update_gain[] = {"Right Now", "After 1st Zero Cross"};
 487
 488 static const char *rk3026_pga_agc_approximate_sample_rate[] = {"96KHZ","48KHz","441KHZ", "32KHz",
 489                 "24KHz", "16KHz", "12KHz", "8KHz"};
 490
 491 static const struct soc_enum rk3026_bst_enum[] = {
 492 SOC_ENUM_SINGLE(RK3026_BSTL_ALCL_CTL, RK3026_BSTL_MODE_SFT, 2, rk3026_input_mode),
 493 };
 494
 495
 496 static const struct soc_enum rk3026_micbias_enum[] = {
 497 SOC_ENUM_SINGLE(RK3026_ADC_MIC_CTL, RK3026_MICBIAS_VOL_SHT, 8, rk3026_micbias_ratio),
 498 };
 499
 500 static const struct soc_enum rk3026_agcl_enum[] = {
 501 SOC_ENUM_SINGLE(RK3026_PGAL_AGC_CTL1, RK3026_PGA_AGC_BK_WAY_SFT, 4, rk3026_agc_backup_way),/*0*/
 502 SOC_ENUM_SINGLE(RK3026_PGAL_AGC_CTL1, RK3026_PGA_AGC_WAY_SFT, 2, rk3026_pga_agc_way),/*1*/
 503 SOC_ENUM_SINGLE(RK3026_PGAL_AGC_CTL1, RK3026_PGA_AGC_HOLD_T_SFT, 11, rk3026_pga_agc_hold_time),/*2*/
 504 SOC_ENUM_SINGLE(RK3026_PGAL_AGC_CTL2, RK3026_PGA_AGC_GRU_T_SFT, 11, rk3026_pga_agc_ramp_up_time),/*3*/
 505 SOC_ENUM_SINGLE(RK3026_PGAL_AGC_CTL2, RK3026_PGA_AGC_GRD_T_SFT, 11, rk3026_pga_agc_ramp_down_time),/*4*/
 506 SOC_ENUM_SINGLE(RK3026_PGAL_AGC_CTL3, RK3026_PGA_AGC_MODE_SFT, 2, rk3026_pga_agc_mode),/*5*/
 507 SOC_ENUM_SINGLE(RK3026_PGAL_AGC_CTL3, RK3026_PGA_AGC_ZO_SFT, 2, rk3026_dis_en_sel),/*6*/
 508 SOC_ENUM_SINGLE(RK3026_PGAL_AGC_CTL3, RK3026_PGA_AGC_REC_MODE_SFT, 2, rk3026_pga_agc_recovery_mode),/*7*/
 509 SOC_ENUM_SINGLE(RK3026_PGAL_AGC_CTL3, RK3026_PGA_AGC_FAST_D_SFT, 2, rk3026_dis_en_sel),/*8*/
 510 SOC_ENUM_SINGLE(RK3026_PGAL_AGC_CTL3, RK3026_PGA_AGC_NG_SFT, 2, rk3026_dis_en_sel),/*9*/
 511 SOC_ENUM_SINGLE(RK3026_PGAL_AGC_CTL3, RK3026_PGA_AGC_NG_THR_SFT, 8, rk3026_pga_agc_noise_gate_threhold),/*10*/
 512 SOC_ENUM_SINGLE(RK3026_PGAL_AGC_CTL4, RK3026_PGA_AGC_ZO_MODE_SFT, 2, rk3026_pga_agc_update_gain),/*11*/
 513 SOC_ENUM_SINGLE(RK3026_PGAL_ASR_CTL, RK3026_PGA_SLOW_CLK_SFT, 2, rk3026_dis_en_sel),/*12*/
 514 SOC_ENUM_SINGLE(RK3026_PGAL_ASR_CTL, RK3026_PGA_ASR_SFT, 8, rk3026_pga_agc_approximate_sample_rate),/*13*/
 515 SOC_ENUM_SINGLE(RK3026_PGAL_AGC_CTL5, RK3026_PGA_AGC_SFT, 2, rk3026_dis_en_sel),/*14*/
 516 };
 517
 518 static const struct soc_enum rk3026_agcr_enum[] = {
 519 SOC_ENUM_SINGLE(RK3026_PGAR_AGC_CTL1, RK3026_PGA_AGC_BK_WAY_SFT, 4, rk3026_agc_backup_way),/*0*/
 520 SOC_ENUM_SINGLE(RK3026_PGAR_AGC_CTL1, RK3026_PGA_AGC_WAY_SFT, 2, rk3026_pga_agc_way),/*1*/
 521 SOC_ENUM_SINGLE(RK3026_PGAR_AGC_CTL1, RK3026_PGA_AGC_HOLD_T_SFT, 11, rk3026_pga_agc_hold_time),/*2*/
 522 SOC_ENUM_SINGLE(RK3026_PGAR_AGC_CTL2, RK3026_PGA_AGC_GRU_T_SFT, 11, rk3026_pga_agc_ramp_up_time),/*3*/
 523 SOC_ENUM_SINGLE(RK3026_PGAR_AGC_CTL2, RK3026_PGA_AGC_GRD_T_SFT, 11, rk3026_pga_agc_ramp_down_time),/*4*/
 524 SOC_ENUM_SINGLE(RK3026_PGAR_AGC_CTL3, RK3026_PGA_AGC_MODE_SFT, 2, rk3026_pga_agc_mode),/*5*/
 525 SOC_ENUM_SINGLE(RK3026_PGAR_AGC_CTL3, RK3026_PGA_AGC_ZO_SFT, 2, rk3026_dis_en_sel),/*6*/
 526 SOC_ENUM_SINGLE(RK3026_PGAR_AGC_CTL3, RK3026_PGA_AGC_REC_MODE_SFT, 2, rk3026_pga_agc_recovery_mode),/*7*/
 527 SOC_ENUM_SINGLE(RK3026_PGAR_AGC_CTL3, RK3026_PGA_AGC_FAST_D_SFT, 2, rk3026_dis_en_sel),/*8*/
 528 SOC_ENUM_SINGLE(RK3026_PGAR_AGC_CTL3, RK3026_PGA_AGC_NG_SFT, 2, rk3026_dis_en_sel),/*9*/
 529 SOC_ENUM_SINGLE(RK3026_PGAR_AGC_CTL3, RK3026_PGA_AGC_NG_THR_SFT, 8, rk3026_pga_agc_noise_gate_threhold),/*10*/
 530 SOC_ENUM_SINGLE(RK3026_PGAR_AGC_CTL4, RK3026_PGA_AGC_ZO_MODE_SFT, 2, rk3026_pga_agc_update_gain),/*11*/
 531 SOC_ENUM_SINGLE(RK3026_PGAR_ASR_CTL, RK3026_PGA_SLOW_CLK_SFT, 2, rk3026_dis_en_sel),/*12*/
 532 SOC_ENUM_SINGLE(RK3026_PGAR_ASR_CTL, RK3026_PGA_ASR_SFT, 8, rk3026_pga_agc_approximate_sample_rate),/*13*/
 533 SOC_ENUM_SINGLE(RK3026_PGAR_AGC_CTL5, RK3026_PGA_AGC_SFT, 2, rk3026_dis_en_sel),/*14*/
 534 };
 535
 536 static const struct snd_kcontrol_new rk3026_snd_controls[] = {
 537         //Add for set voice volume
 538         SOC_DOUBLE_R_TLV("Speaker Playback Volume", RK3026_HPOUTL_GAIN,
 539                 RK3026_HPOUTR_GAIN, RK3026_HPOUT_GAIN_SFT, 31, 0, out_vol_tlv),
 540         SOC_DOUBLE("Speaker Playback Switch", RK3026_HPOUT_CTL,
 541                 RK3026_HPOUTL_MUTE_SHT, RK3026_HPOUTR_MUTE_SHT, 1, 0),
 542         SOC_DOUBLE_R_TLV("Headphone Playback Volume", RK3026_HPOUTL_GAIN,
 543                 RK3026_HPOUTR_GAIN, RK3026_HPOUT_GAIN_SFT, 31, 0, out_vol_tlv),
 544         SOC_DOUBLE("Headphone Playback Switch", RK3026_HPOUT_CTL,
 545                 RK3026_HPOUTL_MUTE_SHT, RK3026_HPOUTR_MUTE_SHT, 1, 0),
 546         SOC_DOUBLE_R_TLV("Earpiece Playback Volume", RK3026_HPOUTL_GAIN,
 547                 RK3026_HPOUTR_GAIN, RK3026_HPOUT_GAIN_SFT, 31, 0, out_vol_tlv),
 548         SOC_DOUBLE("Earpiece Playback Switch", RK3026_HPOUT_CTL,
 549                 RK3026_HPOUTL_MUTE_SHT, RK3026_HPOUTR_MUTE_SHT, 1, 0),
 550
 551
 552         //Add for set capture mute
 553         SOC_SINGLE_TLV("Main Mic Capture Volume", RK3026_BST_CTL,
 554                 RK3026_BSTL_GAIN_SHT, 1, 0, bst_vol_tlv),
 555         SOC_SINGLE("Main Mic Capture Switch", RK3026_BST_CTL,
 556                 RK3026_BSTL_MUTE_SHT, 1, 0),
 557         SOC_SINGLE_TLV("Headset Mic Capture Volume", RK3026_BST_CTL,
 558                 RK3026_BSTR_GAIN_SHT, 1, 0, bst_vol_tlv),
 559         SOC_SINGLE("Headset Mic Capture Switch", RK3026_BST_CTL,
 560                 RK3026_BSTR_MUTE_SHT, 1, 0),
 561
 562         SOC_SINGLE("ALCL Switch", RK3026_ALC_MUNIN_CTL,
 563                 RK3026_ALCL_MUTE_SHT, 1, 0),
 564         SOC_SINGLE_TLV("ALCL Capture Volume", RK3026_BSTL_ALCL_CTL,
 565                 RK3026_ALCL_GAIN_SHT, 31, 0, pga_vol_tlv),
 566         SOC_SINGLE("ALCR Switch", RK3026_ALC_MUNIN_CTL,
 567                 RK3026_ALCR_MUTE_SHT, 1, 0),
 568         SOC_SINGLE_TLV("ALCR Capture Volume", RK3026_ALCR_GAIN_CTL,
 569                 RK3026_ALCL_GAIN_SHT, 31, 0, pga_vol_tlv),
 570
 571         SOC_ENUM("BST_L Mode",  rk3026_bst_enum[0]),
 572
 573         SOC_ENUM("Micbias Voltage",  rk3026_micbias_enum[0]),
 574         SOC_ENUM("PGAL AGC Back Way",  rk3026_agcl_enum[0]),
 575         SOC_ENUM("PGAL AGC Way",  rk3026_agcl_enum[1]),
 576         SOC_ENUM("PGAL AGC Hold Time",  rk3026_agcl_enum[2]),
 577         SOC_ENUM("PGAL AGC Ramp Up Time",  rk3026_agcl_enum[3]),
 578         SOC_ENUM("PGAL AGC Ramp Down Time",  rk3026_agcl_enum[4]),
 579         SOC_ENUM("PGAL AGC Mode",  rk3026_agcl_enum[5]),
 580         SOC_ENUM("PGAL AGC Gain Update Zero Enable",  rk3026_agcl_enum[6]),
 581         SOC_ENUM("PGAL AGC Gain Recovery LPGA VOL",  rk3026_agcl_enum[7]),
 582         SOC_ENUM("PGAL AGC Fast Decrement Enable",  rk3026_agcl_enum[8]),
 583         SOC_ENUM("PGAL AGC Noise Gate Enable",  rk3026_agcl_enum[9]),
 584         SOC_ENUM("PGAL AGC Noise Gate Threhold",  rk3026_agcl_enum[10]),
 585         SOC_ENUM("PGAL AGC Upate Gain",  rk3026_agcl_enum[11]),
 586         SOC_ENUM("PGAL AGC Slow Clock Enable",  rk3026_agcl_enum[12]),
 587         SOC_ENUM("PGAL AGC Approximate Sample Rate",  rk3026_agcl_enum[13]),
 588         SOC_ENUM("PGAL AGC Enable",  rk3026_agcl_enum[14]),
 589
 590         SOC_SINGLE_TLV("PGAL AGC Volume", RK3026_PGAL_AGC_CTL4,
 591                 RK3026_PGA_AGC_VOL_SFT, 31, 0, pga_vol_tlv),//AGC disable and 0x0a bit 5 is 1
 592
 593         SOC_SINGLE("PGAL AGC Max Level High 8 Bits", RK3026_PGAL_AGC_MAX_H,
 594                 0, 255, 0),
 595         SOC_SINGLE("PGAL AGC Max Level Low 8 Bits", RK3026_PGAL_AGC_MAX_L,
 596                 0, 255, 0),
 597         SOC_SINGLE("PGAL AGC Min Level High 8 Bits", RK3026_PGAL_AGC_MIN_H,
 598                 0, 255, 0),
 599         SOC_SINGLE("PGAL AGC Min Level Low 8 Bits", RK3026_PGAL_AGC_MIN_L,
 600                 0, 255, 0),
 601
 602         SOC_SINGLE_TLV("PGAL AGC Max Gain", RK3026_PGAL_AGC_CTL5,
 603                 RK3026_PGA_AGC_MAX_G_SFT, 7, 0, pga_agc_max_vol_tlv),//AGC enable and 0x0a bit 5 is 1
 604         SOC_SINGLE_TLV("PGAL AGC Min Gain", RK3026_PGAL_AGC_CTL5,
 605                 RK3026_PGA_AGC_MIN_G_SFT, 7, 0, pga_agc_min_vol_tlv),//AGC enable and 0x0a bit 5 is 1
 606
 607         SOC_ENUM("PGAR AGC Back Way",  rk3026_agcr_enum[0]),
 608         SOC_ENUM("PGAR AGC Way",  rk3026_agcr_enum[1]),
 609         SOC_ENUM("PGAR AGC Hold Time",  rk3026_agcr_enum[2]),
 610         SOC_ENUM("PGAR AGC Ramp Up Time",  rk3026_agcr_enum[3]),
 611         SOC_ENUM("PGAR AGC Ramp Down Time",  rk3026_agcr_enum[4]),
 612         SOC_ENUM("PGAR AGC Mode",  rk3026_agcr_enum[5]),
 613         SOC_ENUM("PGAR AGC Gain Update Zero Enable",  rk3026_agcr_enum[6]),
 614         SOC_ENUM("PGAR AGC Gain Recovery LPGA VOL",  rk3026_agcr_enum[7]),
 615         SOC_ENUM("PGAR AGC Fast Decrement Enable",  rk3026_agcr_enum[8]),
 616         SOC_ENUM("PGAR AGC Noise Gate Enable",  rk3026_agcr_enum[9]),
 617         SOC_ENUM("PGAR AGC Noise Gate Threhold",  rk3026_agcr_enum[10]),
 618         SOC_ENUM("PGAR AGC Upate Gain",  rk3026_agcr_enum[11]),
 619         SOC_ENUM("PGAR AGC Slow Clock Enable",  rk3026_agcr_enum[12]),
 620         SOC_ENUM("PGAR AGC Approximate Sample Rate",  rk3026_agcr_enum[13]),
 621         SOC_ENUM("PGAR AGC Enable",  rk3026_agcr_enum[14]),
 622
 623         SOC_SINGLE_TLV("PGAR AGC Volume", RK3026_PGAR_AGC_CTL4,
 624                 RK3026_PGA_AGC_VOL_SFT, 31, 0, pga_vol_tlv),//AGC disable and 0x0a bit 4 is 1
 625
 626         SOC_SINGLE("PGAR AGC Max Level High 8 Bits", RK3026_PGAR_AGC_MAX_H,
 627                 0, 255, 0),
 628         SOC_SINGLE("PGAR AGC Max Level Low 8 Bits", RK3026_PGAR_AGC_MAX_L,
 629                 0, 255, 0),
 630         SOC_SINGLE("PGAR AGC Min Level High 8 Bits", RK3026_PGAR_AGC_MIN_H,
 631                 0, 255, 0),
 632         SOC_SINGLE("PGAR AGC Min Level Low 8 Bits", RK3026_PGAR_AGC_MIN_L,
 633                 0, 255, 0),
 634
 635         SOC_SINGLE_TLV("PGAR AGC Max Gain", RK3026_PGAR_AGC_CTL5,
 636                 RK3026_PGA_AGC_MAX_G_SFT, 7, 0, pga_agc_max_vol_tlv),//AGC enable and 0x06 bit 4 is 1
 637         SOC_SINGLE_TLV("PGAR AGC Min Gain", RK3026_PGAR_AGC_CTL5,
 638                 RK3026_PGA_AGC_MIN_G_SFT, 7, 0, pga_agc_min_vol_tlv),//AGC enable and 0x06 bit 4 is 1
 639
 640 };
 641
 642 //For tiny alsa playback/capture/voice call path
 643 static const char *rk3026_playback_path_mode[] = {"OFF", "RCV", "SPK", "HP", "HP_NO_MIC", "BT", "SPK_HP", //0-6
 644                 "RING_SPK", "RING_HP", "RING_HP_NO_MIC", "RING_SPK_HP"};//7-10
 645
 646 static const char *rk3026_capture_path_mode[] = {"MIC OFF", "Main Mic", "Hands Free Mic", "BT Sco Mic"};
 647
 648 static const char *rk3026_voice_call_path_mode[] = {"OFF", "RCV", "SPK", "HP", "HP_NO_MIC", "BT"};//0-5
 649
 650 static const SOC_ENUM_SINGLE_DECL(rk3026_playback_path_type, 0, 0, rk3026_playback_path_mode);
 651
 652 static const SOC_ENUM_SINGLE_DECL(rk3026_capture_path_type, 0, 0, rk3026_capture_path_mode);
 653
 654 static const SOC_ENUM_SINGLE_DECL(rk3026_voice_call_path_type, 0, 0, rk3026_voice_call_path_mode);
 655
 656 static int rk3026_codec_power_up(int type);
 657 static int rk3026_codec_power_down(int type);
 658
 659 static int rk3026_playback_path_get(struct snd_kcontrol *kcontrol,
 660                 struct snd_ctl_elem_value *ucontrol)
 661 {
 662         if (!rk3026_priv) {
 663                 printk("%s : rk3026_priv is NULL\n", __func__);
 664                 return -EINVAL;
 665         }
 666
 667         DBG("%s : playback_path = %ld\n",__func__,ucontrol->value.integer.value[0]);
 668
 669         ucontrol->value.integer.value[0] = rk3026_priv->playback_path;
 670
 671         return 0;
 672 }
 673
 674 static int rk3026_playback_path_put(struct snd_kcontrol *kcontrol,
 675                 struct snd_ctl_elem_value *ucontrol)
 676 {
 677         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
 678         long int pre_path;
 679
 680         if (!rk3026_priv) {
 681                 printk("%s : rk3026_priv is NULL\n", __func__);
 682                 return -EINVAL;
 683         }
 684
 685         if (rk3026_priv->playback_path == ucontrol->value.integer.value[0]){
 686                 printk("%s : playback_path is not changed!\n",__func__);
 687                 return 0;
 688         }
 689
 690         pre_path = rk3026_priv->playback_path;
 691         rk3026_priv->playback_path = ucontrol->value.integer.value[0];
 692
 693         DBG("%s : set playback_path = %ld\n", __func__,
 694                 rk3026_priv->playback_path);
 695
 696         switch (rk3026_priv->playback_path) {
 697         case OFF:
 698                 if (pre_path != OFF)
 699                         rk3026_codec_power_down(RK3026_CODEC_PLAYBACK);
 700                 break;
 701         case RCV:
 702                 break;
 703         case SPK_PATH:
 704         case RING_SPK:
 705                 if (pre_path == OFF)
 706                         rk3026_codec_power_up(RK3026_CODEC_PLAYBACK);
 707                 break;
 708         case HP_PATH:
 709         case HP_NO_MIC:
 710         case RING_HP:
 711         case RING_HP_NO_MIC:
 712                 if (pre_path == OFF)
 713                         rk3026_codec_power_up(RK3026_CODEC_PLAYBACK);
 714                 break;
 715         case BT:
 716                 break;
 717         case SPK_HP:
 718         case RING_SPK_HP:
 719                 if (pre_path == OFF)
 720                         rk3026_codec_power_up(RK3026_CODEC_PLAYBACK);
 721                 break;
 722         default:
 723                 return -EINVAL;
 724         }
 725
 726         return 0;
 727 }
 728
 729 static int rk3026_capture_path_get(struct snd_kcontrol *kcontrol,
 730                 struct snd_ctl_elem_value *ucontrol)
 731 {
 732         if (!rk3026_priv) {
 733                 printk("%s : rk3026_priv is NULL\n", __func__);
 734                 return -EINVAL;
 735         }
 736
 737         DBG("%s : capture_path = %ld\n", __func__,
 738                 ucontrol->value.integer.value[0]);
 739
 740         ucontrol->value.integer.value[0] = rk3026_priv->capture_path;
 741
 742         return 0;
 743 }
 744
 745 static int rk3026_capture_path_put(struct snd_kcontrol *kcontrol,
 746                 struct snd_ctl_elem_value *ucontrol)
 747 {
 748         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
 749         long int pre_path;
 750
 751         if (!rk3026_priv) {
 752                 printk("%s : rk3026_priv is NULL\n", __func__);
 753                 return -EINVAL;
 754         }
 755
 756         if (rk3026_priv->capture_path == ucontrol->value.integer.value[0]){
 757                 printk("%s : capture_path is not changed!\n", __func__);
 758                 //return 0;
 759         }
 760
 761         pre_path = rk3026_priv->capture_path;
 762         rk3026_priv->capture_path = ucontrol->value.integer.value[0];
 763
 764         DBG("%s : set capture_path = %ld\n", __func__, rk3026_priv->capture_path);
 765
 766         switch (rk3026_priv->capture_path) {
 767         case MIC_OFF:
 768                 if (pre_path != MIC_OFF)
 769                         rk3026_codec_power_down(RK3026_CODEC_CAPTURE);
 770                 break;
 771         case Main_Mic:
 772                 if (pre_path == MIC_OFF)
 773                         rk3026_codec_power_up(RK3026_CODEC_CAPTURE);
 774                 break;
 775         case Hands_Free_Mic:
 776                 if (pre_path == MIC_OFF)
 777                         rk3026_codec_power_up(RK3026_CODEC_CAPTURE);
 778                 break;
 779         case BT_Sco_Mic:
 780                 break;
 781
 782         default:
 783                 return -EINVAL;
 784         }
 785
 786         return 0;
 787 }
 788
 789 static int rk3026_voice_call_path_get(struct snd_kcontrol *kcontrol,
 790                 struct snd_ctl_elem_value *ucontrol)
 791 {
 792         if (!rk3026_priv) {
 793                 printk("%s : rk3026_priv is NULL\n", __func__);
 794                 return -EINVAL;
 795         }
 796
 797         DBG("%s : playback_path = %ld\n", __func__,
 798                 ucontrol->value.integer.value[0]);
 799
 800         ucontrol->value.integer.value[0] = rk3026_priv->voice_call_path;
 801
 802         return 0;
 803 }
 804
 805 static int rk3026_voice_call_path_put(struct snd_kcontrol *kcontrol,
 806                 struct snd_ctl_elem_value *ucontrol)
 807 {
 808         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
 809         long int pre_path;
 810
 811         if (!rk3026_priv) {
 812                 printk("%s : rk3026_priv is NULL\n", __func__);
 813                 return -EINVAL;
 814         }
 815
 816         if (rk3026_priv->voice_call_path == ucontrol->value.integer.value[0]){
 817                 printk("%s : playback_path is not changed!\n",__func__);
 818                 //return 0;
 819         }
 820
 821         pre_path = rk3026_priv->voice_call_path;
 822         rk3026_priv->voice_call_path = ucontrol->value.integer.value[0];
 823
 824         DBG("%s : set playback_path = %ld\n", __func__,
 825                 rk3026_priv->voice_call_path);
 826
 827         //open playback route for incall route and keytone
 828         if (pre_path == OFF) {
 829                 if (rk3026_priv->playback_path != OFF) {
 830                         //mute output for incall route pop nosie
 831                                 mdelay(100);
 832                 } else
 833                         rk3026_codec_power_up(RK3026_CODEC_PLAYBACK);
 834         }
 835
 836         switch (rk3026_priv->voice_call_path) {
 837         case OFF:
 838                 if (pre_path != MIC_OFF)
 839                         rk3026_codec_power_down(RK3026_CODEC_CAPTURE);
 840                 break;
 841         case RCV:
 842                 break;
 843         case SPK_PATH:
 844                 //open incall route
 845                 if (pre_path == OFF ||  pre_path == RCV || pre_path == BT)
 846                         rk3026_codec_power_up(RK3026_CODEC_INCALL);
 847
 848                 break;
 849         case HP_PATH:
 850         case HP_NO_MIC:
 851                 //open incall route
 852                 if (pre_path == OFF ||  pre_path == RCV || pre_path == BT)
 853                         rk3026_codec_power_up(RK3026_CODEC_INCALL);
 854                 break;
 855         case BT:
 856                 break;
 857         default:
 858                 return -EINVAL;
 859         }
 860
 861         return 0;
 862 }
 863
 864 static const struct snd_kcontrol_new rk3026_snd_path_controls[] = {
 865         SOC_ENUM_EXT("Playback Path", rk3026_playback_path_type,
 866                 rk3026_playback_path_get, rk3026_playback_path_put),
 867
 868         SOC_ENUM_EXT("Capture MIC Path", rk3026_capture_path_type,
 869                 rk3026_capture_path_get, rk3026_capture_path_put),
 870
 871         SOC_ENUM_EXT("Voice Call Path", rk3026_voice_call_path_type,
 872                 rk3026_voice_call_path_get, rk3026_voice_call_path_put),
 873 };
 874
 875 static int rk3026_dacl_event(struct snd_soc_dapm_widget *w,
 876         struct snd_kcontrol *kcontrol, int event)
 877 {
 878         struct snd_soc_codec *codec = w->codec;
 879
 880         switch (event) {
 881         case SND_SOC_DAPM_POST_PMU:
 882                 snd_soc_update_bits(codec, RK3026_DAC_ENABLE,
 883                         RK3026_DACL_WORK,0);
 884                 snd_soc_update_bits(codec, RK3026_DAC_ENABLE,
 885                         RK3026_DACL_EN | RK3026_DACL_CLK_EN,
 886                         RK3026_DACL_EN | RK3026_DACL_CLK_EN);
 887                 snd_soc_update_bits(codec, RK3026_DAC_ENABLE,
 888                         RK3026_DACL_WORK, RK3026_DACL_WORK);
 889                 break;
 890
 891         case SND_SOC_DAPM_POST_PMD:
 892                 snd_soc_update_bits(codec, RK3026_DAC_ENABLE,
 893                         RK3026_DACL_EN | RK3026_DACL_CLK_EN,0);
 894                 snd_soc_update_bits(codec, RK3026_DAC_ENABLE,
 895                         RK3026_DACL_WORK, 0);
 896                 break;
 897
 898         default:
 899                 return 0;
 900         }
 901
 902         return 0;
 903 }
 904
 905 static int rk3026_dacr_event(struct snd_soc_dapm_widget *w,
 906         struct snd_kcontrol *kcontrol, int event)
 907 {
 908         struct snd_soc_codec *codec = w->codec;
 909
 910         switch (event) {
 911         case SND_SOC_DAPM_POST_PMU:
 912                 snd_soc_update_bits(codec, RK3026_DAC_ENABLE,
 913                         RK3026_DACR_WORK,0);
 914                 snd_soc_update_bits(codec, RK3026_DAC_ENABLE,
 915                         RK3026_DACR_EN | RK3026_DACR_CLK_EN,
 916                         RK3026_DACR_EN | RK3026_DACR_CLK_EN);
 917                 snd_soc_update_bits(codec, RK3026_DAC_ENABLE,
 918                         RK3026_DACR_WORK, RK3026_DACR_WORK);
 919                 break;
 920
 921         case SND_SOC_DAPM_POST_PMD:
 922                 snd_soc_update_bits(codec, RK3026_DAC_ENABLE,
 923                         RK3026_DACR_EN | RK3026_DACR_CLK_EN,0);
 924                 snd_soc_update_bits(codec, RK3026_DAC_ENABLE,
 925                         RK3026_DACR_WORK, 0);
 926                 break;
 927
 928         default:
 929                 return 0;
 930         }
 931
 932         return 0;
 933 }
 934
 935 static int rk3026_adcl_event(struct snd_soc_dapm_widget *w,
 936         struct snd_kcontrol *kcontrol, int event)
 937 {
 938         struct snd_soc_codec *codec = w->codec;
 939
 940         switch (event) {
 941         case SND_SOC_DAPM_POST_PMU:
 942                 snd_soc_update_bits(codec, RK3026_ADC_ENABLE,
 943                         RK3026_ADCL_CLK_EN_SFT | RK3026_ADCL_AMP_EN_SFT,
 944                         RK3026_ADCL_CLK_EN | RK3026_ADCL_AMP_EN);
 945                 break;
 946
 947         case SND_SOC_DAPM_POST_PMD:
 948                 snd_soc_update_bits(codec, RK3026_ADC_ENABLE,
 949                         RK3026_ADCL_CLK_EN_SFT | RK3026_ADCL_AMP_EN_SFT,0);
 950                 break;
 951
 952         default:
 953                 return 0;
 954         }
 955
 956         return 0;
 957 }
 958
 959 static int rk3026_adcr_event(struct snd_soc_dapm_widget *w,
 960         struct snd_kcontrol *kcontrol, int event)
 961 {
 962         struct snd_soc_codec *codec = w->codec;
 963
 964         switch (event) {
 965         case SND_SOC_DAPM_POST_PMU:
 966                 snd_soc_update_bits(codec, RK3026_ADC_ENABLE,
 967                         RK3026_ADCR_CLK_EN_SFT | RK3026_ADCR_AMP_EN_SFT,
 968                         RK3026_ADCR_CLK_EN | RK3026_ADCR_AMP_EN );
 969                 break;
 970
 971         case SND_SOC_DAPM_POST_PMD:
 972                 snd_soc_update_bits(codec, RK3026_ADC_ENABLE,
 973                         RK3026_ADCR_CLK_EN_SFT | RK3026_ADCR_AMP_EN_SFT,0);
 974                 break;
 975
 976         default:
 977                 return 0;
 978         }
 979
 980         return 0;
 981 }
 982
 983 /* HPmix */
 984 static const struct snd_kcontrol_new rk3026_hpmixl[] = {
 985         SOC_DAPM_SINGLE("ALCR Switch", RK3026_HPMIX_S_SELECT,
 986                                 RK3026_HPMIXL_SEL_ALCR_SFT, 1, 0),
 987         SOC_DAPM_SINGLE("ALCL Switch", RK3026_HPMIX_S_SELECT,
 988                                 RK3026_HPMIXL_SEL_ALCL_SFT, 1, 0),
 989         SOC_DAPM_SINGLE("DACL Switch", RK3026_HPMIX_S_SELECT,
 990                                 RK3026_HPMIXL_SEL_DACL_SFT, 1, 0),
 991 };
 992
 993 static const struct snd_kcontrol_new rk3026_hpmixr[] = {
 994         SOC_DAPM_SINGLE("ALCR Switch", RK3026_HPMIX_S_SELECT,
 995                                 RK3026_HPMIXR_SEL_ALCR_SFT, 1, 0),
 996         SOC_DAPM_SINGLE("ALCL Switch", RK3026_HPMIX_S_SELECT,
 997                                 RK3026_HPMIXR_SEL_ALCL_SFT, 1, 0),
 998         SOC_DAPM_SINGLE("DACR Switch", RK3026_HPMIX_S_SELECT,
 999                                 RK3026_HPMIXR_SEL_DACR_SFT, 1, 0),
1000 };
1001
1002 static int rk3026_hpmixl_event(struct snd_soc_dapm_widget *w,
1003         struct snd_kcontrol *kcontrol, int event)
1004 {
1005         struct snd_soc_codec *codec = w->codec;
1006
1007         switch (event) {
1008         case SND_SOC_DAPM_POST_PMU:
1009                 snd_soc_update_bits(codec, RK3026_DAC_CTL,
1010                         RK3026_ZO_DET_VOUTR_SFT, RK3026_ZO_DET_VOUTR_EN);
1011                 snd_soc_update_bits(codec, RK3026_DAC_CTL,
1012                         RK3026_ZO_DET_VOUTL_SFT, RK3026_ZO_DET_VOUTL_EN);
1013                 break;
1014
1015         case SND_SOC_DAPM_PRE_PMD:
1016                 snd_soc_update_bits(codec, RK3026_DAC_CTL,
1017                         RK3026_ZO_DET_VOUTR_SFT, RK3026_ZO_DET_VOUTR_DIS);
1018                 snd_soc_update_bits(codec, RK3026_DAC_CTL,
1019                         RK3026_ZO_DET_VOUTL_SFT, RK3026_ZO_DET_VOUTL_DIS);
1020                 break;
1021
1022         default:
1023                 return 0;
1024         }
1025
1026         return 0;
1027 }
1028
1029 static int rk3026_hpmixr_event(struct snd_soc_dapm_widget *w,
1030         struct snd_kcontrol *kcontrol, int event)
1031 {
1032         struct snd_soc_codec *codec = w->codec;
1033 #if 0
1034         switch (event) {
1035         case SND_SOC_DAPM_POST_PMU:
1036                 snd_soc_update_bits(codec, RK3026_HPMIX_CTL,
1037                         RK3026_HPMIXR_WORK2, RK3026_HPMIXR_WORK2);
1038                 break;
1039
1040         case SND_SOC_DAPM_PRE_PMD:
1041                 snd_soc_update_bits(codec, RK3026_HPMIX_CTL,
1042                         RK3026_HPMIXR_WORK2, 0);
1043                 break;
1044
1045         default:
1046                 return 0;
1047         }
1048 #endif
1049         return 0;
1050 }
1051
1052 /* HP MUX */
1053
1054 static const char *hpl_sel[] = {"HPMIXL", "DACL"};
1055
1056 static const struct soc_enum hpl_sel_enum =
1057         SOC_ENUM_SINGLE(RK3026_HPMIX_S_SELECT, RK3026_HPMIXL_BYPASS_SFT,
1058                         ARRAY_SIZE(hpl_sel), hpl_sel);
1059
1060 static const struct snd_kcontrol_new hpl_sel_mux =
1061         SOC_DAPM_ENUM("HPL select Mux", hpl_sel_enum);
1062
1063 static const char *hpr_sel[] = {"HPMIXR", "DACR"};
1064
1065 static const struct soc_enum hpr_sel_enum =
1066         SOC_ENUM_SINGLE(RK3026_HPMIX_S_SELECT, RK3026_HPMIXR_BYPASS_SFT,
1067                         ARRAY_SIZE(hpr_sel), hpr_sel);
1068
1069 static const struct snd_kcontrol_new hpr_sel_mux =
1070         SOC_DAPM_ENUM("HPR select Mux", hpr_sel_enum);
1071
1072 /* IN_L MUX */
1073 static const char *lnl_sel[] = {"NO","BSTL", "LINEL","NOUSE"};
1074
1075 static const struct soc_enum lnl_sel_enum =
1076         SOC_ENUM_SINGLE(RK3026_ALC_MUNIN_CTL, RK3026_MUXINL_F_SHT,
1077                         ARRAY_SIZE(lnl_sel), lnl_sel);
1078
1079 static const struct snd_kcontrol_new lnl_sel_mux =
1080         SOC_DAPM_ENUM("MUXIN_L select", lnl_sel_enum);
1081
1082 /* IN_R MUX */
1083 static const char *lnr_sel[] = {"NO","BSTR", "LINER","NOUSE"};
1084
1085 static const struct soc_enum lnr_sel_enum =
1086         SOC_ENUM_SINGLE(RK3026_ALC_MUNIN_CTL, RK3026_MUXINR_F_SHT,
1087                         ARRAY_SIZE(lnr_sel), lnr_sel);
1088
1089 static const struct snd_kcontrol_new lnr_sel_mux =
1090         SOC_DAPM_ENUM("MUXIN_R select", lnr_sel_enum);
1091
1092
1093 static const struct snd_soc_dapm_widget rk3026_dapm_widgets[] = {
1094
1095         /* microphone bias */
1096         SND_SOC_DAPM_MICBIAS("Mic Bias", RK3026_ADC_MIC_CTL,
1097                 RK3026_MICBIAS_VOL_ENABLE, 0),
1098
1099         /* DACs */
1100         SND_SOC_DAPM_DAC_E("DACL", NULL, SND_SOC_NOPM,
1101                 0, 0, rk3026_dacl_event,
1102                 SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
1103         SND_SOC_DAPM_DAC_E("DACR", NULL, SND_SOC_NOPM,
1104                 0, 0, rk3026_dacr_event,
1105                 SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
1106
1107         /* ADCs */
1108         SND_SOC_DAPM_ADC_E("ADCL", NULL, SND_SOC_NOPM,
1109                 0, 0, rk3026_adcl_event,
1110                 SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
1111         SND_SOC_DAPM_ADC_E("ADCR", NULL, SND_SOC_NOPM,
1112                 0, 0, rk3026_adcr_event,
1113                 SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
1114
1115         /* PGA */
1116         SND_SOC_DAPM_PGA("BSTL", RK3026_BST_CTL,
1117                 RK3026_BSTL_PWRD_SFT, 0, NULL, 0),
1118         SND_SOC_DAPM_PGA("BSTR", RK3026_BST_CTL,
1119                 RK3026_BSTR_PWRD_SFT, 0, NULL, 0),
1120         SND_SOC_DAPM_PGA("ALCL", RK3026_ALC_MUNIN_CTL,
1121                 RK3026_ALCL_PWR_SHT , 0, NULL, 0),
1122         SND_SOC_DAPM_PGA("ALCR", RK3026_ALC_MUNIN_CTL,
1123                 RK3026_ALCR_PWR_SHT , 0, NULL, 0),
1124         SND_SOC_DAPM_PGA("HPL", RK3026_HPOUT_CTL,
1125                 RK3026_HPOUTL_PWR_SHT, 0, NULL, 0),
1126         SND_SOC_DAPM_PGA("HPR", RK3026_HPOUT_CTL,
1127                 RK3026_HPOUTR_PWR_SHT, 0, NULL, 0),
1128
1129         /* MIXER */
1130         SND_SOC_DAPM_MIXER_E("HPMIXL", RK3026_HPMIX_CTL,
1131                 RK3026_HPMIXL_SFT, 0, rk3026_hpmixl,
1132                 ARRAY_SIZE(rk3026_hpmixl),rk3026_hpmixl_event,
1133                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1134         SND_SOC_DAPM_MIXER_E("HPMIXR", RK3026_HPMIX_CTL,
1135                 RK3026_HPMIXR_SFT, 0, rk3026_hpmixr,
1136                 ARRAY_SIZE(rk3026_hpmixr),rk3026_hpmixr_event,
1137                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1138
1139         /* MUX */
1140         SND_SOC_DAPM_MUX("IN_R Mux", SND_SOC_NOPM, 0, 0,
1141                 &lnr_sel_mux),
1142         SND_SOC_DAPM_MUX("IN_L Mux", SND_SOC_NOPM, 0, 0,
1143                 &lnl_sel_mux),
1144         SND_SOC_DAPM_MUX("HPL Mux", SND_SOC_NOPM, 0, 0,
1145                 &hpl_sel_mux),
1146         SND_SOC_DAPM_MUX("HPR Mux", SND_SOC_NOPM, 0, 0,
1147                 &hpr_sel_mux),
1148
1149         /* Audio Interface */
1150         SND_SOC_DAPM_AIF_IN("I2S DAC", "HiFi Playback", 0,
1151                 SND_SOC_NOPM, 0, 0),
1152         SND_SOC_DAPM_AIF_OUT("I2S ADC", "HiFi Capture", 0,
1153                 SND_SOC_NOPM, 0, 0),
1154
1155         /* Input */
1156         SND_SOC_DAPM_INPUT("LINEL"),
1157         SND_SOC_DAPM_INPUT("LINER"),
1158         SND_SOC_DAPM_INPUT("MICP"),
1159         SND_SOC_DAPM_INPUT("MICN"),
1160
1161         /* Output */
1162         SND_SOC_DAPM_OUTPUT("HPOUTL"),
1163         SND_SOC_DAPM_OUTPUT("HPOUTR"),
1164
1165 };
1166
1167 static const struct snd_soc_dapm_route rk3026_dapm_routes[] = {
1168         /* Input */
1169         {"BSTR", NULL, "MICP"},
1170         {"BSTL", NULL, "MICP"},
1171         {"BSTL", NULL, "MICN"},
1172
1173         {"IN_R Mux", "LINER", "LINER"},
1174         {"IN_R Mux", "BSTR", "BSTR"},
1175         {"IN_L Mux", "LINEL", "LINEL"},
1176         {"IN_L Mux", "BSTL", "BSTL"},
1177
1178         {"ALCL", NULL, "IN_L Mux"},
1179         {"ALCR", NULL, "IN_R Mux"},
1180
1181
1182         {"ADCR", NULL, "ALCR"},
1183         {"ADCL", NULL, "ALCL"},
1184
1185         {"I2S ADC", NULL, "ADCR"},
1186         {"I2S ADC", NULL, "ADCL"},
1187
1188         /* Output */
1189
1190         {"DACR", NULL, "I2S DAC"},
1191         {"DACL", NULL, "I2S DAC"},
1192
1193         {"HPMIXR", "ALCR Switch", "ALCR"},
1194         {"HPMIXR", "ALCL Switch", "ALCL"},
1195         {"HPMIXR", "DACR Switch", "DACR"},
1196
1197         {"HPMIXL", "ALCR Switch", "ALCR"},
1198         {"HPMIXL", "ALCL Switch", "ALCL"},
1199         {"HPMIXL", "DACL Switch", "DACL"},
1200
1201
1202         {"HPR Mux", "DACR", "DACR"},
1203         {"HPR Mux", "HPMIXR", "HPMIXR"},
1204         {"HPL Mux", "DACL", "DACL"},
1205         {"HPL Mux", "HPMIXL", "HPMIXL"},
1206
1207         {"HPR", NULL, "HPR Mux"},
1208         {"HPL", NULL, "HPL Mux"},
1209
1210         {"HPOUTR", NULL, "HPR"},
1211         {"HPOUTL", NULL, "HPL"},
1212 };
1213
1214 static int rk3026_set_bias_level(struct snd_soc_codec *codec,
1215                                  enum snd_soc_bias_level level)
1216 {
1217         DBG("%s  level=%d\n",__func__,level);
1218
1219         switch (level) {
1220         case SND_SOC_BIAS_ON:
1221                 break;
1222
1223         case SND_SOC_BIAS_PREPARE:
1224                 break;
1225
1226         case SND_SOC_BIAS_STANDBY:
1227                 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
1228                         writel(0x32, rk3026_priv->regbase+RK3026_DAC_INT_CTL3);
1229                         snd_soc_update_bits(codec, RK3026_ADC_MIC_CTL,
1230                                 RK3026_ADC_CURRENT_ENABLE, RK3026_ADC_CURRENT_ENABLE);
1231                         snd_soc_update_bits(codec, RK3026_DAC_CTL,
1232                                 RK3026_CURRENT_EN, RK3026_CURRENT_EN);
1233                         /* set power */
1234                         snd_soc_update_bits(codec, RK3026_ADC_ENABLE,
1235                                 RK3026_ADCL_REF_VOL_EN_SFT | RK3026_ADCR_REF_VOL_EN_SFT,
1236                                 RK3026_ADCL_REF_VOL_EN | RK3026_ADCR_REF_VOL_EN);
1237
1238                         snd_soc_update_bits(codec, RK3026_ADC_MIC_CTL,
1239                                 RK3026_ADCL_ZERO_DET_EN_SFT | RK3026_ADCR_ZERO_DET_EN_SFT,
1240                                 RK3026_ADCL_ZERO_DET_EN | RK3026_ADCR_ZERO_DET_EN);
1241
1242                         snd_soc_update_bits(codec, RK3026_DAC_CTL,
1243                                 RK3026_REF_VOL_DACL_EN_SFT | RK3026_REF_VOL_DACR_EN_SFT,
1244                                 RK3026_REF_VOL_DACL_EN | RK3026_REF_VOL_DACR_EN );
1245
1246                         snd_soc_update_bits(codec, RK3026_DAC_ENABLE,
1247                                 RK3026_DACL_REF_VOL_EN_SFT | RK3026_DACR_REF_VOL_EN_SFT,
1248                                 RK3026_DACL_REF_VOL_EN | RK3026_DACR_REF_VOL_EN );
1249                 }
1250                 break;
1251
1252         case SND_SOC_BIAS_OFF:
1253                         snd_soc_update_bits(codec, RK3026_DAC_ENABLE,
1254                                 RK3026_DACL_REF_VOL_EN_SFT | RK3026_DACR_REF_VOL_EN_SFT,0);
1255                         snd_soc_update_bits(codec, RK3026_DAC_CTL,
1256                                 RK3026_REF_VOL_DACL_EN_SFT | RK3026_REF_VOL_DACR_EN_SFT,0);
1257                         snd_soc_update_bits(codec, RK3026_ADC_MIC_CTL,
1258                                 RK3026_ADCL_ZERO_DET_EN_SFT | RK3026_ADCR_ZERO_DET_EN_SFT,0);
1259                         snd_soc_update_bits(codec, RK3026_ADC_ENABLE,
1260                                 RK3026_ADCL_REF_VOL_EN_SFT | RK3026_ADCR_REF_VOL_EN_SFT,0);
1261                         snd_soc_update_bits(codec, RK3026_ADC_MIC_CTL,
1262                                 RK3026_ADC_CURRENT_ENABLE, 0);
1263                         snd_soc_update_bits(codec, RK3026_DAC_CTL,
1264                                 RK3026_CURRENT_EN, 0);
1265                         writel(0x22, rk3026_priv->regbase+RK3026_DAC_INT_CTL3);
1266                 break;
1267         }
1268         codec->dapm.bias_level = level;
1269
1270         return 0;
1271 }
1272
1273 static int rk3026_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1274                                  int clk_id, unsigned int freq, int dir)
1275 {
1276         struct rk3026_codec_priv *rk3026 = rk3026_priv;
1277
1278         if (!rk3026) {
1279                 printk("%s : rk3026 is NULL\n", __func__);
1280                 return -EINVAL;
1281         }
1282
1283         rk3026->stereo_sysclk = freq;
1284
1285         return 0;
1286 }
1287
1288 static int rk3026_set_dai_fmt(struct snd_soc_dai *codec_dai,
1289                               unsigned int fmt)
1290 {
1291         struct snd_soc_codec *codec = codec_dai->codec;
1292         unsigned int adc_aif1 = 0, adc_aif2 = 0, dac_aif1 = 0, dac_aif2 = 0;
1293
1294         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1295         case SND_SOC_DAIFMT_CBS_CFS:
1296                 adc_aif2 |= RK3026_I2S_MODE_SLV;
1297                 break;
1298         case SND_SOC_DAIFMT_CBM_CFM:
1299                 adc_aif2 |= RK3026_I2S_MODE_MST;
1300                 break;
1301         default:
1302                 printk("%s : set master mask failed!\n", __func__);
1303                 return -EINVAL;
1304         }
1305
1306         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1307         case SND_SOC_DAIFMT_DSP_A:
1308                 adc_aif1 |= RK3026_ADC_DF_PCM;
1309                 dac_aif1 |= RK3026_DAC_DF_PCM;
1310                 break;
1311         case SND_SOC_DAIFMT_DSP_B:
1312                 break;
1313         case SND_SOC_DAIFMT_I2S:
1314                 adc_aif1 |= RK3026_ADC_DF_I2S;
1315                 dac_aif1 |= RK3026_DAC_DF_I2S;
1316                 break;
1317         case SND_SOC_DAIFMT_RIGHT_J:
1318                 adc_aif1 |= RK3026_ADC_DF_RJ;
1319                 dac_aif1 |= RK3026_DAC_DF_RJ;
1320                 break;
1321         case SND_SOC_DAIFMT_LEFT_J:
1322                 adc_aif1 |= RK3026_ADC_DF_LJ;
1323                 dac_aif1 |= RK3026_DAC_DF_LJ;
1324                 break;
1325         default:
1326                 printk("%s : set format failed!\n", __func__);
1327                 return -EINVAL;
1328         }
1329
1330         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1331         case SND_SOC_DAIFMT_NB_NF:
1332                 adc_aif1 |= RK3026_ALRCK_POL_DIS;
1333                 adc_aif2 |= RK3026_ABCLK_POL_DIS;
1334                 dac_aif1 |= RK3026_DLRCK_POL_DIS;
1335                 dac_aif2 |= RK3026_DBCLK_POL_DIS;
1336                 break;
1337         case SND_SOC_DAIFMT_IB_IF:
1338                 adc_aif1 |= RK3026_ALRCK_POL_EN;
1339                 adc_aif2 |= RK3026_ABCLK_POL_EN;
1340                 dac_aif1 |= RK3026_DLRCK_POL_EN;
1341                 dac_aif2 |= RK3026_DBCLK_POL_EN;
1342                 break;
1343         case SND_SOC_DAIFMT_IB_NF:
1344                 adc_aif1 |= RK3026_ALRCK_POL_DIS;
1345                 adc_aif2 |= RK3026_ABCLK_POL_EN;
1346                 dac_aif1 |= RK3026_DLRCK_POL_DIS;
1347                 dac_aif2 |= RK3026_DBCLK_POL_EN;
1348                 break;
1349         case SND_SOC_DAIFMT_NB_IF:
1350                 adc_aif1 |= RK3026_ALRCK_POL_EN;
1351                 adc_aif2 |= RK3026_ABCLK_POL_DIS;
1352                 dac_aif1 |= RK3026_DLRCK_POL_EN;
1353                 dac_aif2 |= RK3026_DBCLK_POL_DIS;
1354                 break;
1355         default:
1356                 printk("%s : set dai format failed!\n", __func__);
1357                 return -EINVAL;
1358         }
1359
1360         snd_soc_update_bits(codec, RK3026_ADC_INT_CTL1,
1361                         RK3026_ALRCK_POL_MASK | RK3026_ADC_DF_MASK, adc_aif1);
1362         snd_soc_update_bits(codec, RK3026_ADC_INT_CTL2,
1363                         RK3026_ABCLK_POL_MASK | RK3026_I2S_MODE_MASK, adc_aif2);
1364         snd_soc_update_bits(codec, RK3026_DAC_INT_CTL1,
1365                         RK3026_DLRCK_POL_MASK | RK3026_DAC_DF_MASK, dac_aif1);
1366         snd_soc_update_bits(codec, RK3026_DAC_INT_CTL2,
1367                         RK3026_DBCLK_POL_MASK, dac_aif2);
1368
1369         return 0;
1370 }
1371
1372 static int rk3026_hw_params(struct snd_pcm_substream *substream,
1373                             struct snd_pcm_hw_params *params,
1374                             struct snd_soc_dai *dai)
1375 {
1376         struct snd_soc_pcm_runtime *rtd = substream->private_data;
1377         struct snd_soc_codec *codec =rtd->codec;
1378         struct rk3026_codec_priv *rk3026 = rk3026_priv;
1379         unsigned int rate = params_rate(params);
1380         unsigned int div;
1381         unsigned int adc_aif1 = 0, adc_aif2  = 0, dac_aif1 = 0, dac_aif2  = 0;
1382
1383         if (!rk3026) {
1384                 printk("%s : rk3026 is NULL\n", __func__);
1385                 return -EINVAL;
1386         }
1387
1388         // bclk = codec_clk / 4
1389         // lrck = bclk / (wl * 2)
1390         div = (((rk3026->stereo_sysclk / 4) / rate) / 2);
1391
1392         if ((rk3026->stereo_sysclk % (4 * rate * 2) > 0) ||
1393             (div != 16 && div != 20 && div != 24 && div != 32)) {
1394                 printk("%s : need PLL\n", __func__);
1395                 return -EINVAL;
1396         }
1397
1398         switch (div) {
1399         case 16:
1400                 adc_aif2 |= RK3026_ADC_WL_16;
1401                 dac_aif2 |= RK3026_DAC_WL_16;
1402                 break;
1403         case 20:
1404                 adc_aif2 |= RK3026_ADC_WL_20;
1405                 dac_aif2 |= RK3026_DAC_WL_20;
1406                 break;
1407         case 24:
1408                 adc_aif2 |= RK3026_ADC_WL_24;
1409                 dac_aif2 |= RK3026_DAC_WL_24;
1410                 break;
1411         case 32:
1412                 adc_aif2 |= RK3026_ADC_WL_32;
1413                 dac_aif2 |= RK3026_DAC_WL_32;
1414                 break;
1415         default:
1416                 return -EINVAL;
1417         }
1418
1419
1420         DBG("%s : MCLK = %dHz, sample rate = %dHz, div = %d\n", __func__,
1421                 rk3026->stereo_sysclk, rate, div);
1422
1423         switch (params_format(params)) {
1424         case SNDRV_PCM_FORMAT_S16_LE:
1425                 adc_aif1 |= RK3026_ADC_VWL_16;
1426                 dac_aif1 |= RK3026_DAC_VWL_16;
1427                 break;
1428         case SNDRV_PCM_FORMAT_S20_3LE:
1429                 adc_aif1 |= RK3026_ADC_VWL_20;
1430                 dac_aif1 |= RK3026_DAC_VWL_20;
1431                 break;
1432         case SNDRV_PCM_FORMAT_S24_LE:
1433                 adc_aif1 |= RK3026_ADC_VWL_24;
1434                 dac_aif1 |= RK3026_DAC_VWL_24;
1435                 break;
1436         case SNDRV_PCM_FORMAT_S32_LE:
1437                 adc_aif1 |= RK3026_ADC_VWL_32;
1438                 dac_aif1 |= RK3026_DAC_VWL_32;
1439                 break;
1440         default:
1441                 return -EINVAL;
1442         }
1443
1444         switch (params_channels(params)) {
1445         case RK3026_MONO:
1446                 adc_aif1 |= RK3026_ADC_TYPE_MONO;
1447                 break;
1448         case RK3026_STEREO:
1449                 adc_aif1 |= RK3026_ADC_TYPE_STEREO;
1450                 break;
1451         default:
1452                 return -EINVAL;
1453         }
1454
1455         adc_aif1 |= RK3026_ADC_SWAP_DIS;
1456         adc_aif2 |= RK3026_ADC_RST_DIS;
1457         dac_aif1 |= RK3026_DAC_SWAP_DIS;
1458         dac_aif2 |= RK3026_DAC_RST_DIS;
1459
1460         rk3026->rate = rate;
1461
1462         snd_soc_update_bits(codec, RK3026_ADC_INT_CTL1,
1463                          RK3026_ADC_VWL_MASK | RK3026_ADC_SWAP_MASK |
1464                          RK3026_ADC_TYPE_MASK, adc_aif1);
1465         snd_soc_update_bits(codec, RK3026_ADC_INT_CTL2,
1466                         RK3026_ADC_WL_MASK | RK3026_ADC_RST_MASK, adc_aif2);
1467         snd_soc_update_bits(codec, RK3026_DAC_INT_CTL1,
1468                          RK3026_DAC_VWL_MASK | RK3026_DAC_SWAP_MASK, dac_aif1);
1469         snd_soc_update_bits(codec, RK3026_DAC_INT_CTL2,
1470                         RK3026_DAC_WL_MASK | RK3026_DAC_RST_MASK, dac_aif2);
1471
1472         return 0;
1473 }
1474
1475 static int rk3026_digital_mute(struct snd_soc_dai *dai, int mute)
1476 {
1477         struct snd_soc_codec *codec = dai->codec;
1478         unsigned int is_hp_pd;
1479
1480
1481         is_hp_pd = (RK3026_HPOUTL_MSK | RK3026_HPOUTR_MSK) & snd_soc_read(codec, RK3026_HPOUT_CTL);
1482
1483         if (mute) {
1484                 if (rk3026_priv && rk3026_priv->hp_ctl_gpio != INVALID_GPIO &&
1485                     is_hp_pd) {
1486                         DBG("%s : set hp ctl gpio LOW\n", __func__);
1487                         gpio_set_value(rk3026_priv->hp_ctl_gpio, GPIO_LOW);
1488                         msleep(200);//rk3026_priv->delay_time);
1489                         }
1490
1491         } else {
1492                 if (rk3026_priv && rk3026_priv->hp_ctl_gpio != INVALID_GPIO &&
1493                     is_hp_pd) {
1494                         DBG("%s : set hp ctl gpio HIGH\n", __func__);
1495                         gpio_set_value(rk3026_priv->hp_ctl_gpio, GPIO_HIGH);
1496                         msleep(100);//rk3026_priv->delay_time);
1497                 }
1498         }
1499         return 0;
1500 }
1501
1502 static struct rk3026_reg_val_typ playback_power_up_list[] = {
1503         {0x18,0x32},
1504         {0xa0,0x40},
1505         {0xa0,0x62},
1506         {0xa4,0x88},
1507         {0xa4,0xcc},
1508         {0xa4,0xee},
1509         {0xa8,0x44},
1510         {0xb0,0x92},
1511         {0xb0,0xdb},
1512         {0xac,0x11},//DAC
1513         {0xa8,0x55},
1514         {0xa8,0x77},
1515         {0xa4,0xff},
1516         {0xb0,0xff},
1517         {0xa0,0x73},
1518         {0xb4,OUT_VOLUME},
1519         {0xb8,OUT_VOLUME},
1520 };
1521 #define RK3026_CODEC_PLAYBACK_POWER_UP_LIST_LEN ARRAY_SIZE(playback_power_up_list)
1522
1523 static struct rk3026_reg_val_typ playback_power_down_list[] = {
1524         {0xb0,0xdb},
1525         {0xa8,0x44},
1526         {0xac,0x00},
1527         {0xb0,0x92},
1528         {0xa0,0x22},
1529         {0xb0,0x00},
1530         {0xa8,0x00},
1531         {0xa4,0x00},
1532         {0xa0,0x00},
1533         {0x18,0x22},
1534 #ifdef WITH_CAP
1535         //{0xbc,0x08},
1536 #endif
1537         {0xb4,0x0},
1538         {0xb8,0x0},
1539         {0x18,0x22},
1540 };
1541 #define RK3026_CODEC_PLAYBACK_POWER_DOWN_LIST_LEN ARRAY_SIZE(playback_power_down_list)
1542
1543 static struct rk3026_reg_val_typ capture_power_up_list[] = {
1544         {0x88, 0x80},
1545         {0x88, 0xc0},
1546         {0x88, 0xc7},
1547         {0x9c, 0x88},
1548         {0x8c, 0x04},
1549         {0x90, 0x66},
1550         {0x9c, 0xcc},
1551         {0x9c, 0xee},
1552         {0x8c, 0x07},
1553         {0x90, 0x77},
1554         {0x94, 0x20 | CAP_VOL},
1555         {0x98, CAP_VOL},
1556         {0x88, 0xf7},
1557
1558 };
1559 #define RK3026_CODEC_CAPTURE_POWER_UP_LIST_LEN ARRAY_SIZE(capture_power_up_list)
1560
1561 static struct rk3026_reg_val_typ capture_power_down_list[] = {
1562         {0x9c, 0xcc},
1563         {0x90, 0x66},
1564         {0x8c, 0x44},
1565         {0x9c, 0x88},
1566         {0x88, 0xc7},
1567         {0x88, 0xc0},
1568         {0x88, 0x80},
1569         {0x8c, 0x00},
1570         {0X94, 0x0c},
1571         {0X98, 0x0c},
1572         {0x9c, 0x00},
1573         {0x88, 0x00},
1574         {0x90, 0x44},
1575 };
1576 #define RK3026_CODEC_CAPTURE_POWER_DOWN_LIST_LEN ARRAY_SIZE(capture_power_down_list)
1577
1578 static int rk3026_codec_power_up(int type)
1579 {
1580         struct snd_soc_codec *codec = rk3026_priv->codec;
1581         int i;
1582
1583         if (!rk3026_priv || !rk3026_priv->codec) {
1584                 printk("%s : rk3026_priv or rk3026_priv->codec is NULL\n", __func__);
1585                 return -EINVAL;
1586         }
1587
1588         printk("%s : power up %s%s\n", __func__,
1589                 type == RK3026_CODEC_PLAYBACK ? "playback" : "",
1590                 type == RK3026_CODEC_CAPTURE ? "capture" : "");
1591
1592         if (type == RK3026_CODEC_PLAYBACK) {
1593                 for (i = 0; i < RK3026_CODEC_PLAYBACK_POWER_UP_LIST_LEN; i++) {
1594                         snd_soc_write(codec, playback_power_up_list[i].reg,
1595                                 playback_power_up_list[i].value);
1596                 }
1597         } else if (type == RK3026_CODEC_CAPTURE) {
1598                 for (i = 0; i < RK3026_CODEC_CAPTURE_POWER_UP_LIST_LEN; i++) {
1599                         snd_soc_write(codec, capture_power_up_list[i].reg,
1600                                 capture_power_up_list[i].value);
1601                 }
1602         } else if (type == RK3026_CODEC_INCALL) {
1603                 snd_soc_update_bits(codec, RK3026_ALC_MUNIN_CTL,
1604                          RK3026_MUXINL_F_MSK | RK3026_MUXINR_F_MSK,
1605                          RK3026_MUXINR_F_INR | RK3026_MUXINL_F_INL);
1606
1607         }
1608
1609         return 0;
1610 }
1611
1612 static int rk3026_codec_power_down(int type)
1613 {
1614         struct snd_soc_codec *codec = rk3026_priv->codec;
1615         int i;
1616
1617         if (!rk3026_priv || !rk3026_priv->codec) {
1618                 printk("%s : rk3026_priv or rk3026_priv->codec is NULL\n", __func__);
1619                 return -EINVAL;
1620         }
1621
1622         printk("%s : power down %s%s%s\n", __func__,
1623                 type == RK3026_CODEC_PLAYBACK ? "playback" : "",
1624                 type == RK3026_CODEC_CAPTURE ? "capture" : "",
1625                 type == RK3026_CODEC_ALL ? "all" : "");
1626
1627         if ((type == RK3026_CODEC_CAPTURE) || (type == RK3026_CODEC_INCALL)) {
1628                 for (i = 0; i < RK3026_CODEC_CAPTURE_POWER_DOWN_LIST_LEN; i++) {
1629                         snd_soc_write(codec, capture_power_down_list[i].reg,
1630                                 capture_power_down_list[i].value);
1631                 }
1632         } else if (type == RK3026_CODEC_PLAYBACK) {
1633 #if 0
1634                 snd_soc_write(codec, 0xa0,0x62);
1635                 for ( i = OUT_VOLUME; i >= 0; i--)
1636                 {
1637                         snd_soc_write(codec, 0xb4,i);
1638                         snd_soc_write(codec, 0xb8,i);
1639                 }
1640                 msleep(20);
1641 #endif
1642                 for (i = 0; i < RK3026_CODEC_PLAYBACK_POWER_DOWN_LIST_LEN; i++) {
1643                         snd_soc_write(codec, playback_power_down_list[i].reg,
1644                                 playback_power_down_list[i].value);
1645
1646                 }
1647
1648         } else if (type == RK3026_CODEC_ALL) {
1649                 rk3026_reset(codec);
1650         }
1651
1652         return 0;
1653 }
1654
1655 static void  rk3026_codec_capture_work(struct work_struct *work)
1656 {
1657         DBG("%s : rk3026_codec_work_capture_type = %d\n", __func__,
1658                 rk3026_codec_work_capture_type);
1659
1660         switch (rk3026_codec_work_capture_type) {
1661         case RK3026_CODEC_WORK_POWER_DOWN:
1662                 rk3026_codec_power_down(RK3026_CODEC_CAPTURE);
1663                 break;
1664         case RK3026_CODEC_WORK_POWER_UP:
1665                 rk3026_codec_power_up(RK3026_CODEC_CAPTURE);
1666                 break;
1667         default:
1668                 break;
1669         }
1670
1671         rk3026_codec_work_capture_type = RK3026_CODEC_WORK_NULL;
1672 }
1673
1674 static int rk3026_startup(struct snd_pcm_substream *substream,
1675                           struct snd_soc_dai *dai)
1676 {
1677         struct rk3026_codec_priv *rk3026 = rk3026_priv;
1678         bool playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
1679         bool is_codec_playback_running = rk3026->playback_active > 0 ;
1680         bool is_codec_capture_running = rk3026->capture_active > 0;
1681
1682         if (!rk3026_for_mid)
1683         {
1684                 DBG("%s immediately return for phone\n",__func__);
1685                 return 0;
1686         }
1687
1688         if (!rk3026) {
1689                 printk("%s : rk3026 is NULL\n", __func__);
1690                 return -EINVAL;
1691         }
1692
1693         DBG("%s : substream->stream : %s \n", __func__,
1694                 playback ? "PLAYBACK":"CAPTURE");
1695
1696         if (playback)
1697                 rk3026->playback_active++;
1698         else
1699                 rk3026->capture_active++;
1700
1701         if (playback) {
1702                 if (rk3026->playback_active > 0) {
1703                         if (!is_codec_playback_running)
1704                                 rk3026_codec_power_up(RK3026_CODEC_PLAYBACK);
1705                         else
1706                                 DBG(" Warning : playback has been opened, so return! \n");
1707                 }
1708         } else {//capture
1709                 if (rk3026->capture_active > 0 && !is_codec_capture_running) {
1710                         if (rk3026_codec_work_capture_type != RK3026_CODEC_WORK_POWER_UP) {
1711                                 cancel_delayed_work_sync(&capture_delayed_work);
1712                                 if (rk3026_codec_work_capture_type == RK3026_CODEC_WORK_NULL) {
1713                                         rk3026_codec_power_up(RK3026_CODEC_CAPTURE);
1714                                 } else {
1715                                         DBG(" Warning : capture being closed, so interrupt the shutdown process ! \n");
1716                                         rk3026_codec_work_capture_type = RK3026_CODEC_WORK_NULL;
1717                                 }
1718                         } else {
1719                                 DBG("Warning : capture being opened, so return ! \n");
1720                         }
1721                 }
1722         }
1723         return 0;
1724 }
1725
1726 static void rk3026_shutdown(struct snd_pcm_substream *substream,
1727                             struct snd_soc_dai *dai)
1728 {
1729         struct rk3026_codec_priv *rk3026 = rk3026_priv;
1730         bool playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
1731         bool is_codec_playback_running = rk3026->playback_active > 0;
1732         bool is_codec_capture_running = rk3026->capture_active > 0;
1733
1734         if (!rk3026_for_mid)
1735         {
1736                 DBG("%s immediately return for phone\n", __func__);
1737                 return;
1738         }
1739
1740         if (!rk3026) {
1741                 printk("%s : rk3026 is NULL\n", __func__);
1742                 return;
1743         }
1744
1745         DBG("%s : substream->stream : %s \n", __func__,
1746                 playback ? "PLAYBACK":"CAPTURE");
1747
1748         if (playback)
1749                 rk3026->playback_active--;
1750         else
1751                 rk3026->capture_active--;
1752
1753         if (playback) {
1754                 if (rk3026->playback_active <= 0) {
1755                         if (is_codec_playback_running == true)
1756                                 rk3026_codec_power_down(RK3026_CODEC_PLAYBACK);
1757                         else
1758                                 DBG(" Warning : playback has been closed, so return !\n");
1759                 }
1760         } else {//capture
1761                 if (rk3026->capture_active <= 0) {
1762                         if ((rk3026_codec_work_capture_type != RK3026_CODEC_WORK_POWER_DOWN) &&
1763                             (is_codec_capture_running == true)) {
1764                                 cancel_delayed_work_sync(&capture_delayed_work);
1765                                 /*
1766                                 * If rk3026_codec_work_capture_type is NULL means codec already power down,
1767                                 * so power up codec.
1768                                 * If rk3026_codec_work_capture_type is RK3026_CODEC_WORK_POWER_UP it means
1769                                 * codec haven't be powered up, so we don't need to power down codec.
1770                                 * If is playback call power down, power down immediatly, because audioflinger
1771                                 * already has delay 3s.
1772                                 */
1773                                 if (rk3026_codec_work_capture_type == RK3026_CODEC_WORK_NULL) {
1774                                         rk3026_codec_work_capture_type = RK3026_CODEC_WORK_POWER_DOWN;
1775                                         queue_delayed_work(rk3026_codec_workq, &capture_delayed_work,msecs_to_jiffies(3000));
1776                                 } else {
1777                                         rk3026_codec_work_capture_type = RK3026_CODEC_WORK_NULL;
1778                                         DBG(" Warning : capture being opened, so interrupt the open process ! \n");
1779                                 }
1780                         } else {
1781                                 DBG(" Warning : capture has been closed or it being closed, so return !\n");
1782                         }
1783                 }
1784         }
1785 }
1786
1787 #define RK3026_PLAYBACK_RATES (SNDRV_PCM_RATE_8000 |\
1788                               SNDRV_PCM_RATE_16000 |    \
1789                               SNDRV_PCM_RATE_32000 |    \
1790                               SNDRV_PCM_RATE_44100 |    \
1791                               SNDRV_PCM_RATE_48000 |    \
1792                               SNDRV_PCM_RATE_96000)
1793
1794 #define RK3026_CAPTURE_RATES (SNDRV_PCM_RATE_8000 |\
1795                               SNDRV_PCM_RATE_16000 |    \
1796                               SNDRV_PCM_RATE_32000 |    \
1797                               SNDRV_PCM_RATE_44100 |    \
1798                               SNDRV_PCM_RATE_48000 |    \
1799                               SNDRV_PCM_RATE_96000)
1800
1801 #define RK3026_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
1802                         SNDRV_PCM_FMTBIT_S20_3LE |\
1803                         SNDRV_PCM_FMTBIT_S24_LE |\
1804                         SNDRV_PCM_FMTBIT_S32_LE)
1805
1806 static struct snd_soc_dai_ops rk3026_dai_ops = {
1807         .hw_params      = rk3026_hw_params,
1808         .set_fmt        = rk3026_set_dai_fmt,
1809         .set_sysclk     = rk3026_set_dai_sysclk,
1810         .digital_mute   = rk3026_digital_mute,
1811         .startup        = rk3026_startup,
1812         .shutdown       = rk3026_shutdown,
1813 };
1814
1815 static struct snd_soc_dai_driver rk3026_dai[] = {
1816         {
1817                 .name = "rk3026-hifi",
1818                 .id = RK3026_HIFI,
1819                 .playback = {
1820                         .stream_name = "HiFi Playback",
1821                         .channels_min = 2,
1822                         .channels_max = 2,
1823                         .rates = RK3026_PLAYBACK_RATES,
1824                         .formats = RK3026_FORMATS,
1825                 },
1826                 .capture = {
1827                         .stream_name = "HiFi Capture",
1828                         .channels_min = 2,
1829                         .channels_max = 2,
1830                         .rates = RK3026_CAPTURE_RATES,
1831                         .formats = RK3026_FORMATS,
1832                 },
1833                 .ops = &rk3026_dai_ops,
1834         },
1835         {
1836                 .name = "rk3026-voice",
1837                 .id = RK3026_VOICE,
1838                 .playback = {
1839                         .stream_name = "Voice Playback",
1840                         .channels_min = 1,
1841                         .channels_max = 2,
1842                         .rates = RK3026_PLAYBACK_RATES,
1843                         .formats = RK3026_FORMATS,
1844                 },
1845                 .capture = {
1846                         .stream_name = "Voice Capture",
1847                         .channels_min = 1,
1848                         .channels_max = 2,
1849                         .rates = RK3026_CAPTURE_RATES,
1850                         .formats = RK3026_FORMATS,
1851                 },
1852                 .ops = &rk3026_dai_ops,
1853         },
1854
1855 };
1856
1857 static int rk3026_suspend(struct snd_soc_codec *codec)
1858 {
1859         if (rk3026_for_mid)
1860         {
1861                 cancel_delayed_work_sync(&capture_delayed_work);
1862
1863                 if (rk3026_codec_work_capture_type != RK3026_CODEC_WORK_NULL) {
1864                         rk3026_codec_work_capture_type = RK3026_CODEC_WORK_NULL;
1865                 }
1866                 rk3026_codec_power_down(RK3026_CODEC_PLAYBACK);
1867                 rk3026_codec_power_down(RK3026_CODEC_ALL);
1868                 snd_soc_write(codec, RK3026_SELECT_CURRENT,0x1e);
1869                 snd_soc_write(codec, RK3026_SELECT_CURRENT,0x3e);
1870         }
1871         else
1872                 rk3026_set_bias_level(codec, SND_SOC_BIAS_OFF);
1873
1874         return 0;
1875 }
1876
1877 static int rk3026_resume(struct snd_soc_codec *codec)
1878 {
1879         if (!rk3026_for_mid)
1880                 rk3026_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1881         return 0;
1882 }
1883
1884 static int rk3026_probe(struct snd_soc_codec *codec)
1885 {
1886         struct rk3026_codec_priv *rk3026;
1887         struct rk3026_codec_pdata  *rk3026_plt = codec->dev->platform_data;
1888         struct platform_device *pdev = to_platform_device(codec->dev);
1889         struct resource *res, *mem;
1890         int ret;
1891         unsigned int val;
1892
1893         DBG("%s\n", __func__);
1894
1895         rk3026 = kzalloc(sizeof(struct rk3026_codec_priv), GFP_KERNEL);
1896         if (!rk3026) {
1897                 printk("%s : rk3026 priv kzalloc failed!\n", __func__);
1898                 return -ENOMEM;
1899         }
1900
1901         rk3026->codec = codec;
1902
1903         res = pdev->resource;
1904         rk3026->regbase_phy = res->start;
1905         rk3026->regsize_phy = (res->end - res->start) + 1;
1906
1907         mem = request_mem_region(res->start, (res->end - res->start) + 1, pdev->name);
1908         if (!mem)
1909         {
1910                 dev_err(&pdev->dev, "failed to request mem region for rk2928 codec\n");
1911                 ret = -ENOENT;
1912                 goto err__;
1913         }
1914
1915         rk3026->regbase = (int)ioremap(res->start, (res->end - res->start) + 1);
1916         if (!rk3026->regbase) {
1917                 dev_err(&pdev->dev, "cannot ioremap acodec registers\n");
1918                 ret = -ENXIO;
1919                 goto err__;
1920         }
1921
1922         rk3026->pclk = clk_get(NULL,"pclk_acodec");
1923         if(IS_ERR(rk3026->pclk))
1924         {
1925                 dev_err(&pdev->dev, "Unable to get acodec hclk\n");
1926                 ret = -ENXIO;
1927                 goto err__;
1928         }
1929         clk_enable(rk3026->pclk);
1930
1931         rk3026_priv = rk3026;
1932
1933         if (rk3026_priv && rk3026_plt->spk_ctl_gpio) {
1934                 gpio_request(rk3026_plt->spk_ctl_gpio, NULL);
1935                 gpio_direction_output(rk3026_plt->spk_ctl_gpio, GPIO_LOW);
1936                 rk3026->spk_ctl_gpio = rk3026_plt->spk_ctl_gpio;
1937                 rk3026->hp_ctl_gpio = rk3026_plt->hp_ctl_gpio;
1938         } else {
1939                 printk("%s : rk3026 spk_ctl_gpio is NULL!\n", __func__);
1940                 rk3026->spk_ctl_gpio = INVALID_GPIO;
1941         }
1942
1943         if (rk3026_priv && rk3026_plt->hp_ctl_gpio) {
1944                 gpio_request(rk3026_plt->hp_ctl_gpio, NULL);
1945                 gpio_direction_output(rk3026_plt->hp_ctl_gpio, GPIO_LOW);
1946                 rk3026->hp_ctl_gpio = rk3026_plt->hp_ctl_gpio;
1947         } else {
1948                 printk("%s : rk3026 hp_ctl_gpio is NULL!\n", __func__);
1949                 rk3026->hp_ctl_gpio = INVALID_GPIO;
1950         }
1951
1952         if (rk3026_plt->delay_time) {
1953                 rk3026->delay_time = rk3026_plt->delay_time;
1954         } else {
1955                 printk("%s : rk3026 delay_time is NULL!\n", __func__);
1956                 rk3026->delay_time = 10;
1957         }
1958
1959
1960         if (rk3026_for_mid)
1961         {
1962                 rk3026->playback_active = 0;
1963                 rk3026->capture_active = 0;
1964
1965                 rk3026_codec_workq = create_freezable_workqueue("rk3026-codec");
1966
1967                 if (rk3026_codec_workq == NULL) {
1968                         printk("%s : create work FAIL! rk3026_codec_workq is NULL!\n", __func__);
1969                         ret = -ENOMEM;
1970                         goto err__;
1971                 }
1972         }
1973
1974         ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C);
1975         if (ret != 0) {
1976                 printk("%s : Failed to set cache I/O: %d\n", __func__, ret);
1977                 goto err__;
1978         }
1979
1980         codec->hw_read = rk3026_codec_read;
1981         codec->hw_write = (hw_write_t)rk3026_hw_write;
1982         codec->read = rk3026_codec_read;
1983         codec->write = rk3026_codec_write;
1984
1985         val = snd_soc_read(codec, RK3026_RESET);
1986         if (val != rk3026_reg_defaults[RK3026_RESET]) {
1987                 printk("%s : codec register 0: %x is not a 0x00000003\n", __func__, val);
1988                 ret = -ENODEV;
1989                 goto err__;
1990         }
1991
1992         rk3026_reset(codec);
1993
1994         if (!rk3026_for_mid)
1995         {
1996                 codec->dapm.bias_level = SND_SOC_BIAS_OFF;
1997                 rk3026_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1998         }
1999
2000 #ifdef   WITH_CAP
2001         //set for capacity output,clear up noise
2002         snd_soc_write(codec, RK3026_SELECT_CURRENT,0x1e);
2003         snd_soc_write(codec, RK3026_SELECT_CURRENT,0x3e);
2004         //snd_soc_write(codec, 0xbc,0x28);
2005 #endif
2006         // select  i2s sdi from  acodec  soc_con[0] bit 10
2007         val = readl(RK2928_GRF_BASE+GRF_SOC_CON0);
2008         writel(val | 0x04000400,RK2928_GRF_BASE+GRF_SOC_CON0);
2009         val = readl(RK2928_GRF_BASE+GRF_SOC_CON0);
2010         printk("%s : i2s sdi from acodec val=0x%x,soc_con[0] bit 10 =1 is correct\n",__func__,val);
2011
2012
2013         if(!rk3026_for_mid)
2014         {
2015                 codec->dapm.bias_level = SND_SOC_BIAS_OFF;
2016                 rk3026_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
2017
2018                 snd_soc_add_codec_controls(codec, rk3026_snd_controls,
2019                         ARRAY_SIZE(rk3026_snd_controls));
2020                 snd_soc_dapm_new_controls(&codec->dapm, rk3026_dapm_widgets,
2021                         ARRAY_SIZE(rk3026_dapm_widgets));
2022                 snd_soc_dapm_add_routes(&codec->dapm, rk3026_dapm_routes,
2023                         ARRAY_SIZE(rk3026_dapm_routes));
2024
2025         }
2026
2027 #ifdef CONFIG_MACH_RK_FAC
2028         rk3026_hdmi_ctrl=1;
2029 #endif
2030         return 0;
2031
2032 err__:
2033         release_mem_region(res->start,(res->end - res->start) + 1);
2034         kfree(rk3026);
2035         rk3026 = NULL;
2036         rk3026_priv = NULL;
2037
2038         return ret;
2039 }
2040
2041 /* power down chip */
2042 static int rk3026_remove(struct snd_soc_codec *codec)
2043 {
2044
2045         DBG("%s\n", __func__);
2046
2047         if (!rk3026_priv) {
2048                 printk("%s : rk3026_priv is NULL\n", __func__);
2049                 return 0;
2050         }
2051
2052         if (rk3026_priv->spk_ctl_gpio != INVALID_GPIO)
2053                 gpio_set_value(rk3026_priv->spk_ctl_gpio, GPIO_LOW);
2054
2055         if (rk3026_priv->hp_ctl_gpio != INVALID_GPIO)
2056                 gpio_set_value(rk3026_priv->hp_ctl_gpio, GPIO_LOW);
2057
2058         mdelay(10);
2059
2060         if (rk3026_for_mid)
2061         {
2062                 cancel_delayed_work_sync(&capture_delayed_work);
2063
2064                 if (rk3026_codec_work_capture_type != RK3026_CODEC_WORK_NULL) {
2065                         rk3026_codec_work_capture_type = RK3026_CODEC_WORK_NULL;
2066                 }
2067         }
2068
2069         snd_soc_write(codec, RK3026_RESET, 0xfc);
2070         mdelay(10);
2071         snd_soc_write(codec, RK3026_RESET, 0x3);
2072         mdelay(10);
2073
2074         if (rk3026_priv)
2075                 kfree(rk3026_priv);
2076
2077         return 0;
2078 }
2079
2080 static struct snd_soc_codec_driver soc_codec_dev_rk3026 = {
2081         .probe =rk3026_probe,
2082         .remove =rk3026_remove,
2083         .suspend =rk3026_suspend,
2084         .resume = rk3026_resume,
2085         .set_bias_level = rk3026_set_bias_level,
2086         .reg_cache_size = ARRAY_SIZE(rk3026_reg_defaults),
2087         .reg_word_size = sizeof(unsigned int),
2088         .reg_cache_default = rk3026_reg_defaults,
2089         .volatile_register = rk3026_volatile_register,
2090         .readable_register = rk3026_codec_register,
2091         .reg_cache_step = sizeof(unsigned int),
2092 };
2093
2094 static int rk3026_platform_probe(struct platform_device *pdev)
2095 {
2096         DBG("%s\n", __func__);
2097
2098         return snd_soc_register_codec(&pdev->dev,
2099                         &soc_codec_dev_rk3026, rk3026_dai, ARRAY_SIZE(rk3026_dai));
2100 }
2101
2102 static int rk3026_platform_remove(struct platform_device *pdev)
2103 {
2104         snd_soc_unregister_codec(&pdev->dev);
2105         return 0;
2106 }
2107
2108 void rk3026_platform_shutdown(struct platform_device *pdev)
2109 {
2110
2111         DBG("%s\n", __func__);
2112
2113         if (!rk3026_priv || !rk3026_priv->codec) {
2114                 printk("%s : rk3026_priv or rk3026_priv->codec is NULL\n", __func__);
2115                 return;
2116         }
2117
2118         if (rk3026_priv->spk_ctl_gpio != INVALID_GPIO)
2119                 gpio_set_value(rk3026_priv->spk_ctl_gpio, GPIO_LOW);
2120
2121         if (rk3026_priv->hp_ctl_gpio != INVALID_GPIO)
2122                 gpio_set_value(rk3026_priv->hp_ctl_gpio, GPIO_LOW);
2123
2124         mdelay(10);
2125
2126         if (rk3026_for_mid) {
2127                 cancel_delayed_work_sync(&capture_delayed_work);
2128
2129                 if (rk3026_codec_work_capture_type != RK3026_CODEC_WORK_NULL) {
2130                         rk3026_codec_work_capture_type = RK3026_CODEC_WORK_NULL;
2131                 }
2132         }
2133
2134         writel(0xfc, rk3026_priv->regbase+RK3026_RESET);
2135         mdelay(10);
2136         writel(0x03, rk3026_priv->regbase+RK3026_RESET);
2137
2138         if (rk3026_priv)
2139                 kfree(rk3026_priv);
2140 }
2141
2142 static struct platform_driver rk3026_codec_driver = {
2143         .driver = {
2144                    .name = "rk3026-codec",
2145                    .owner = THIS_MODULE,
2146                    },
2147         .probe = rk3026_platform_probe,
2148         .remove = rk3026_platform_remove,
2149         .shutdown = rk3026_platform_shutdown,
2150 };
2151
2152
2153 static __init int rk3026_modinit(void)
2154 {
2155         rk3026_get_parameter();
2156         return platform_driver_register(&rk3026_codec_driver);
2157 }
2158 module_init(rk3026_modinit);
2159
2160 static __exit void rk3026_exit(void)
2161 {
2162         platform_driver_unregister(&rk3026_codec_driver);
2163 }
2164 module_exit(rk3026_exit);
2165
2166 MODULE_DESCRIPTION("ASoC RK3026 driver");
2167 MODULE_AUTHOR("yj <yangjie@rock-chips.com>");
2168 MODULE_LICENSE("GPL");