3 * Copyright (C) 2009 rockchip lhh
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
13 #ifndef _RK1000_CODEC_H
14 #define _RK1000_CODEC_H
16 /* RK1000 register space */
18 /* ADC High Pass Filter / DSM */
19 #define ACCELCODEC_R00 0x00
21 #define ACCELCODEC_R01 0x01
23 #define ACCELCODEC_R02 0x02
25 #define ACCELCODEC_R03 0x03
26 /* Soft mute / sidetone gain control */
27 #define ACCELCODEC_R04 0x04
28 /* Right interpolate filter volume control (MSB) */
29 #define ACCELCODEC_R05 0x05
30 /* Right interpolate filter volume control (LSB) */
31 #define ACCELCODEC_R06 0x06
32 /* Left interpolate filter volume control (MSB) */
33 #define ACCELCODEC_R07 0x07
34 /* Left interpolate filter volume control (LSB) */
35 #define ACCELCODEC_R08 0x08
36 /* Audio interface control */
37 #define ACCELCODEC_R09 0x09
38 /* Sample Rate / CLK control */
39 #define ACCELCODEC_R0A 0x0A
40 /* Decimation filter / Interpolate filter enable */
41 #define ACCELCODEC_R0B 0x0B
43 #define ACCELCODEC_R0C 0x0C
45 #define ACCELCODEC_R0D 0x0D
47 #define ACCELCODEC_R0E 0x0E
49 #define ACCELCODEC_R12 0x12
51 #define ACCELCODEC_R13 0x13
53 #define ACCELCODEC_R14 0x14
54 /* LPF out mix / SCF */
55 #define ACCELCODEC_R15 0x15
57 #define ACCELCODEC_R16 0x16
58 /* LOUT (AOL) volume */
59 #define ACCELCODEC_R17 0x17
60 /* ROUT (AOR) volume */
61 #define ACCELCODEC_R18 0x18
62 /* MONOOUT (AOM) volume */
63 #define ACCELCODEC_R19 0x19
64 /* MONOOUT / Reference control */
65 #define ACCELCODEC_R1A 0x1A
66 /* Bias Current control */
67 #define ACCELCODEC_R1B 0x1B
69 #define ACCELCODEC_R1C 0x1C
71 #define ACCELCODEC_R1D 0x1D
73 #define ACCELCODEC_R1E 0x1E
75 #define ACCELCODEC_R1F 0x1F
77 #define RK1000_CACHE_REGNUM 0x1F
80 /* high_pass filter */
81 #define ASC_HPF_ENABLE (0x1)
82 #define ASC_HPF_DISABLE (0x0)
84 #define ASC_DSM_MODE_ENABLE (0x1 << 1)
85 #define ASC_DSM_MODE_DISABLE (0x0 << 1)
87 #define ASC_SCRAMBLE_ENABLE (0x1 << 2)
88 #define ASC_SCRAMBLE_DISABLE (0x0 << 2)
90 #define ASC_DITHER_ENABLE (0x1 << 3)
91 #define ASC_DITHER_DISABLE (0x0 << 3)
93 #define ASC_BCLKDIV_4 (0x1 << 4)
94 #define ASC_BCLKDIV_8 (0x2 << 4)
95 #define ASC_BCLKDIV_16 (0x3 << 4)
98 #define ASC_INT_MUTE_L (0x1)
99 #define ASC_INT_ACTIVE_L (0x0)
100 #define ASC_INT_MUTE_R (0x1 << 1)
101 #define ASC_INT_ACTIVE_R (0x0 << 1)
103 #define ASC_SIDETONE_L_OFF (0x0 << 2)
104 #define ASC_SIDETONE_L_GAIN_MAX (0x1 << 2)
105 #define ASC_SIDETONE_R_OFF (0x0 << 5)
106 #define ASC_SIDETONE_R_GAIN_MAX (0x1 << 5)
110 #define ASC_INT_VOL_0DB (0x0)
114 #define ASC_DSP_MODE (0x3)
115 #define ASC_I2S_MODE (0x2)
116 #define ASC_LEFT_MODE (0x1)
117 #define ASC_RIGHT_MODE (0x0)
119 #define ASC_32BIT_MODE (0x3 << 2)
120 #define ASC_24BIT_MODE (0x2 << 2)
121 #define ASC_20BIT_MODE (0x1 << 2)
122 #define ASC_16BIT_MODE (0x0 << 2)
124 #define ASC_INVERT_LRCLK (0x1 << 4)
125 #define ASC_NORMAL_LRCLK (0x0 << 4)
127 #define ASC_LRSWAP_ENABLE (0x1 << 5)
128 #define ASC_LRSWAP_DISABLE (0x0 << 5)
130 #define ASC_MASTER_MODE (0x1 << 6)
131 #define ASC_SLAVE_MODE (0x0 << 6)
133 #define ASC_INVERT_BCLK (0x1 << 7)
134 #define ASC_NORMAL_BCLK (0x0 << 7)
137 #define ASC_USB_MODE (0x1)
138 #define ASC_NORMAL_MODE (0x0)
140 #define FREQ96kHz (0x0e << 1)
141 #define FREQ48kHz (0x00 << 1)
142 #define FREQ441kHz (0x11 << 1)
143 #define FREQ32kHz (0x0c << 1)
144 #define FREQ24kHz (0x1c << 1)
145 #define FREQ2205kHz (0x1B << 1)
146 #define FREQ16kHz (0x0a << 1)
147 #define FREQ12kHz (0x08 << 1)
148 #define FREQ11025kHz (0x19 << 1)
149 #define FREQ8kHz (0x06<<1)
151 #define ASC_CLKDIV2 (0x1 << 6)
152 #define ASC_CLKNODIV (0x0 << 6)
154 #define ASC_CLK_ENABLE (0x1 << 7)
155 #define ASC_CLK_DISABLE (0x0 << 7)
158 #define ASC_DEC_ENABLE (0x1)
159 #define ASC_DEC_DISABLE (0x0)
160 #define ASC_INT_ENABLE (0x1 << 1)
161 #define ASC_INT_DISABLE (0x0 << 1)
163 #define ASC_INPUT_MUTE (0x1 << 7)
164 #define ASC_INPUT_ACTIVE (0x0 << 7)
165 #define ASC_INPUT_VOL_0DB (0x0)
168 #define ASC_LINE_INPUT (0)
169 #define ASC_MIC_INPUT (1 << 7)
171 #define ASC_MIC_BOOST_0DB (0)
172 #define ASC_MIC_BOOST_20DB (1 << 5)
175 #define ASC_LPGAMXVOL_0DB (0x5)
176 /* the left channel PGA output is directly fed into the left mixer */
177 #define ASC_LPGAMX_ENABLE (0x1 << 3)
178 #define ASC_LPGAMX_DISABLE (0x0 << 3)
179 #define ASC_ALMXVOL_0DB (0x5 << 4)
180 /* the left second line input is directly fed into the left mixer */
181 #define ASC_ALMX_ENABLE (0x1 << 7)
182 #define ASC_ALMX_DISABLE (0x0 << 7)
185 #define ASC_RPGAMXVOL_0DB (0x5)
186 /* the right channel PGA output is directly fed into the right mixer */
187 #define ASC_RPGAMX_ENABLE (0x1 << 3)
188 #define ASC_RPGAMX_DISABLE (0x0 << 3)
189 #define ASC_ARMXVOL_0DB (0x5 << 4)
190 /* the right second line input is directly fed into the right mixer */
191 #define ASC_ARMX_ENABLE (0x1 << 7)
192 #define ASC_ARMX_DISABLE (0x0 << 7)
195 /*the left differential signal from DAC is directly fed into the left mixer*/
196 #define ASC_LDAMX_ENABLE (0x1 << 2)
197 #define ASC_LDAMX_DISABLE (0x0 << 2)
198 /* the right differential signal from DAC is *
199 * directly fed into the right mixer */
200 #define ASC_RDAMX_ENABLE (0x1 << 3)
201 #define ASC_RDAMX_DISABLE (0x0 << 3)
202 /* the left channel LPF is mute */
203 #define ASC_LSCF_MUTE (0x1 << 4)
204 #define ASC_LSCF_ACTIVE (0x0 << 4)
205 /* the right channel LPF is mute */
206 #define ASC_RSCF_MUTE (0x1 << 5)
207 #define ASC_RSCF_ACTIVE (0x0 << 5)
208 /* the left channel LPF output is fed into the left into the mixer */
209 #define ASC_LLPFMX_ENABLE (0x1 << 6)
210 #define ASC_LLPFMX_DISABLE (0x0 << 6)
211 /* the right channel LPF output is fed into the right into the mixer. */
212 #define ASC_RLPFMX_ENABLE (0x1 << 7)
213 #define ASC_RLPFMX_DISABLE (0x0 << 7)
215 /* ACCELCODEC_R17/R18 */
216 #define ASC_OUTPUT_MUTE (0x1 << 6)
217 #define ASC_OUTPUT_ACTIVE (0x0 << 6)
218 #define ASC_CROSSZERO_EN (0x1 << 7)
219 #define ASC_OUTPUT_VOL_0DB (0x0F)
221 #define ASC_MONO_OUTPUT_MUTE (0x1 << 7)
222 #define ASC_MONO_OUTPUT_ACTIVE (0x0 << 7)
223 #define ASC_MONO_CROSSZERO_EN (0x1 << 6)
226 #define ASC_VMDSCL_SLOWEST (0x0 << 2)
227 #define ASC_VMDSCL_SLOW (0x1 << 2)
228 #define ASC_VMDSCL_FAST (0x2 << 2)
229 #define ASC_VMDSCL_FASTEST (0x3 << 2)
231 #define ASC_MICBIAS_09 (0x1 << 4)
232 #define ASC_MICBIAS_06 (0x0 << 4)
234 /* the right channel LPF output is fed to mono PA */
235 #define ASC_L2M_ENABLE (0x1 << 5)
236 #define ASC_L2M_DISABLE (0x0 << 5)
237 /* the left channel LPF output is fed to mono PA */
238 #define ASC_R2M_ENABLE (0x1 << 6)
239 #define ASC_R2M_DISABLE (0x0 << 6)
240 /* the capless connection is enable */
241 #define ASC_CAPLESS_ENABLE (0x1 << 7)
242 #define ASC_CAPLESS_DISABLE (0x0 << 7)
245 /* the amplitude setting of the ASDM dither(div=vdd/48) */
246 #define ASC_DITH_0_DIV (0x0 << 3)
247 #define ASC_DITH_2_DIV (0x1 << 3)
248 #define ASC_DITH_4_DIV (0x2 << 3)
249 #define ASC_DITH_8_DIV (0x3 << 3)
251 /* the ASDM dither is enabled */
252 #define ASC_DITH_ENABLE (0x1 << 5)
253 #define ASC_DITH_DISABLE (0x0 << 5)
255 /* the ASDM DEM is enabled */
256 #define ASC_DEM_ENABLE (0x1 << 7)
257 #define ASC_DEM_DISABLE (0x0 << 7)
260 /* the VMID reference is powered down. VMID is connected to GND */
261 #define ASC_PDVMID_ENABLE (0x1)
262 #define ASC_PDVMID_DISABLE (0x0)
263 /* the PGA S2D buffer is power down */
264 #define ASC_PDSDL_ENABLE (0x1 << 2)
265 #define ASC_PDSDL_DISABLE (0x0 << 2)
266 /* the micphone input Op-Amp is power down */
267 #define ASC_PDBSTL_ENABLE (0x1 << 4)
268 #define ASC_PDBSTL_DISABLE (0x0 << 4)
269 /* the PGA is power down */
270 #define ASC_PDPGAL_ENABLE (0x1 << 6)
271 #define ASC_PDPGAL_DISABLE (0x0 << 6)
272 /* reference generator is power down */
273 #define ASC_PDREF_ENABLE (0x1 << 7)
274 #define ASC_PDREF_DISABLE (0x0 << 7)
277 /* the right channel PA is power down */
278 #define ASC_PDPAR_ENABLE (0x1)
279 #define ASC_PDPAR_DISABLE (0x0)
280 /* the left channel power amplifier is power down */
281 #define ASC_PDPAL_ENABLE (0x1 << 1)
282 #define ASC_PDPAL_DISABLE (0x0 << 1)
283 /* the right mixer is power down */
284 #define ASC_PDMIXR_ENABLE (0x1 << 2)
285 #define ASC_PDMIXR_DISABLE (0x0 << 2)
286 /* the left mixer is power down */
287 #define ASC_PDMIXL_ENABLE (0x1 << 3)
288 #define ASC_PDMIXL_DISABLE (0x0 << 3)
289 /* the right RC LPF is power down */
290 #define ASC_PDLPFR_ENABLE (0x1 << 4)
291 #define ASC_PDLPFR_DISABLE (0x0 << 4)
292 /* the left channel RC LPF is power down */
293 #define ASC_PDLPFL_ENABLE (0x1 << 5)
294 #define ASC_PDLPFL_DISABLE (0x0 << 5)
295 /* the ASDM is power down */
296 #define ASC_PDASDML_ENABLE (0x1 << 7)
297 #define ASC_PDASDML_DISABLE (0x0 << 7)
300 /* the right channel DAC is power down */
301 #define ASC_PDSCFR_ENABLE (0x1 << 1)
302 #define ASC_PDSCFR_DISABLE (0x0 << 1)
303 /* the left channel DAC is power down */
304 #define ASC_PDSCFL_ENABLE (0x1 << 2)
305 #define ASC_PDSCFL_DISABLE (0x0 << 2)
306 /* the micbias is power down */
307 #define ASC_PDMICB_ENABLE (0x1 << 4)
308 #define ASC_PDMICB_DISABLE (0x0 << 4)
309 /* the left channel LPF is power down */
310 #define ASC_PDIB_ENABLE (0x1 << 5)
311 #define ASC_PDIB_DISABLE (0x0 << 5)
312 /* the mon mixer is power down */
313 #define ASC_PDMIXM_ENABLE (0x1 << 6)
314 #define ASC_PDMIXM_DISABLE (0x0 << 6)
315 /* the mono PA is power down. */
316 #define ASC_PDPAM_ENABLE (0x1 << 7)
317 #define ASC_PDPAM_DISABLE (0x0 << 7)
319 /* left and right PA gain */
320 #define LINE_2_MIXER_GAIN (0x5)
321 #define RK1000_CODEC_NUM_REG 0x20